Index: kernel/arch/ia64/src/interrupt.c
===================================================================
--- kernel/arch/ia64/src/interrupt.c	(revision 7a9364c012db248907e89ae68a4ff824510b1345)
+++ kernel/arch/ia64/src/interrupt.c	(revision 9cc0d7c4f78aa4efea62a2d761476193f7e7717d)
@@ -127,7 +127,8 @@
 	
 	if (vector >= VECTORS_16_BUNDLE_START)
-		return vector_names_16_bundle[(vector-VECTORS_16_BUNDLE_START)/(16*BUNDLE_SIZE)];
+		return vector_names_16_bundle[(vector -
+		    VECTORS_16_BUNDLE_START) / (16 * BUNDLE_SIZE)];
 	else
-		return vector_names_64_bundle[vector/(64*BUNDLE_SIZE)];
+		return vector_names_64_bundle[vector / (64 * BUNDLE_SIZE)];
 }
 
@@ -142,10 +143,15 @@
 	putchar('\n');
 	printf("Interrupted context dump:\n");
-	printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp, istate->ar_bspstore);
-	printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat, istate->ar_rsc);
-	printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs, istate->ar_pfs);
-	printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value, istate->cr_ipsr);
+	printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp,
+	    istate->ar_bspstore);
+	printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat,
+	    istate->ar_rsc);
+	printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs,
+	    istate->ar_pfs);
+	printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value,
+	    istate->cr_ipsr);
 	
-	printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei, iip);
+	printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip,
+	    istate->cr_isr.ei, iip);
 	printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa, iipa);
 	printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa, ifa);
@@ -191,7 +197,9 @@
 	scheduler_fpu_lazy_request();	
 #else
-	fault_if_from_uspace(istate, "Interruption: %#hx (%s)", (uint16_t) vector, vector_to_string(vector));
+	fault_if_from_uspace(istate, "Interruption: %#hx (%s)",
+	    (uint16_t) vector, vector_to_string(vector));
 	dump_interrupted_context(istate);
-	panic("Interruption: %#hx (%s)\n", (uint16_t) vector, vector_to_string(vector));
+	panic("Interruption: %#hx (%s)\n", (uint16_t) vector,
+	    vector_to_string(vector));
 #endif
 }
@@ -214,12 +222,15 @@
 	}
 
-	return syscall_handler(istate->in0, istate->in1, istate->in2, istate->in3, istate->in4);
+	return syscall_handler(istate->in0, istate->in1, istate->in2,
+	    istate->in3, istate->in4, istate->in5, istate->in6);
 }
 
 void universal_handler(uint64_t vector, istate_t *istate)
 {
-	fault_if_from_uspace(istate,"Interruption: %#hx (%s)\n",(uint16_t) vector, vector_to_string(vector));
+	fault_if_from_uspace(istate, "Interruption: %#hx (%s)\n",
+	    (uint16_t) vector, vector_to_string(vector));
 	dump_interrupted_context(istate);
-	panic("Interruption: %#hx (%s)\n", (uint16_t) vector, vector_to_string(vector));
+	panic("Interruption: %#hx (%s)\n", (uint16_t) vector,
+	    vector_to_string(vector));
 }
 
@@ -245,5 +256,6 @@
 
 		default:
-			panic("\nUnhandled External Interrupt Vector %d\n", ivr.vector);
+			panic("\nUnhandled External Interrupt Vector %d\n",
+			    ivr.vector);
 			break;
 		}
Index: kernel/arch/ia64/src/ivt.S
===================================================================
--- kernel/arch/ia64/src/ivt.S	(revision 7a9364c012db248907e89ae68a4ff824510b1345)
+++ kernel/arch/ia64/src/ivt.S	(revision 9cc0d7c4f78aa4efea62a2d761476193f7e7717d)
@@ -34,5 +34,5 @@
 
 #define FRS_TO_SAVE 30
-#define STACK_ITEMS		(19 + FRS_TO_SAVE*2)
+#define STACK_ITEMS		(21 + FRS_TO_SAVE * 2)
 #define STACK_FRAME_SIZE	ALIGN_UP((STACK_ITEMS*STACK_ITEM_SIZE) + STACK_SCRATCH_AREA_SIZE, STACK_ALIGNMENT)
 
@@ -136,12 +136,14 @@
 	 */
     	mov R_TMP = 0x2c00 ;;
-	cmp.eq p6,p5 = R_OFFS, R_TMP ;;
-	
-	/*
-	 * From now on, if this is break_instruction handler, p6 is true and p5 is false.
-	 * Otherwise p6 is false and p5 is true.
+	cmp.eq p6, p5 = R_OFFS, R_TMP ;;
+	
+	/*
+	 * From now on, if this is break_instruction handler, p6 is true and p5
+	 * is false. Otherwise p6 is false and p5 is true.
 	 * Note that p5 is a preserved predicate register and we make use of it.
 	 */
 
+(p6)	st8 [r31] = r38, -8 ;;		/* save in6 */
+(p6)	st8 [r31] = r37, -8 ;;		/* save in5 */
 (p6)	st8 [r31] = r36, -8 ;;		/* save in4 */	
 (p6)	st8 [r31] = r35, -8 ;;		/* save in3 */
@@ -149,5 +151,5 @@
 (p6)	st8 [r31] = r33, -8 ;;		/* save in1 */
 (p6)	st8 [r31] = r32, -8 ;;		/* save in0 */
-(p5)	add r31 = -40, r31 ;;
+(p5)	add r31 = -56, r31 ;;
     
 	st8 [r31] = r30, -8 ;;		/* save old stack pointer */ 
@@ -179,5 +181,6 @@
 	
 	/*
-	 * Inspect BSPSTORE to figure out whether it is necessary to switch to kernel BSPSTORE.
+	 * Inspect BSPSTORE to figure out whether it is necessary to switch to
+	 * kernel BSPSTORE.
 	 */
 (p1)	shr.u r30 = r28, VRN_SHIFT ;;
@@ -206,7 +209,7 @@
 
     /* 16. RSE switch to interrupted context */
-	cover				/* allocate zerro size frame (step 1 (from Intel Docs)) */
-
-	add r31 = (STACK_SCRATCH_AREA_SIZE+(FRS_TO_SAVE*2*8)), r12 ;;
+	cover				/* allocate zero size frame (step 1 (from Intel Docs)) */
+
+	add r31 = (STACK_SCRATCH_AREA_SIZE + (FRS_TO_SAVE * 2 * 8)), r12 ;;
 
 	ld8 r30 = [r31], +8 ;;		/* load ar.bsp */