Index: boot/arch/arm32/src/asm.S
===================================================================
--- boot/arch/arm32/src/asm.S	(revision a35b458e9db1ca95e679799dc7c1b12c83359ca3)
+++ boot/arch/arm32/src/asm.S	(revision 9be2358aadbef3865ee2b3ab546d8b1f56d79cd6)
@@ -32,5 +32,23 @@
 .section BOOTSTRAP
 
+#define CP15_C1_U		22
+#define CP15_C1_IC		12
+#define CP15_C1_BP		11
+#define CP15_C1_DC		2
+
 SYMBOL(start)
+
+#ifdef PROCESSOR_ARCH_armv6
+	/*
+	 * Enable unaligned doubleword memory accesses (STRD/LDRD) if the
+	 * processor supports it. Note that that boils down to ARMv6 processors
+	 * only as the older architectures require doubleword alignment and
+	 * ARMv7 always assumes the U bit is 1.
+	 */
+	mrc	p15, 0, r0, c1, c0, 0
+	orr	r0, r0, #(1 << CP15_C1_U)
+	mcr	p15, 0, r0, c1, c0, 0
+#endif
+
 	ldr sp, =boot_stack
 	b bootstrap
@@ -59,9 +77,4 @@
 	# r0 is kernel entry point
 	# r1 is pointer to the bootinfo structure
-
-#define CP15_C1_IC		12
-#define CP15_C1_BP		11
-#define CP15_C1_DC		2
-
 
 #ifndef PROCESSOR_ARCH_armv7_a