Index: kernel/arch/arm32/include/arch/context_struct.h
===================================================================
--- kernel/arch/arm32/include/arch/context_struct.h	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/include/arch/context_struct.h	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -55,3 +55,2 @@
 
 #endif
-
Index: kernel/arch/arm32/include/arch/cp15.h
===================================================================
--- kernel/arch/arm32/include/arch/cp15.h	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/include/arch/cp15.h	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -584,5 +584,4 @@
 CONTROL_REG_GEN_WRITE(PMCCNTR, c9, 0, c13, 0);
 
-
 /*c10 has tons of reserved too */
 CONTROL_REG_GEN_READ(PRRR, c10, 0, c2, 0); /* no PAE */
Index: kernel/arch/arm32/include/arch/istate_struct.h
===================================================================
--- kernel/arch/arm32/include/arch/istate_struct.h	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/include/arch/istate_struct.h	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -56,3 +56,2 @@
 
 #endif
-
Index: kernel/arch/arm32/include/arch/mach/beagleboardxm/beagleboardxm.h
===================================================================
--- kernel/arch/arm32/include/arch/mach/beagleboardxm/beagleboardxm.h	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/include/arch/mach/beagleboardxm/beagleboardxm.h	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -46,3 +46,2 @@
 /** @}
  */
-
Index: kernel/arch/arm32/include/arch/mach/beaglebone/beaglebone.h
===================================================================
--- kernel/arch/arm32/include/arch/mach/beaglebone/beaglebone.h	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/include/arch/mach/beaglebone/beaglebone.h	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -46,3 +46,2 @@
 /** @}
  */
-
Index: kernel/arch/arm32/include/arch/mach/integratorcp/integratorcp.h
===================================================================
--- kernel/arch/arm32/include/arch/mach/integratorcp/integratorcp.h	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/include/arch/mach/integratorcp/integratorcp.h	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -97,5 +97,4 @@
 } icp_hw_map_t;
 
-
 extern void icp_init(void);
 extern void icp_output_init(void);
Index: kernel/arch/arm32/include/arch/machine_func.h
===================================================================
--- kernel/arch/arm32/include/arch/machine_func.h	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/include/arch/machine_func.h	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -68,8 +68,6 @@
 extern void machine_init(void);
 
-
 /** Starts timer. */
 extern void machine_timer_irq_start(void);
-
 
 /** Halts CPU. */
@@ -89,5 +87,4 @@
  */
 extern void machine_irq_exception(unsigned int exc_no, istate_t *istate);
-
 
 /*
Index: kernel/arch/arm32/include/arch/mm/page.h
===================================================================
--- kernel/arch/arm32/include/arch/mm/page.h	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/include/arch/mm/page.h	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -131,5 +131,4 @@
 	set_pt_level1_present((pte_t *) (ptl3), (size_t) (i))
 
-
 #define pt_coherence(page) pt_coherence_m(page, 1)
 
Index: kernel/arch/arm32/include/arch/mm/page_armv4.h
===================================================================
--- kernel/arch/arm32/include/arch/mm/page_armv4.h	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/include/arch/mm/page_armv4.h	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -113,5 +113,4 @@
 #define PTE_AP_USER_RW_KERNEL_RW	3
 
-
 /* pte_level0_t and pte_level1_t descriptor_type flags */
 
@@ -195,5 +194,4 @@
 	}
 }
-
 
 /** Sets flags of level 1 page table entry.
@@ -247,5 +245,4 @@
 }
 
-
 NO_TRACE static inline void set_pt_level1_present(pte_t *pt, size_t i)
 {
@@ -255,8 +252,6 @@
 }
 
-
 extern void page_arch_init(void);
 
-
 #endif /* __ASSEMBLER__ */
 
Index: kernel/arch/arm32/include/arch/mm/page_armv6.h
===================================================================
--- kernel/arch/arm32/include/arch/mm/page_armv6.h	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/include/arch/mm/page_armv6.h	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -40,5 +40,4 @@
 #error "Do not include arch specific page.h directly use generic page.h instead"
 #endif
-
 
 /* Macros for querying the last-level PTE entries. */
@@ -112,5 +111,4 @@
 #define PTE_AP1_RO   1
 
-
 /* pte_level0_t and pte_level1_t descriptor_type flags */
 
@@ -126,5 +124,4 @@
 /** pte_level1_t small page table flag with NX (used in descriptor type). */
 #define PTE_DESCRIPTOR_SMALL_PAGE_NX	3
-
 
 /**
@@ -230,5 +227,4 @@
 	pt_coherence(p);
 }
-
 
 /** Sets flags of level 1 page table entry.
@@ -319,5 +315,4 @@
 }
 
-
 extern void page_arch_init(void);
 
Index: kernel/arch/arm32/include/arch/mm/page_fault.h
===================================================================
--- kernel/arch/arm32/include/arch/mm/page_fault.h	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/include/arch/mm/page_fault.h	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -39,5 +39,4 @@
 #include <stdint.h>
 
-
 /** Decribes CP15 "fault status register" (FSR).
  *
@@ -71,5 +70,4 @@
 } fault_status_t;
 
-
 /** Simplified description of instruction code.
  *
@@ -88,5 +86,4 @@
 } ATTRIBUTE_PACKED instruction_t;
 
-
 /** Help union used for casting pc register (uint_32_t) value into
  *  #instruction_t pointer.
Index: kernel/arch/arm32/src/arm32.c
===================================================================
--- kernel/arch/arm32/src/arm32.c	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/src/arm32.c	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -64,5 +64,4 @@
 arch_ops_t *arch_ops = &arm32_ops;
 
-
 /** Performs arm32-specific initialization before main_bsp() is called. */
 void arm32_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo)
@@ -118,10 +117,8 @@
 }
 
-
 /** Performs arm32 specific tasks needed before the new task is run. */
 void before_task_runs_arch(void)
 {
 }
-
 
 /** Performs arm32 specific tasks needed before the new thread is scheduled.
Index: kernel/arch/arm32/src/cpu/cpu.c
===================================================================
--- kernel/arch/arm32/src/cpu/cpu.c	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/src/cpu/cpu.c	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -60,5 +60,4 @@
 static unsigned dcache_linesize_log(unsigned level);
 
-
 /** Implementers (vendor) names */
 static const char *implementer(unsigned id)
@@ -99,5 +98,4 @@
 		return arch_data[0];
 }
-
 
 /** Retrieves processor identification from CP15 register 0.
@@ -317,5 +315,4 @@
 }
 
-
 void cpu_dcache_flush(void)
 {
Index: kernel/arch/arm32/src/fpu_context.c
===================================================================
--- kernel/arch/arm32/src/fpu_context.c	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/src/fpu_context.c	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -47,5 +47,4 @@
 #define FPSID_VARIANT(r)   (((r) >> 4) 0xf)
 #define FPSID_REVISION(r)   (((r) >> 0) 0xf)
-
 
 enum {
@@ -167,5 +166,4 @@
 }
 
-
 void fpu_init(void)
 {
Index: kernel/arch/arm32/src/mach/beaglebone/beaglebone.c
===================================================================
--- kernel/arch/arm32/src/mach/beaglebone/beaglebone.c	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/src/mach/beaglebone/beaglebone.c	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -234,3 +234,2 @@
  * @}
  */
-
Index: kernel/arch/arm32/src/mach/integratorcp/integratorcp.c
===================================================================
--- kernel/arch/arm32/src/mach/integratorcp/integratorcp.c	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/src/mach/integratorcp/integratorcp.c	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -54,5 +54,4 @@
 #include <log.h>
 
-
 #define SDRAM_SIZE \
 	sdram[(*(uint32_t *) (ICP_CMCR + ICP_SDRAMCR_OFFSET) & ICP_SDRAM_MASK) >> 2]
@@ -121,5 +120,4 @@
 	*((uint32_t *) icp.hw_map.irqc_mask) = (1 << irq);
 }
-
 
 /** Unmasks interrupt.
Index: kernel/arch/arm32/src/machine_func.c
===================================================================
--- kernel/arch/arm32/src/machine_func.c	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/src/machine_func.c	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -72,5 +72,4 @@
 }
 
-
 /** Starts timer. */
 void machine_timer_irq_start(void)
@@ -78,5 +77,4 @@
 	(machine_ops->machine_timer_irq_start)();
 }
-
 
 /** Halts CPU. */
@@ -105,5 +103,4 @@
 	(machine_ops->machine_irq_exception)(exc_no, istate);
 }
-
 
 /*
Index: kernel/arch/arm32/src/mm/page_fault.c
===================================================================
--- kernel/arch/arm32/src/mm/page_fault.c	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/src/mm/page_fault.c	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -42,5 +42,4 @@
 #include <interrupt.h>
 #include <print.h>
-
 
 /**
Index: kernel/arch/arm32/src/smc.c
===================================================================
--- kernel/arch/arm32/src/smc.c	(revision 4621d2311994bf63dea425ed923239d4ca1babc9)
+++ kernel/arch/arm32/src/smc.c	(revision 9b8be79e64f6d9051bd3e81c8c2f91ff32bb499f)
@@ -67,3 +67,2 @@
 	isb();
 }
-