Index: uspace/drv/bus/usb/xhci/debug.c
===================================================================
--- uspace/drv/bus/usb/xhci/debug.c	(revision 37b13175352b609c21874e45ccf2a0f997ee731a)
+++ uspace/drv/bus/usb/xhci/debug.c	(revision 9b56e528b2ea35994d53737b6861ea6e1d828386)
@@ -127,4 +127,19 @@
 	DUMP_REG(port, XHCI_PORT_DR);
 	DUMP_REG(port, XHCI_PORT_WPR);
+	DUMP_REG(port, XHCI_PORT_USB3_U1TO);
+	DUMP_REG(port, XHCI_PORT_USB3_U2TO);
+	DUMP_REG(port, XHCI_PORT_USB3_FLPMA);
+	DUMP_REG(port, XHCI_PORT_USB3_LEC);
+	DUMP_REG(port, XHCI_PORT_USB3_RLC);
+	DUMP_REG(port, XHCI_PORT_USB3_TLC);
+	DUMP_REG(port, XHCI_PORT_USB2_L1S);
+	DUMP_REG(port, XHCI_PORT_USB2_RWE);
+	DUMP_REG(port, XHCI_PORT_USB2_BESL);
+	DUMP_REG(port, XHCI_PORT_USB2_L1DS);
+	DUMP_REG(port, XHCI_PORT_USB2_HLE);
+	DUMP_REG(port, XHCI_PORT_USB2_TM);
+	DUMP_REG(port, XHCI_PORT_USB2_HIRDM);
+	DUMP_REG(port, XHCI_PORT_USB2_L1TO);
+	DUMP_REG(port, XHCI_PORT_USB2_BESLD);
 }
 
Index: uspace/drv/bus/usb/xhci/hw_struct/regs.h
===================================================================
--- uspace/drv/bus/usb/xhci/hw_struct/regs.h	(revision 37b13175352b609c21874e45ccf2a0f997ee731a)
+++ uspace/drv/bus/usb/xhci/hw_struct/regs.h	(revision 9b56e528b2ea35994d53737b6861ea6e1d828386)
@@ -300,6 +300,6 @@
 #define XHCI_PORT_WDE           portsc, 32,  FLAG, 26
 #define XHCI_PORT_WOE           portsc, 32,  FLAG, 27
-#define XHCI_PORT_DR            portsc, 32,  FLAG, 28
-#define XHCI_PORT_WPR           portsc, 32,  FLAG, 29
+#define XHCI_PORT_DR            portsc, 32,  FLAG, 30
+#define XHCI_PORT_WPR           portsc, 32,  FLAG, 31
 
 #define XHCI_PORT_USB3_U1TO   portpmsc, 32, RANGE,  7,  0
@@ -316,7 +316,7 @@
 #define XHCI_PORT_USB2_HLE    portpmsc, 32,  FLAG, 16
 #define XHCI_PORT_USB2_TM     portpmsc, 32, RANGE, 31, 28
-#define XHCI_PORT_USB2_HIRDM porthlmpc, 32, RANGE,  1,  0
-#define XHCI_PORT_USB2_L1TO  porthlmpc, 32, RANGE,  9,  2
-#define XHCI_PORT_USB2_BESLD porthlmpc, 32, RANGE, 13, 10
+#define XHCI_PORT_USB2_HIRDM porthlpmc, 32, RANGE,  1,  0
+#define XHCI_PORT_USB2_L1TO  porthlpmc, 32, RANGE,  9,  2
+#define XHCI_PORT_USB2_BESLD porthlpmc, 32, RANGE, 13, 10
 
 /**
Index: uspace/drv/bus/usb/xhci/rh.c
===================================================================
--- uspace/drv/bus/usb/xhci/rh.c	(revision 37b13175352b609c21874e45ccf2a0f997ee731a)
+++ uspace/drv/bus/usb/xhci/rh.c	(revision 9b56e528b2ea35994d53737b6861ea6e1d828386)
@@ -52,5 +52,5 @@
 
 /* This mask only lists registers, which imply port change. */
-static const uint32_t port_change_mask =
+static const uint32_t port_events_mask =
 	XHCI_REG_MASK(XHCI_PORT_CSC) |
 	XHCI_REG_MASK(XHCI_PORT_PEC) |
@@ -162,6 +162,10 @@
 	int err;
 	assert(rh);
-
 	assert(rh->devices_by_port[port_id - 1] == NULL);
+
+	if (!XHCI_REG_RD(&rh->hc->op_regs->portrs[port_id - 1], XHCI_PORT_PED)) {
+		usb_log_error("Cannot setup RH device: port is disabled.");
+		return EIO;
+	}
 
 	device_t *dev = hcd_ddf_fun_create(&rh->hc->base);
@@ -322,8 +326,16 @@
 	xhci_port_regs_t * const regs = &rh->hc->op_regs->portrs[port_id - 1];
 
-	uint32_t events = XHCI_REG_RD_FIELD(&regs->portsc, 32) & port_change_mask;
+	uint32_t events = XHCI_REG_RD_FIELD(&regs->portsc, 32) & port_events_mask;
 
 	while (events) {
-		XHCI_REG_SET_FIELD(&regs->portsc, events, 32);
+		/*
+		 * The PED bit in xHCI has RW1C semantics, which means that
+		 * writing 1 to it will disable the port. Which means all
+		 * standard mechanisms of register handling fails here.
+		 */
+		uint32_t portsc = XHCI_REG_RD_FIELD(&regs->portsc, 32);
+		portsc &= ~(port_events_mask | XHCI_REG_MASK(XHCI_PORT_PED)); // Clear events + PED
+		portsc |= events; // Add back events to assert them
+		XHCI_REG_WR_FIELD(&regs->portsc, portsc, 32);
 
 		if (events & XHCI_REG_MASK(XHCI_PORT_CSC)) {
@@ -346,5 +358,5 @@
 		
 		/* Make sure that PSCEG is 0 before exiting the loop. */
-		events = XHCI_REG_RD_FIELD(&regs->portsc, 32) & port_change_mask;
+		events = XHCI_REG_RD_FIELD(&regs->portsc, 32) & port_events_mask;
 	}