Changes in uspace/drv/bus/usb/ehci/res.c [d3dd96e:99e8fb7b] in mainline

File:

• uspace/drv/bus/usb/ehci/res.c (modified) (12 diffs)

uspace/drv/bus/usb/ehci/res.c

@@ -43 +43 @@
 #include <usb/debug.h>
 #include <device/hw_res_parsed.h>
-#include <device/pci.h>
+#include <pci_dev_iface.h>
 
 #include "res.h"
-#include "ehci_regs.h"
+
+#define HCC_PARAMS_OFFSET 0x8
+#define HCC_PARAMS_EECP_MASK 0xff
+#define HCC_PARAMS_EECP_OFFSET 8
+
+#define CMD_OFFSET 0x0
+#define STS_OFFSET 0x4
+#define INT_OFFSET 0x8
+#define CFG_OFFSET 0x40
+
+#define USBCMD_RUN 1
+#define USBSTS_HALTED (1 << 12)
 
 #define USBLEGSUP_OFFSET 0
@@ -55 +66 @@
 #define DEFAULT_WAIT 1000
 #define WAIT_STEP 10
+
+
+/** Get address of registers and IRQ for given device.
+ *
+ * @param[in] dev Device asking for the addresses.
+ * @param[out] mem_regs_p Pointer to the register range.
+ * @param[out] irq_no IRQ assigned to the device.
+ * @return Error code.
+ */
+int get_my_registers(ddf_dev_t *dev,
+    addr_range_t *mem_regs_p, int *irq_no)
+{
+        assert(dev);
+        
+        async_sess_t *parent_sess = devman_parent_device_connect(
+            EXCHANGE_SERIALIZE, ddf_dev_get_handle(dev), IPC_FLAG_BLOCKING);
+        if (!parent_sess)
+                return ENOMEM;
+        
+        hw_res_list_parsed_t hw_res;
+        hw_res_list_parsed_init(&hw_res);
+        const int ret = hw_res_get_list_parsed(parent_sess, &hw_res, 0);
+        async_hangup(parent_sess);
+        if (ret != EOK) {
+                return ret;
+        }
+
+        if (hw_res.irqs.count != 1 || hw_res.mem_ranges.count != 1) {
+                hw_res_list_parsed_clean(&hw_res);
+                return ENOENT;
+        }
+
+        if (mem_regs_p)
+                *mem_regs_p = hw_res.mem_ranges.ranges[0];
+        if (irq_no)
+                *irq_no = hw_res.irqs.irqs[0];
+
+        hw_res_list_parsed_clean(&hw_res);
+        return EOK;
+}
+
+/** Calls the PCI driver with a request to enable interrupts
+ *
+ * @param[in] device Device asking for interrupts
+ * @return Error code.
+ */
+int enable_interrupts(ddf_dev_t *device)
+{
+        async_sess_t *parent_sess = devman_parent_device_connect(
+            EXCHANGE_SERIALIZE, ddf_dev_get_handle(device), IPC_FLAG_BLOCKING);
+        if (!parent_sess)
+                return ENOMEM;
+        
+        const bool enabled = hw_res_enable_interrupt(parent_sess);
+        async_hangup(parent_sess);
+        
+        return enabled ? EOK : EIO;
+}
 
 /** Implements BIOS hands-off routine as described in EHCI spec
@@ -73 +142 @@
                 return ENOMEM;
 
-#define CHECK_RET_HANGUP_RETURN(ret, message...) \
-        if (ret != EOK) { \
-                usb_log_error(message); \
-                async_hangup(parent_sess); \
-                return ret; \
-        } else (void)0
-
         /* Read the first EEC. i.e. Legacy Support register */
         uint32_t usblegsup;
-        int ret = pci_config_space_read_32(parent_sess,
+        int rc = pci_config_space_read_32(parent_sess,
             eecp + USBLEGSUP_OFFSET, &usblegsup);
-        CHECK_RET_HANGUP_RETURN(ret,
-            "Failed to read USBLEGSUP: %s.\n", str_error(ret));
+        if (rc != EOK) {
+                usb_log_error("Failed to read USBLEGSUP: %s.\n",
+                    str_error(rc));
+                goto error;
+        }
+
         usb_log_debug("USBLEGSUP: %" PRIx32 ".\n", usblegsup);
 
@@ -91 +157 @@
          * byte. (OS Control semaphore)*/
         usb_log_debug("Requesting OS control.\n");
-        ret = pci_config_space_write_8(parent_sess,
+        rc = pci_config_space_write_8(parent_sess,
             eecp + USBLEGSUP_OFFSET + 3, 1);
-        CHECK_RET_HANGUP_RETURN(ret, "Failed to request OS EHCI control: %s.\n",
-            str_error(ret));
+        if (rc != EOK) {
+                usb_log_error("Failed to request OS EHCI control: %s.\n",
+                    str_error(rc));
+                goto error;
+        }
 
         size_t wait = 0;
         /* Wait for BIOS to release control. */
-        ret = pci_config_space_read_32(
+        rc = pci_config_space_read_32(
             parent_sess, eecp + USBLEGSUP_OFFSET, &usblegsup);
+        if (rc != EOK) {
+                usb_log_error("Failed reading PCI config space: %s.\n",
+                    str_error(rc));
+                goto error;
+        }
+
         while ((wait < DEFAULT_WAIT) && (usblegsup & USBLEGSUP_BIOS_CONTROL)) {
                 async_usleep(WAIT_STEP);
-                ret = pci_config_space_read_32(parent_sess,
+                rc = pci_config_space_read_32(parent_sess,
                     eecp + USBLEGSUP_OFFSET, &usblegsup);
+                if (rc != EOK) {
+                        usb_log_error("Failed reading PCI config space: %s.\n",
+                            str_error(rc));
+                        goto error;
+                }
                 wait += WAIT_STEP;
         }
@@ -116 +196 @@
         usb_log_warning( "BIOS failed to release control after "
             "%zu usecs, force it.\n", wait);
-        ret = pci_config_space_write_32(parent_sess,
+        rc = pci_config_space_write_32(parent_sess,
             eecp + USBLEGSUP_OFFSET, USBLEGSUP_OS_CONTROL);
-        CHECK_RET_HANGUP_RETURN(ret, "Failed to force OS control: "
-            "%s.\n", str_error(ret));
+        if (rc != EOK) {
+                usb_log_error("Failed to force OS control: "
+                    "%s.\n", str_error(rc));
+                goto error;
+        }
+
         /*
          * Check capability type here, value of 01h identifies the capability
@@ -129 +213 @@
                 /* Read the second EEC Legacy Support and Control register */
                 uint32_t usblegctlsts;
-                ret = pci_config_space_read_32(parent_sess,
+                rc = pci_config_space_read_32(parent_sess,
                     eecp + USBLEGCTLSTS_OFFSET, &usblegctlsts);
-                CHECK_RET_HANGUP_RETURN(ret, "Failed to get USBLEGCTLSTS: %s.\n",
-                    str_error(ret));
+                if (rc != EOK) {
+                        usb_log_error("Failed to get USBLEGCTLSTS: %s.\n",
+                            str_error(rc));
+                        goto error;
+                }
+
                 usb_log_debug("USBLEGCTLSTS: %" PRIx32 ".\n", usblegctlsts);
                 /*
@@ -139 +227 @@
                  * interfering. NOTE: Three upper bits are WC
                  */
-                ret = pci_config_space_write_32(parent_sess,
+                rc = pci_config_space_write_32(parent_sess,
                     eecp + USBLEGCTLSTS_OFFSET, 0xe0000000);
-                CHECK_RET_HANGUP_RETURN(ret, "Failed(%d) zero USBLEGCTLSTS.\n", ret);
+                if (rc != EOK) {
+                        usb_log_error("Failed(%d) zero USBLEGCTLSTS.\n", rc);
+                        goto error;
+                }
+
                 udelay(10);
-                ret = pci_config_space_read_32(parent_sess,
+                rc = pci_config_space_read_32(parent_sess,
                     eecp + USBLEGCTLSTS_OFFSET, &usblegctlsts);
-                CHECK_RET_HANGUP_RETURN(ret, "Failed to get USBLEGCTLSTS 2: %s.\n",
-                    str_error(ret));
+                if (rc != EOK) {
+                        usb_log_error("Failed to get USBLEGCTLSTS 2: %s.\n",
+                            str_error(rc));
+                        goto error;
+                }
+
                 usb_log_debug("Zeroed USBLEGCTLSTS: %" PRIx32 ".\n",
                     usblegctlsts);
@@ -152 +248 @@
 
         /* Read again Legacy Support register */
-        ret = pci_config_space_read_32(parent_sess,
+        rc = pci_config_space_read_32(parent_sess,
             eecp + USBLEGSUP_OFFSET, &usblegsup);
-        CHECK_RET_HANGUP_RETURN(ret, "Failed to read USBLEGSUP: %s.\n",
-            str_error(ret));
+        if (rc != EOK) {
+                usb_log_error("Failed to read USBLEGSUP: %s.\n",
+                    str_error(rc));
+                goto error;
+        }
+
         usb_log_debug("USBLEGSUP: %" PRIx32 ".\n", usblegsup);
         async_hangup(parent_sess);
         return EOK;
-#undef CHECK_RET_HANGUP_RETURN
+error:
+        async_hangup(parent_sess);
+        return rc;
 }
 
@@ -169 +271 @@
         /* Map EHCI registers */
         void *regs = NULL;
-        int ret = pio_enable_range(reg_range, &regs);
-        if (ret != EOK) {
+        int rc = pio_enable_range(reg_range, &regs);
+        if (rc != EOK) {
                 usb_log_error("Failed to map registers %p: %s.\n",
-                    RNGABSPTR(*reg_range), str_error(ret));
-                return ret;
+                    RNGABSPTR(*reg_range), str_error(rc));
+                return rc;
         }
 
         usb_log_debug2("Registers mapped at: %p.\n", regs);
 
-        ehci_caps_regs_t *ehci_caps = regs;
-
-        const uint32_t hcc_params = EHCI_RD(ehci_caps->hccparams);
+        const uint32_t hcc_params =
+            *(uint32_t*)(regs + HCC_PARAMS_OFFSET);
         usb_log_debug("Value of hcc params register: %x.\n", hcc_params);
 
@@ -186 +287 @@
          * position of EEC registers (points to PCI config space) */
         const uint32_t eecp =
-            (hcc_params >> EHCI_CAPS_HCC_EECP_SHIFT) & EHCI_CAPS_HCC_EECP_MASK;
+            (hcc_params >> HCC_PARAMS_EECP_OFFSET) & HCC_PARAMS_EECP_MASK;
         usb_log_debug("Value of EECP: %x.\n", eecp);
 
-        ret = disable_extended_caps(device, eecp);
-        if (ret != EOK) {
+        rc = disable_extended_caps(device, eecp);
+        if (rc != EOK) {
                 usb_log_error("Failed to disable extended capabilities: %s.\n",
-                    str_error(ret));
-                return ret;
-        }
-
+                    str_error(rc));
+                return rc;
+        }
 
         /*
@@ -202 +302 @@
 
         /* Get size of capability registers in memory space. */
-        const unsigned operation_offset = EHCI_RD8(ehci_caps->caplength);
+        const unsigned operation_offset = *(uint8_t*)regs;
         usb_log_debug("USBCMD offset: %d.\n", operation_offset);
 
-        ehci_regs_t *ehci_regs = regs + operation_offset;
-
-        usb_log_debug("USBCMD value: %x.\n", EHCI_RD(ehci_regs->usbcmd));
-        if (EHCI_RD(ehci_regs->usbcmd) & USB_CMD_RUN_FLAG) {
-                EHCI_WR(ehci_regs->usbintr, 0); /* disable all interrupts */
-                EHCI_WR(ehci_regs->usbsts, 0x3f); /* ack all interrupts */
-                EHCI_WR(ehci_regs->configflag, 0); /* release RH ports */
-                EHCI_WR(ehci_regs->usbcmd, 0);
+        /* Zero USBCMD register. */
+        volatile uint32_t *usbcmd =
+            (uint32_t*)((uint8_t*)regs + operation_offset + CMD_OFFSET);
+        volatile uint32_t *usbsts =
+            (uint32_t*)((uint8_t*)regs + operation_offset + STS_OFFSET);
+        volatile uint32_t *usbconf =
+            (uint32_t*)((uint8_t*)regs + operation_offset + CFG_OFFSET);
+        volatile uint32_t *usbint =
+            (uint32_t*)((uint8_t*)regs + operation_offset + INT_OFFSET);
+        usb_log_debug("USBCMD value: %x.\n", *usbcmd);
+        if (*usbcmd & USBCMD_RUN) {
+                *usbsts = 0x3f; /* ack all interrupts */
+                *usbint = 0; /* disable all interrupts */
+                *usbconf = 0; /* release control of RH ports */
+
+                *usbcmd = 0;
                 /* Wait until hc is halted */
-                while ((EHCI_RD(ehci_regs->usbsts) & USB_STS_HC_HALTED_FLAG) == 0);
+                while ((*usbsts & USBSTS_HALTED) == 0);
                 usb_log_info("EHCI turned off.\n");
         } else {
@@ -224 +332 @@
             "\t USBINT(%p): %x(0x0 = no interrupts).\n"
             "\t CONFIG(%p): %x(0x0 = ports controlled by companion hc).\n",
-            &ehci_regs->usbcmd, EHCI_RD(ehci_regs->usbcmd),
-            &ehci_regs->usbsts, EHCI_RD(ehci_regs->usbsts),
-            &ehci_regs->usbintr, EHCI_RD(ehci_regs->usbintr),
-            &ehci_regs->configflag, EHCI_RD(ehci_regs->configflag));
-
-        return ret;
+            usbcmd, *usbcmd, usbsts, *usbsts, usbint, *usbint, usbconf,*usbconf);
+
+        return rc;
 }