Index: kernel/arch/amd64/include/asm.h
===================================================================
--- kernel/arch/amd64/include/asm.h	(revision 4df7d3af00760e79e8a05a4eeab52f11c441eb34)
+++ kernel/arch/amd64/include/asm.h	(revision 99d6fd07a4e12eb667d2cfa2d3fdb3b5f63800b2)
@@ -343,5 +343,5 @@
  *
  */
-static inline void gdtr_load(struct ptr_16_64 *gdtr_reg)
+static inline void gdtr_load(ptr_16_64_t *gdtr_reg)
 {
 	asm volatile (
@@ -356,5 +356,5 @@
  *
  */
-static inline void gdtr_store(struct ptr_16_64 *gdtr_reg)
+static inline void gdtr_store(ptr_16_64_t *gdtr_reg)
 {
 	asm volatile (
@@ -369,5 +369,5 @@
  *
  */
-static inline void idtr_load(struct ptr_16_64 *idtr_reg)
+static inline void idtr_load(ptr_16_64_t *idtr_reg)
 {
 	asm volatile (
Index: kernel/arch/amd64/include/cpu.h
===================================================================
--- kernel/arch/amd64/include/cpu.h	(revision 4df7d3af00760e79e8a05a4eeab52f11c441eb34)
+++ kernel/arch/amd64/include/cpu.h	(revision 99d6fd07a4e12eb667d2cfa2d3fdb3b5f63800b2)
@@ -36,7 +36,7 @@
 #define KERN_amd64_CPU_H_
 
-#define RFLAGS_IF	(1 << 9)
-#define RFLAGS_DF	(1 << 10)
-#define RFLAGS_RF	(1 << 16)
+#define RFLAGS_IF  (1 << 9)
+#define RFLAGS_DF  (1 << 10)
+#define RFLAGS_RF  (1 << 16)
 
 #define EFER_MSR_NUM    0xc0000080
@@ -63,15 +63,13 @@
 	int model;
 	int stepping;
-	struct tss *tss;
+	tss_t *tss;
 	
-	count_t iomapver_copy;	/** Copy of TASK's I/O Permission bitmap generation count. */
+	count_t iomapver_copy;  /** Copy of TASK's I/O Permission bitmap generation count. */
 } cpu_arch_t;
 
 struct star_msr {
-	
 };
 
 struct lstar_msr {
-	
 };
 
Index: kernel/arch/amd64/include/pm.h
===================================================================
--- kernel/arch/amd64/include/pm.h	(revision 4df7d3af00760e79e8a05a4eeab52f11c441eb34)
+++ kernel/arch/amd64/include/pm.h	(revision 99d6fd07a4e12eb667d2cfa2d3fdb3b5f63800b2)
@@ -27,5 +27,5 @@
  */
 
-/** @addtogroup amd64	
+/** @addtogroup amd64
  * @{
  */
@@ -37,61 +37,58 @@
 
 #ifndef __ASM__
-#	include <arch/types.h>
-#	include <arch/context.h>
+	#include <arch/types.h>
+	#include <arch/context.h>
 #endif
 
-#define IDT_ITEMS 64
-#define GDT_ITEMS 8
+#define IDT_ITEMS  64
+#define GDT_ITEMS  8
 
 
-#define NULL_DES	0
-/* Warning: Do not reorder next items, unless you look into syscall.c!!! */
-#define KTEXT_DES	1
-#define	KDATA_DES	2
-#define UDATA_DES	3
-#define UTEXT_DES	4
-#define KTEXT32_DES     5
-/* EndOfWarning */
-#define TSS_DES		6
-
-
+#define NULL_DES     0
+/* Warning: Do not reorder the following items, unless you look into syscall.c! */
+#define KTEXT_DES    1
+#define KDATA_DES    2
+#define UDATA_DES    3
+#define UTEXT_DES    4
+#define KTEXT32_DES  5
+/* End of warning */
+#define TSS_DES      6
 
 #ifdef CONFIG_FB
 
-#define VESA_INIT_DES		8
-#define VESA_INIT_SEGMENT 0x8000
-#undef GDT_ITEMS 
-#define GDT_ITEMS 9
+#define VESA_INIT_DES      8
+#define VESA_INIT_SEGMENT  0x8000
 
-#endif /*CONFIG_FB*/
+#undef GDT_ITEMS
+#define GDT_ITEMS  9
 
+#endif /* CONFIG_FB */
 
+#define gdtselector(des)  ((des) << 3)
+#define idtselector(des)  ((des) << 4)
 
-#define gdtselector(des)	((des) << 3)
-#define idtselector(des)	((des) << 4)
+#define PL_KERNEL  0
+#define PL_USER    3
 
-#define PL_KERNEL	0
-#define PL_USER		3
+#define AR_PRESENT   ( 1 << 7)
+#define AR_DATA       (2 << 3)
+#define AR_CODE       (3 << 3)
+#define AR_WRITABLE   (1 << 1)
+#define AR_READABLE   (1 << 1)
+#define AR_TSS        (0x09)
+#define AR_INTERRUPT  (0x0e)
+#define AR_TRAP       (0x0f)
 
-#define AR_PRESENT	(1<<7)
-#define AR_DATA		(2<<3)
-#define AR_CODE		(3<<3)
-#define AR_WRITABLE	(1<<1)
-#define AR_READABLE     (1<<1)
-#define AR_TSS		(0x9)
-#define AR_INTERRUPT    (0xe)
-#define AR_TRAP         (0xf)
+#define DPL_KERNEL  (PL_KERNEL << 5)
+#define DPL_USER    (PL_USER << 5)
 
-#define DPL_KERNEL	(PL_KERNEL<<5)
-#define DPL_USER	(PL_USER<<5)
+#define TSS_BASIC_SIZE  104
+#define TSS_IOMAP_SIZE  (16 * 1024 + 1)  /* 16K for bitmap + 1 terminating byte for convenience */
 
-#define TSS_BASIC_SIZE	104
-#define TSS_IOMAP_SIZE	(16*1024+1)	/* 16K for bitmap + 1 terminating byte for convenience */
-
-#define IO_PORTS	(64*1024)
+#define IO_PORTS  (64 * 1024)
 
 #ifndef __ASM__
 
-struct descriptor {
+typedef struct {
 	unsigned limit_0_15: 16;
 	unsigned base_0_15: 16;
@@ -104,8 +101,7 @@
 	unsigned granularity : 1;
 	unsigned base_24_31: 8;
-} __attribute__ ((packed));
-typedef struct descriptor descriptor_t;
+} __attribute__ ((packed)) descriptor_t;
 
-struct tss_descriptor {
+typedef struct {
 	unsigned limit_0_15: 16;
 	unsigned base_0_15: 16;
@@ -122,8 +118,7 @@
 	unsigned base_32_63 : 32;
 	unsigned  : 32;
-} __attribute__ ((packed));
-typedef struct tss_descriptor tss_descriptor_t;
+} __attribute__ ((packed)) tss_descriptor_t;
 
-struct idescriptor {
+typedef struct {
 	unsigned offset_0_15: 16;
 	unsigned selector: 16;
@@ -136,20 +131,17 @@
 	unsigned offset_32_63: 32;
 	unsigned  : 32;
-} __attribute__ ((packed));
-typedef struct idescriptor idescriptor_t;
+} __attribute__ ((packed)) idescriptor_t;
 
-struct ptr_16_64 {
+typedef struct {
 	uint16_t limit;
 	uint64_t base;
-} __attribute__ ((packed));
-typedef struct ptr_16_64 ptr_16_64_t;
+} __attribute__ ((packed)) ptr_16_64_t;
 
-struct ptr_16_32 {
+typedef struct {
 	uint16_t limit;
 	uint32_t base;
-} __attribute__ ((packed));
-typedef struct ptr_16_32 ptr_16_32_t;
+} __attribute__ ((packed)) ptr_16_32_t;
 
-struct tss {
+typedef struct {
 	uint32_t reserve1;
 	uint64_t rsp0;
@@ -168,6 +160,5 @@
 	uint16_t iomap_base;
 	uint8_t iomap[TSS_IOMAP_SIZE];
-} __attribute__ ((packed));
-typedef struct tss tss_t;
+} __attribute__ ((packed)) tss_t;
 
 extern tss_t *tss_p;
Index: kernel/arch/amd64/src/ddi/ddi.c
===================================================================
--- kernel/arch/amd64/src/ddi/ddi.c	(revision 4df7d3af00760e79e8a05a4eeab52f11c441eb34)
+++ kernel/arch/amd64/src/ddi/ddi.c	(revision 99d6fd07a4e12eb667d2cfa2d3fdb3b5f63800b2)
@@ -58,13 +58,13 @@
 {
 	count_t bits;
-
+	
 	bits = ioaddr + size;
 	if (bits > IO_PORTS)
 		return ENOENT;
-
+	
 	if (task->arch.iomap.bits < bits) {
 		bitmap_t oldiomap;
 		uint8_t *newmap;
-	
+		
 		/*
 		 * The I/O permission bitmap is too small and needs to be grown.
@@ -78,5 +78,5 @@
 		    task->arch.iomap.bits);
 		bitmap_initialize(&task->arch.iomap, newmap, bits);
-
+		
 		/*
 		 * Mark the new range inaccessible.
@@ -84,9 +84,9 @@
 		bitmap_set_range(&task->arch.iomap, oldiomap.bits,
 		    bits - oldiomap.bits);
-
+		
 		/*
 		 * In case there really existed smaller iomap,
 		 * copy its contents and deallocate it.
-		 */		
+		 */
 		if (oldiomap.bits) {
 			bitmap_copy(&task->arch.iomap, &oldiomap,
@@ -95,15 +95,15 @@
 		}
 	}
-
+	
 	/*
 	 * Enable the range and we are done.
 	 */
 	bitmap_clear_range(&task->arch.iomap, (index_t) ioaddr, (count_t) size);
-
+	
 	/*
 	 * Increment I/O Permission bitmap generation counter.
 	 */
 	task->arch.iomapver++;
-
+	
 	return 0;
 }
@@ -123,5 +123,5 @@
 	tss_descriptor_t *tss_desc;
 	count_t ver;
-
+	
 	/* First, copy the I/O Permission Bitmap. */
 	spinlock_lock(&TASK->lock);
@@ -141,5 +141,5 @@
 	}
 	spinlock_unlock(&TASK->lock);
-
+	
 	/*
 	 * Second, adjust TSS segment limit.
@@ -152,8 +152,8 @@
 	
 	/*
-         * Before we load new TSS limit, the current TSS descriptor
-         * type must be changed to describe inactive TSS.
-         */
-	tss_desc = (tss_descriptor_t *)	&gdt_p[TSS_DES];
+	 * Before we load new TSS limit, the current TSS descriptor
+	 * type must be changed to describe inactive TSS.
+	 */
+	tss_desc = (tss_descriptor_t *) &gdt_p[TSS_DES];
 	tss_desc->type = AR_TSS;
 	tr_load(gdtselector(TSS_DES));
Index: kernel/arch/amd64/src/pm.c
===================================================================
--- kernel/arch/amd64/src/pm.c	(revision 4df7d3af00760e79e8a05a4eeab52f11c441eb34)
+++ kernel/arch/amd64/src/pm.c	(revision 99d6fd07a4e12eb667d2cfa2d3fdb3b5f63800b2)
@@ -138,6 +138,6 @@
 void gdt_tss_setlimit(descriptor_t *d, uint32_t limit)
 {
-	struct tss_descriptor *td = (tss_descriptor_t *) d;
-
+	tss_descriptor_t *td = (tss_descriptor_t *) d;
+	
 	td->limit_0_15 = limit & 0xffff;
 	td->limit_16_19 = (limit >> 16) & 0xf;
@@ -186,12 +186,12 @@
 void pm_init(void)
 {
-	descriptor_t *gdt_p = (struct descriptor *) gdtr.base;
+	descriptor_t *gdt_p = (descriptor_t *) gdtr.base;
 	tss_descriptor_t *tss_desc;
-
+	
 	/*
 	 * Each CPU has its private GDT and TSS.
 	 * All CPUs share one IDT.
 	 */
-
+	
 	if (config.cpu_active == 1) {
 		idt_init();
@@ -201,18 +201,17 @@
 		 */
 		tss_p = &tss;
-	}
-	else {
+	} else {
 		/* We are going to use malloc, which may return
 		 * non boot-mapped pointer, initialize the CR3 register
 		 * ahead of page_init */
 		write_cr3((uintptr_t) AS_KERNEL->genarch.page_table);
-
-		tss_p = (struct tss *) malloc(sizeof(tss_t), FRAME_ATOMIC);
+		
+		tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
 		if (!tss_p)
 			panic("Cannot allocate TSS.");
 	}
-
+	
 	tss_initialize(tss_p);
-
+	
 	tss_desc = (tss_descriptor_t *) (&gdt_p[TSS_DES]);
 	tss_desc->present = 1;
@@ -222,5 +221,5 @@
 	gdt_tss_setbase(&gdt_p[TSS_DES], (uintptr_t) tss_p);
 	gdt_tss_setlimit(&gdt_p[TSS_DES], TSS_BASIC_SIZE - 1);
-
+	
 	gdtr_load(&gdtr);
 	idtr_load(&idtr);