Changeset 99c2c69e in mainline for uspace/drv/bus


Ignore:
Timestamp:
2013-09-13T00:36:30Z (13 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
67fbd5e
Parents:
7f84430 (diff), 11d41be5 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

mainline changes

Location:
uspace/drv/bus
Files:
24 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/bus/isa/i8237.c

    r7f84430 r99c2c69e  
    279279 *
    280280 * @return Error code.
     281 *
    281282 */
    282283static inline int dma_controller_init(dma_controller_t *controller)
  • uspace/drv/bus/isa/isa.c

    r7f84430 r99c2c69e  
    6565#include <ddf/log.h>
    6666#include <ops/hw_res.h>
     67#include <ops/pio_window.h>
    6768
    6869#include <device/hw_res.h>
     70#include <device/pio_window.h>
    6971
    7072#include "i8237.h"
     
    7981        ddf_dev_t *dev;
    8082        ddf_fun_t *fctl;
     83        pio_window_t pio_win;
    8184        list_t functions;
    8285} isa_bus_t;
     
    102105}
    103106
    104 static hw_resource_list_t *isa_get_fun_resources(ddf_fun_t *fnode)
    105 {
    106         isa_fun_t *isa = isa_fun(fnode);
    107         assert(isa);
    108 
    109         return &isa->hw_resources;
     107static hw_resource_list_t *isa_fun_get_resources(ddf_fun_t *fnode)
     108{
     109        isa_fun_t *fun = isa_fun(fnode);
     110        assert(fun);
     111
     112        return &fun->hw_resources;
    110113}
    111114
     
    114117        /* This is an old ugly way, copied from pci driver */
    115118        assert(fnode);
    116         isa_fun_t *isa = isa_fun(fnode);
    117         assert(isa);
     119        isa_fun_t *fun = isa_fun(fnode);
     120        assert(fun);
    118121
    119122        sysarg_t apic;
     
    131134                return false;
    132135
    133         const hw_resource_list_t *res = &isa->hw_resources;
     136        const hw_resource_list_t *res = &fun->hw_resources;
    134137        assert(res);
    135138        for (size_t i = 0; i < res->count; ++i) {
     
    157160{
    158161        assert(fnode);
    159         isa_fun_t *isa = isa_fun(fnode);
    160         assert(isa);
    161         const hw_resource_list_t *res = &isa->hw_resources;
     162        isa_fun_t *fun = isa_fun(fnode);
     163        assert(fun);
     164        const hw_resource_list_t *res = &fun->hw_resources;
    162165        assert(res);
    163166
     
    180183        assert(size);
    181184        assert(fnode);
    182         isa_fun_t *isa = isa_fun(fnode);
    183         assert(isa);
    184         const hw_resource_list_t *res = &isa->hw_resources;
     185        isa_fun_t *fun = isa_fun(fnode);
     186        assert(fun);
     187        const hw_resource_list_t *res = &fun->hw_resources;
    185188        assert(res);
    186189
     
    199202
    200203static hw_res_ops_t isa_fun_hw_res_ops = {
    201         .get_resource_list = isa_get_fun_resources,
     204        .get_resource_list = isa_fun_get_resources,
    202205        .enable_interrupt = isa_fun_enable_interrupt,
    203206        .dma_channel_setup = isa_fun_setup_dma,
     
    205208};
    206209
     210static pio_window_t *isa_fun_get_pio_window(ddf_fun_t *fnode)
     211{
     212        ddf_dev_t *dev = ddf_fun_get_dev(fnode);
     213        isa_bus_t *isa = isa_bus(dev);
     214        assert(isa);
     215
     216        return &isa->pio_win;
     217}
     218
     219static pio_window_ops_t isa_fun_pio_window_ops = {
     220        .get_pio_window = isa_fun_get_pio_window
     221};
     222
    207223static ddf_dev_ops_t isa_fun_ops= {
    208224        .interfaces[HW_RES_DEV_IFACE] = &isa_fun_hw_res_ops,
     225        .interfaces[PIO_WINDOW_DEV_IFACE] = &isa_fun_pio_window_ops,
    209226};
    210227
     
    405422        hw_resource_t *resources = fun->hw_resources.resources;
    406423
     424        isa_bus_t *isa = isa_bus(ddf_fun_get_dev(fun->fnode));
     425
    407426        if (count < ISA_MAX_HW_RES) {
    408427                resources[count].type = IO_RANGE;
    409428                resources[count].res.io_range.address = addr;
     429                resources[count].res.io_range.address += isa->pio_win.io.base;
    410430                resources[count].res.io_range.size = len;
     431                resources[count].res.io_range.relative = false;
    411432                resources[count].res.io_range.endianness = LITTLE_ENDIAN;
    412433
     
    604625static int isa_dev_add(ddf_dev_t *dev)
    605626{
     627        async_sess_t *sess;
     628        int rc;
     629
    606630        ddf_msg(LVL_DEBUG, "isa_dev_add, device handle = %d",
    607631            (int) ddf_dev_get_handle(dev));
     
    614638        isa->dev = dev;
    615639        list_initialize(&isa->functions);
     640
     641        sess = ddf_dev_parent_sess_create(dev, EXCHANGE_SERIALIZE);
     642        if (sess == NULL) {
     643                ddf_msg(LVL_ERROR, "isa_dev_add failed to connect to the "
     644                    "parent driver.");
     645                return ENOENT;
     646        }
     647
     648        rc = pio_window_get(sess, &isa->pio_win);
     649        if (rc != EOK) {
     650                ddf_msg(LVL_ERROR, "isa_dev_add failed to get PIO window "
     651                    "for the device.");
     652                return rc;
     653        }       
    616654
    617655        /* Make the bus device more visible. Does not do anything. */
  • uspace/drv/bus/pci/pciintel/pci.c

    r7f84430 r99c2c69e  
    5757#include <ops/hw_res.h>
    5858#include <device/hw_res.h>
     59#include <ops/pio_window.h>
     60#include <device/pio_window.h>
    5961#include <ddi.h>
    6062#include <pci_dev_iface.h>
     
    141143}
    142144
     145static pio_window_t *pciintel_get_pio_window(ddf_fun_t *fnode)
     146{
     147        pci_fun_t *fun = pci_fun(fnode);
     148       
     149        if (fun == NULL)
     150                return NULL;
     151        return &fun->pio_window;
     152}
     153
     154
    143155static int pci_config_space_write_32(ddf_fun_t *fun, uint32_t address,
    144156    uint32_t data)
     
    198210        .get_resource_list = &pciintel_get_resources,
    199211        .enable_interrupt = &pciintel_enable_interrupt,
     212};
     213
     214static pio_window_ops_t pciintel_pio_window_ops = {
     215        .get_pio_window = &pciintel_get_pio_window
    200216};
    201217
     
    211227static ddf_dev_ops_t pci_fun_ops = {
    212228        .interfaces[HW_RES_DEV_IFACE] = &pciintel_hw_res_ops,
     229        .interfaces[PIO_WINDOW_DEV_IFACE] = &pciintel_pio_window_ops,
    213230        .interfaces[PCI_DEV_IFACE] = &pci_dev_ops
    214231};
     
    233250static void pci_conf_read(pci_fun_t *fun, int reg, uint8_t *buf, size_t len)
    234251{
     252        const uint32_t conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg);
    235253        pci_bus_t *bus = pci_bus_from_fun(fun);
     254        uint32_t val;
    236255       
    237256        fibril_mutex_lock(&bus->conf_mutex);
    238        
    239         const uint32_t conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg);
    240         void *addr = bus->conf_data_port + (reg & 3);
    241        
    242         pio_write_32(bus->conf_addr_port, host2uint32_t_le(conf_addr));
    243        
     257
     258        pio_write_32(bus->conf_addr_reg, host2uint32_t_le(conf_addr));
     259
     260        /*
     261         * Always read full 32-bits from the PCI conf_data_port register and
     262         * get the desired portion of it afterwards. Some architectures do not
     263         * support shorter PIO reads offset from this register.
     264         */
     265        val = uint32_t_le2host(pio_read_32(bus->conf_data_reg));
     266
    244267        switch (len) {
    245268        case 1:
    246                 /* No endianness change for 1 byte */
    247                 buf[0] = pio_read_8(addr);
     269                *buf = (uint8_t) (val >> ((reg & 3) * 8));
    248270                break;
    249271        case 2:
    250                 ((uint16_t *) buf)[0] = uint16_t_le2host(pio_read_16(addr));
     272                *((uint16_t *) buf) = (uint16_t) (val >> ((reg & 3)) * 8);
    251273                break;
    252274        case 4:
    253                 ((uint32_t *) buf)[0] = uint32_t_le2host(pio_read_32(addr));
     275                *((uint32_t *) buf) = (uint32_t) val;
    254276                break;
    255277        }
     
    260282static void pci_conf_write(pci_fun_t *fun, int reg, uint8_t *buf, size_t len)
    261283{
     284        const uint32_t conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg);
    262285        pci_bus_t *bus = pci_bus_from_fun(fun);
     286        uint32_t val;
    263287       
    264288        fibril_mutex_lock(&bus->conf_mutex);
    265        
    266         const uint32_t conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg);
    267         void *addr = bus->conf_data_port + (reg & 3);
    268        
    269         pio_write_32(bus->conf_addr_port, host2uint32_t_le(conf_addr));
     289
     290        /*
     291         * Prepare to write full 32-bits to the PCI conf_data_port register.
     292         * Some architectures do not support shorter PIO writes offset from this
     293         * register.
     294         */
     295
     296        if (len < 4) {
     297                /*
     298                 * We have fewer than full 32-bits, so we need to read the
     299                 * missing bits first.
     300                 */
     301                pio_write_32(bus->conf_addr_reg, host2uint32_t_le(conf_addr));
     302                val = uint32_t_le2host(pio_read_32(bus->conf_data_reg));
     303        }
    270304       
    271305        switch (len) {
    272306        case 1:
    273                 /* No endianness change for 1 byte */
    274                 pio_write_8(addr, buf[0]);
     307                val &= ~(0xffU << ((reg & 3) * 8));
     308                val |= *buf << ((reg & 3) * 8);
    275309                break;
    276310        case 2:
    277                 pio_write_16(addr, host2uint16_t_le(((uint16_t *) buf)[0]));
     311                val &= ~(0xffffU << ((reg & 3) * 8));
     312                val |= *((uint16_t *) buf) << ((reg & 3) * 8);
    278313                break;
    279314        case 4:
    280                 pio_write_32(addr, host2uint32_t_le(((uint32_t *) buf)[0]));
     315                val = *((uint32_t *) buf);
    281316                break;
    282317        }
     318
     319        pio_write_32(bus->conf_addr_reg, host2uint32_t_le(conf_addr));
     320        pio_write_32(bus->conf_data_reg, host2uint32_t_le(val));
    283321       
    284322        fibril_mutex_unlock(&bus->conf_mutex);
     
    411449                hw_resources[count].res.io_range.address = range_addr;
    412450                hw_resources[count].res.io_range.size = range_size;
     451                hw_resources[count].res.io_range.relative = true;
    413452                hw_resources[count].res.io_range.endianness = LITTLE_ENDIAN;
    414453        } else {
     
    416455                hw_resources[count].res.mem_range.address = range_addr;
    417456                hw_resources[count].res.mem_range.size = range_size;
     457                hw_resources[count].res.mem_range.relative = false;
    418458                hw_resources[count].res.mem_range.endianness = LITTLE_ENDIAN;
    419459        }
     
    433473{
    434474        /* Value of the BAR */
    435         uint32_t val, mask;
     475        uint32_t val;
     476        uint32_t bar;
     477        uint32_t mask;
     478
    436479        /* IO space address */
    437480        bool io;
     
    471514        /* Get the address mask. */
    472515        pci_conf_write_32(fun, addr, 0xffffffff);
    473         mask &= pci_conf_read_32(fun, addr);
    474        
     516        bar = pci_conf_read_32(fun, addr);
     517
     518        /*
     519         * Unimplemented BARs read back as all 0's.
     520         */
     521        if (!bar)
     522                return addr + (addrw64 ? 8 : 4);
     523
     524        mask &= bar;   
     525
    475526        /* Restore the original value. */
    476527        pci_conf_write_32(fun, addr, val);
     
    520571{
    521572        uint8_t irq = pci_conf_read_8(fun, PCI_BRIDGE_INT_LINE);
    522         if (irq != 0xff)
     573        uint8_t pin = pci_conf_read_8(fun, PCI_BRIDGE_INT_PIN);
     574
     575        if (pin != 0 && irq != 0xff)
    523576                pci_add_interrupt(fun, irq);
    524577}
     
    583636                        pci_read_bars(fun);
    584637                        pci_read_interrupt(fun);
     638
     639                        /* Propagate the PIO window to the function. */
     640                        fun->pio_window = bus->pio_win;
    585641                       
    586642                        ddf_fun_set_ops(fun->fnode, &pci_fun_ops);
     
    613669static int pci_dev_add(ddf_dev_t *dnode)
    614670{
     671        hw_resource_list_t hw_resources;
    615672        pci_bus_t *bus = NULL;
    616673        ddf_fun_t *ctl = NULL;
     
    638695                goto fail;
    639696        }
    640        
    641         hw_resource_list_t hw_resources;
     697
     698        rc = pio_window_get(sess, &bus->pio_win);
     699        if (rc != EOK) {
     700                ddf_msg(LVL_ERROR, "pci_dev_add failed to get PIO window "
     701                    "for the device.");
     702                goto fail;
     703        }
    642704       
    643705        rc = hw_res_get_resource_list(sess, &hw_resources);
     
    662724            hw_resources.resources[1].res.io_range.address);
    663725       
    664         bus->conf_io_addr =
    665             (uint32_t) hw_resources.resources[0].res.io_range.address;
    666         bus->conf_io_data =
    667             (uint32_t) hw_resources.resources[1].res.io_range.address;
    668        
    669         if (pio_enable((void *)(uintptr_t)bus->conf_io_addr, 4,
    670             &bus->conf_addr_port)) {
     726        if (pio_enable_resource(&bus->pio_win, &hw_resources.resources[0],
     727            (void **) &bus->conf_addr_reg)) {
    671728                ddf_msg(LVL_ERROR, "Failed to enable configuration ports.");
    672729                rc = EADDRNOTAVAIL;
    673730                goto fail;
    674731        }
    675         if (pio_enable((void *)(uintptr_t)bus->conf_io_data, 4,
    676             &bus->conf_data_port)) {
     732        if (pio_enable_resource(&bus->pio_win, &hw_resources.resources[1],
     733            (void **) &bus->conf_data_reg)) {
    677734                ddf_msg(LVL_ERROR, "Failed to enable configuration ports.");
    678735                rc = EADDRNOTAVAIL;
     
    729786{
    730787        ddf_log_init(NAME);
    731         pci_fun_ops.interfaces[HW_RES_DEV_IFACE] = &pciintel_hw_res_ops;
    732         pci_fun_ops.interfaces[PCI_DEV_IFACE] = &pci_dev_ops;
    733788}
    734789
  • uspace/drv/bus/pci/pciintel/pci.h

    r7f84430 r99c2c69e  
    4040#include "pci_regs.h"
    4141
    42 #define PCI_MAX_HW_RES 8
     42#define PCI_MAX_HW_RES 10
    4343
    4444typedef struct pciintel_bus {
    4545        /** DDF device node */
    4646        ddf_dev_t *dnode;
    47         uint32_t conf_io_addr;
    48         uint32_t conf_io_data;
    49         void *conf_data_port;
    50         void *conf_addr_port;
     47        ioport32_t *conf_addr_reg;
     48        ioport32_t *conf_data_reg;
     49        pio_window_t pio_win;
    5150        fibril_mutex_t conf_mutex;
    5251} pci_bus_t;
     
    6867        hw_resource_list_t hw_resources;
    6968        hw_resource_t resources[PCI_MAX_HW_RES];
     69        pio_window_t pio_window;
    7070} pci_fun_t;
    7171
  • uspace/drv/bus/usb/ehci/main.c

    r7f84430 r99c2c69e  
    7777        assert(device);
    7878
    79         uintptr_t reg_base = 0;
    80         size_t reg_size = 0;
     79        addr_range_t reg_range;
    8180        int irq = 0;
    8281
    83         int rc = get_my_registers(device, &reg_base, &reg_size, &irq);
     82        int rc = get_my_registers(device, &reg_range, &irq);
    8483        if (rc != EOK) {
    8584                usb_log_error("Failed to get memory addresses for %" PRIun
     
    8887        }
    8988
    90         usb_log_info("Memory mapped regs at 0x%" PRIxn " (size %zu), IRQ %d.\n",
    91             reg_base, reg_size, irq);
     89        usb_log_info("Memory mapped regs at %p (size %zu), IRQ %d.\n",
     90            RNGABSPTR(reg_range), RNGSZ(reg_range), irq);
    9291
    93         rc = disable_legacy(device, reg_base, reg_size);
     92        rc = disable_legacy(device, &reg_range);
    9493        if (rc != EOK) {
    9594                usb_log_error("Failed to disable legacy USB: %s.\n",
  • uspace/drv/bus/usb/ehci/res.c

    r7f84430 r99c2c69e  
    7171 *
    7272 * @param[in] dev Device asking for the addresses.
    73  * @param[out] mem_reg_address Base address of the memory range.
    74  * @param[out] mem_reg_size Size of the memory range.
     73 * @param[out] mem_regs_p Pointer to the register range.
    7574 * @param[out] irq_no IRQ assigned to the device.
    7675 * @return Error code.
    7776 */
    7877int get_my_registers(ddf_dev_t *dev,
    79     uintptr_t *mem_reg_address, size_t *mem_reg_size, int *irq_no)
     78    addr_range_t *mem_regs_p, int *irq_no)
    8079{
    8180        assert(dev);
     
    9998        }
    10099
    101         if (mem_reg_address)
    102                 *mem_reg_address = hw_res.mem_ranges.ranges[0].address;
    103         if (mem_reg_size)
    104                 *mem_reg_size = hw_res.mem_ranges.ranges[0].size;
     100        if (mem_regs_p)
     101                *mem_regs_p = hw_res.mem_ranges.ranges[0];
    105102        if (irq_no)
    106103                *irq_no = hw_res.irqs.irqs[0];
     
    267264}
    268265
    269 int disable_legacy(ddf_dev_t *device, uintptr_t reg_base, size_t reg_size)
     266int disable_legacy(ddf_dev_t *device, addr_range_t *reg_range)
    270267{
    271268        assert(device);
     
    274271        /* Map EHCI registers */
    275272        void *regs = NULL;
    276         int rc = pio_enable((void*)reg_base, reg_size, &regs);
     273        int rc = pio_enable_range(reg_range, &regs);
    277274        if (rc != EOK) {
    278275                usb_log_error("Failed to map registers %p: %s.\n",
    279                     (void *) reg_base, str_error(rc));
     276                    RNGABSPTR(*reg_range), str_error(rc));
    280277                return rc;
    281278        }
  • uspace/drv/bus/usb/ehci/res.h

    r7f84430 r99c2c69e  
    3737
    3838#include <ddf/driver.h>
     39#include <device/hw_res_parsed.h>
    3940
    40 int get_my_registers(ddf_dev_t *, uintptr_t *, size_t *, int *);
     41int get_my_registers(ddf_dev_t *, addr_range_t *, int *);
    4142int enable_interrupts(ddf_dev_t *);
    42 int disable_legacy(ddf_dev_t *, uintptr_t, size_t);
     43int disable_legacy(ddf_dev_t *, addr_range_t *);
    4344
    4445#endif
  • uspace/drv/bus/usb/ohci/hc.c

    r7f84430 r99c2c69e  
    106106 * @param[out] cmds Commands buffer.
    107107 * @param[in] cmds_size Size of the commands buffer (bytes).
    108  * @param[in] regs Physical address of device's registers.
    109  * @param[in] reg_size Size of the register area (bytes).
     108 * @param[in] regs Device's register range.
    110109 *
    111110 * @return Error code.
     
    113112int
    114113hc_get_irq_code(irq_pio_range_t ranges[], size_t ranges_size, irq_cmd_t cmds[],
    115     size_t cmds_size, uintptr_t regs, size_t reg_size)
     114    size_t cmds_size, addr_range_t *regs)
    116115{
    117116        if ((ranges_size < sizeof(ohci_pio_ranges)) ||
    118117            (cmds_size < sizeof(ohci_irq_commands)) ||
    119             (reg_size < sizeof(ohci_regs_t)))
     118            (RNGSZ(*regs) < sizeof(ohci_regs_t)))
    120119                return EOVERFLOW;
    121120
    122121        memcpy(ranges, ohci_pio_ranges, sizeof(ohci_pio_ranges));
    123         ranges[0].base = regs;
     122        ranges[0].base = RNGABS(*regs);
    124123
    125124        memcpy(cmds, ohci_irq_commands, sizeof(ohci_irq_commands));
    126         ohci_regs_t *registers = (ohci_regs_t *) regs;
     125        ohci_regs_t *registers = (ohci_regs_t *) RNGABSPTR(*regs);
    127126        cmds[0].addr = (void *) &registers->interrupt_status;
    128127        cmds[3].addr = (void *) &registers->interrupt_status;
     
    135134 *
    136135 * @param[in] device Host controller DDF device
    137  * @param[in] reg_base Register range base
    138  * @param[in] reg_size Register range size
     136 * @param[in] regs Register range
    139137 * @param[in] irq Interrupt number
    140138 * @paran[in] handler Interrupt handler
     
    142140 * @return EOK on success or negative error code
    143141 */
    144 int hc_register_irq_handler(ddf_dev_t *device, uintptr_t reg_base, size_t reg_size,
    145     int irq, interrupt_handler_t handler)
     142int hc_register_irq_handler(ddf_dev_t *device, addr_range_t *regs, int irq,
     143    interrupt_handler_t handler)
    146144{
    147145        int rc;
     
    158156
    159157        rc = hc_get_irq_code(irq_ranges, sizeof(irq_ranges), irq_cmds,
    160             sizeof(irq_cmds), reg_base, reg_size);
     158            sizeof(irq_cmds), regs);
    161159        if (rc != EOK) {
    162160                usb_log_error("Failed to generate IRQ code: %s.\n",
     
    259257 *
    260258 * @param[in] instance Memory place for the structure.
    261  * @param[in] regs Address of the memory mapped I/O registers.
    262  * @param[in] reg_size Size of the memory mapped area.
     259 * @param[in] regs Device's I/O registers range.
    263260 * @param[in] interrupts True if w interrupts should be used
    264261 * @return Error code
    265262 */
    266 int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts)
    267 {
    268         assert(instance);
    269 
    270         int rc =
    271             pio_enable((void*)regs, reg_size, (void**)&instance->registers);
     263int hc_init(hc_t *instance, addr_range_t *regs, bool interrupts)
     264{
     265        assert(instance);
     266
     267        int rc = pio_enable_range(regs, (void **) &instance->registers);
    272268        if (rc != EOK) {
    273269                usb_log_error("Failed to gain access to device registers: %s.\n",
  • uspace/drv/bus/usb/ohci/hc.h

    r7f84430 r99c2c69e  
    7575} hc_t;
    7676
    77 int hc_get_irq_code(irq_pio_range_t [], size_t, irq_cmd_t [], size_t, uintptr_t,
    78     size_t);
    79 int hc_register_irq_handler(ddf_dev_t *, uintptr_t, size_t, int, interrupt_handler_t);
     77int hc_get_irq_code(irq_pio_range_t [], size_t, irq_cmd_t [], size_t,
     78    addr_range_t *);
     79int hc_register_irq_handler(ddf_dev_t *, addr_range_t *, int,
     80    interrupt_handler_t);
    8081int hc_register_hub(hc_t *instance, ddf_fun_t *hub_fun);
    81 int hc_init(hc_t *instance, uintptr_t regs, size_t reg_size, bool interrupts);
     82int hc_init(hc_t *instance, addr_range_t *regs, bool interrupts);
    8283
    8384/** Safely dispose host controller internal structures
  • uspace/drv/bus/usb/ohci/ohci.c

    r7f84430 r99c2c69e  
    177177        ddf_fun_set_ops(instance->rh_fun, &rh_ops);
    178178
    179         uintptr_t reg_base = 0;
    180         size_t reg_size = 0;
     179        addr_range_t regs;
    181180        int irq = 0;
    182181
    183         rc = get_my_registers(device, &reg_base, &reg_size, &irq);
     182        rc = get_my_registers(device, &regs, &irq);
    184183        if (rc != EOK) {
    185184                usb_log_error("Failed to get register memory addresses "
     
    190189
    191190        usb_log_debug("Memory mapped regs at %p (size %zu), IRQ %d.\n",
    192             (void *) reg_base, reg_size, irq);
    193 
    194         rc = hc_register_irq_handler(device, reg_base, reg_size, irq, irq_handler);
     191            RNGABSPTR(regs), RNGSZ(regs), irq);
     192
     193        rc = hc_register_irq_handler(device, &regs, irq, irq_handler);
    195194        if (rc != EOK) {
    196195                usb_log_error("Failed to register interrupt handler: %s.\n",
     
    215214        }
    216215
    217         rc = hc_init(&instance->hc, reg_base, reg_size, interrupts);
     216        rc = hc_init(&instance->hc, &regs, interrupts);
    218217        if (rc != EOK) {
    219218                usb_log_error("Failed to init ohci_hcd: %s.\n", str_error(rc));
  • uspace/drv/bus/usb/ohci/res.c

    r7f84430 r99c2c69e  
    4848 *
    4949 * @param[in] dev Device asking for the addresses.
    50  * @param[out] mem_reg_address Base address of the memory range.
    51  * @param[out] mem_reg_size Size of the memory range.
     50 * @param[out] p_regs Pointer to register range.
    5251 * @param[out] irq_no IRQ assigned to the device.
    5352 * @return Error code.
    5453 */
    55 int get_my_registers(ddf_dev_t *dev,
    56     uintptr_t *mem_reg_address, size_t *mem_reg_size, int *irq_no)
     54int get_my_registers(ddf_dev_t *dev, addr_range_t *p_regs, int *irq_no)
    5755{
    5856        assert(dev);
     
    6664        hw_res_list_parsed_t hw_res;
    6765        hw_res_list_parsed_init(&hw_res);
    68         const int ret =  hw_res_get_list_parsed(parent_sess, &hw_res, 0);
     66        const int ret = hw_res_get_list_parsed(parent_sess, &hw_res, 0);
    6967        async_hangup(parent_sess);
    7068        if (ret != EOK) {
     
    7876        }
    7977
    80         if (mem_reg_address)
    81                 *mem_reg_address = hw_res.mem_ranges.ranges[0].address;
    82         if (mem_reg_size)
    83                 *mem_reg_size = hw_res.mem_ranges.ranges[0].size;
     78        if (p_regs)
     79                *p_regs = hw_res.mem_ranges.ranges[0];
    8480        if (irq_no)
    8581                *irq_no = hw_res.irqs.irqs[0];
  • uspace/drv/bus/usb/ohci/res.h

    r7f84430 r99c2c69e  
    3636
    3737#include <ddf/driver.h>
     38#include <device/hw_res_parsed.h>
    3839
    39 int get_my_registers(ddf_dev_t *, uintptr_t *, size_t *, int *);
     40int get_my_registers(ddf_dev_t *, addr_range_t *, int *);
    4041int enable_interrupts(ddf_dev_t *);
    4142
  • uspace/drv/bus/usb/uhci/hc.c

    r7f84430 r99c2c69e  
    105105 * @param[out] cmds Commands buffer.
    106106 * @param[in] cmds_size Size of the commands buffer (bytes).
    107  * @param[in] regs Physical address of device's registers.
    108  * @param[in] reg_size Size of the register area (bytes).
     107 * @param[in] regs Device's register range.
    109108 *
    110109 * @return Error code.
     
    112111int
    113112hc_get_irq_code(irq_pio_range_t ranges[], size_t ranges_size, irq_cmd_t cmds[],
    114     size_t cmds_size, uintptr_t regs, size_t reg_size)
     113    size_t cmds_size, addr_range_t *regs)
    115114{
    116115        if ((ranges_size < sizeof(uhci_irq_pio_ranges)) ||
    117116            (cmds_size < sizeof(uhci_irq_commands)) ||
    118             (reg_size < sizeof(uhci_regs_t)))
     117            (RNGSZ(*regs) < sizeof(uhci_regs_t)))
    119118                return EOVERFLOW;
    120119
    121120        memcpy(ranges, uhci_irq_pio_ranges, sizeof(uhci_irq_pio_ranges));
    122         ranges[0].base = regs;
     121        ranges[0].base = RNGABS(*regs);
    123122
    124123        memcpy(cmds, uhci_irq_commands, sizeof(uhci_irq_commands));
    125         uhci_regs_t *registers = (uhci_regs_t *) regs;
     124        uhci_regs_t *registers = (uhci_regs_t *) RNGABSPTR(*regs);
    126125        cmds[0].addr = &registers->usbsts;
    127126        cmds[3].addr = &registers->usbsts;
     
    133132 *
    134133 * @param[in] device Host controller DDF device
    135  * @param[in] reg_base Register range base
    136  * @param[in] reg_size Register range size
     134 * @param[in] regs Register range
    137135 * @param[in] irq Interrupt number
    138136 * @paran[in] handler Interrupt handler
     
    140138 * @return EOK on success or negative error code
    141139 */
    142 int hc_register_irq_handler(ddf_dev_t *device, uintptr_t reg_base, size_t reg_size,
    143     int irq, interrupt_handler_t handler)
     140int hc_register_irq_handler(ddf_dev_t *device, addr_range_t *regs, int irq,
     141    interrupt_handler_t handler)
    144142{
    145143        int rc;
     
    147145        irq_cmd_t irq_cmds[hc_irq_cmd_count];
    148146        rc = hc_get_irq_code(irq_ranges, sizeof(irq_ranges), irq_cmds,
    149             sizeof(irq_cmds), reg_base, reg_size);
     147            sizeof(irq_cmds), regs);
    150148        if (rc != EOK) {
    151149                usb_log_error("Failed to generate IRQ commands: %s.\n",
     
    232230 *
    233231 * @param[in] instance Memory place to initialize.
    234  * @param[in] regs Address of I/O control registers.
    235  * @param[in] reg_size Size of I/O control registers.
     232 * @param[in] regs Range of device's I/O control registers.
    236233 * @param[in] interrupts True if hw interrupts should be used.
    237234 * @return Error code.
     
    241238 * interrupt fibrils.
    242239 */
    243 int hc_init(hc_t *instance, void *regs, size_t reg_size, bool interrupts)
    244 {
    245         assert(reg_size >= sizeof(uhci_regs_t));
     240int hc_init(hc_t *instance, addr_range_t *regs, bool interrupts)
     241{
     242        assert(regs->size >= sizeof(uhci_regs_t));
    246243        int rc;
    247244
     
    251248        /* allow access to hc control registers */
    252249        uhci_regs_t *io;
    253         rc = pio_enable(regs, reg_size, (void **)&io);
     250        rc = pio_enable_range(regs, (void **) &io);
    254251        if (rc != EOK) {
    255252                usb_log_error("Failed to gain access to registers at %p: %s.\n",
     
    260257        instance->registers = io;
    261258        usb_log_debug(
    262             "Device registers at %p (%zuB) accessible.\n", io, reg_size);
     259            "Device registers at %p (%zuB) accessible.\n", io, regs->size);
    263260
    264261        rc = hc_init_mem_structures(instance);
  • uspace/drv/bus/usb/uhci/hc.h

    r7f84430 r99c2c69e  
    3737
    3838#include <ddf/interrupt.h>
     39#include <device/hw_res_parsed.h>
    3940#include <fibril.h>
    4041#include <usb/host/hcd.h>
     
    120121} hc_t;
    121122
    122 int hc_register_irq_handler(ddf_dev_t *, uintptr_t, size_t, int, interrupt_handler_t);
    123 int hc_get_irq_code(irq_pio_range_t [], size_t, irq_cmd_t [], size_t, uintptr_t,
    124     size_t);
     123int hc_register_irq_handler(ddf_dev_t *, addr_range_t *, int,
     124    interrupt_handler_t);
     125int hc_get_irq_code(irq_pio_range_t [], size_t, irq_cmd_t [], size_t,
     126    addr_range_t *);
    125127void hc_interrupt(hc_t *instance, uint16_t status);
    126 int hc_init(hc_t *instance, void *regs, size_t reg_size, bool interupts);
     128int hc_init(hc_t *instance, addr_range_t *regs, bool interupts);
    127129
    128130/** Safely dispose host controller internal structures
     
    132134static inline void hc_fini(hc_t *instance) {} /* TODO: implement*/
    133135#endif
     136
    134137/**
    135138 * @}
  • uspace/drv/bus/usb/uhci/res.c

    r7f84430 r99c2c69e  
    4646 *
    4747 * @param[in] dev Device asking for the addresses.
    48  * @param[out] io_reg_address Base address of the I/O range.
    49  * @param[out] io_reg_size Size of the I/O range.
     48 * @param[out] io_regs_p Pointer to register I/O range.
    5049 * @param[out] irq_no IRQ assigned to the device.
    5150 * @return Error code.
    5251 */
    53 int get_my_registers(ddf_dev_t *dev,
    54     uintptr_t *io_reg_address, size_t *io_reg_size, int *irq_no)
     52int get_my_registers(ddf_dev_t *dev, addr_range_t *io_regs_p, int *irq_no)
    5553{
    5654        assert(dev);
     
    7674        }
    7775
    78         if (io_reg_address)
    79                 *io_reg_address = hw_res.io_ranges.ranges[0].address;
    80         if (io_reg_size)
    81                 *io_reg_size = hw_res.io_ranges.ranges[0].size;
     76        if (io_regs_p)
     77                *io_regs_p = hw_res.io_ranges.ranges[0];
    8278        if (irq_no)
    8379                *irq_no = hw_res.irqs.irqs[0];
  • uspace/drv/bus/usb/uhci/res.h

    r7f84430 r99c2c69e  
    3737
    3838#include <ddf/driver.h>
     39#include <device/hw_res_parsed.h>
    3940
    40 int get_my_registers(ddf_dev_t *, uintptr_t *, size_t *, int *);
     41int get_my_registers(ddf_dev_t *, addr_range_t *, int *);
    4142int enable_interrupts(ddf_dev_t *);
    4243int disable_legacy(ddf_dev_t *);
  • uspace/drv/bus/usb/uhci/uhci.c

    r7f84430 r99c2c69e  
    184184        ddf_fun_data_implant(instance->rh_fun, &instance->rh);
    185185
    186         uintptr_t reg_base = 0;
    187         size_t reg_size = 0;
     186        addr_range_t regs;
    188187        int irq = 0;
    189188
    190         rc = get_my_registers(device, &reg_base, &reg_size, &irq);
     189        rc = get_my_registers(device, &regs, &irq);
    191190        if (rc != EOK) {
    192191                usb_log_error("Failed to get I/O addresses for %" PRIun ": %s.\n",
     
    194193                goto error;
    195194        }
    196         usb_log_debug("I/O regs at 0x%p (size %zu), IRQ %d.\n",
    197             (void *) reg_base, reg_size, irq);
     195        usb_log_debug("I/O regs at %p (size %zu), IRQ %d.\n",
     196            RNGABSPTR(regs), RNGSZ(regs), irq);
    198197
    199198        rc = disable_legacy(device);
     
    204203        }
    205204
    206         rc = hc_register_irq_handler(device, reg_base, reg_size, irq, irq_handler);
     205        rc = hc_register_irq_handler(device, &regs, irq, irq_handler);
    207206        if (rc != EOK) {
    208207                usb_log_error("Failed to register interrupt handler: %s.\n",
     
    223222        }
    224223
    225         rc = hc_init(&instance->hc, (void*)reg_base, reg_size, interrupts);
     224        rc = hc_init(&instance->hc, &regs, interrupts);
    226225        if (rc != EOK) {
    227226                usb_log_error("Failed to init uhci_hcd: %s.\n", str_error(rc));
  • uspace/drv/bus/usb/uhci/utils/malloc32.h

    r7f84430 r99c2c69e  
    9292 */
    9393static inline void free32(void *addr)
    94         { free(addr); }
     94{
     95        free(addr);
     96}
    9597
    9698/** Create 4KB page mapping
     
    98100 * @return Address of the mapped page, NULL on failure.
    99101 */
    100 static inline void * get_page(void)
     102static inline void *get_page(void)
    101103{
    102         void *address, *phys;
     104        uintptr_t phys;
     105        void *address;
     106       
    103107        const int ret = dmamem_map_anonymous(UHCI_REQUIRED_PAGE_SIZE,
    104             AS_AREA_READ | AS_AREA_WRITE, 0, &phys, &address);
    105         return ret == EOK ? address : NULL;
     108            DMAMEM_4GiB, AS_AREA_READ | AS_AREA_WRITE, 0, &phys,
     109            &address);
     110       
     111        return ((ret == EOK) ? address : NULL);
    106112}
    107113
  • uspace/drv/bus/usb/uhcirh/main.c

    r7f84430 r99c2c69e  
    4848#define NAME "uhcirh"
    4949
    50 static int hc_get_my_registers(ddf_dev_t *dev,
    51     uintptr_t *io_reg_address, size_t *io_reg_size);
     50static int hc_get_my_registers(ddf_dev_t *dev, addr_range_t *io_regs);
    5251
    5352static int uhci_rh_dev_add(ddf_dev_t *device);
     
    9089            ddf_dev_get_handle(device));
    9190
    92         uintptr_t io_regs = 0;
    93         size_t io_size = 0;
     91        addr_range_t regs;
    9492        uhci_root_hub_t *rh = NULL;
    9593        int rc;
    9694
    97         rc = hc_get_my_registers(device, &io_regs, &io_size);
     95        rc = hc_get_my_registers(device, &regs);
    9896        if (rc != EOK) {
    9997                usb_log_error( "Failed to get registers from HC: %s.\n",
     
    103101
    104102        usb_log_debug("I/O regs at %p (size %zuB).\n",
    105             (void *) io_regs, io_size);
     103            RNGABSPTR(regs), RNGSZ(regs));
    106104
    107105        rh = ddf_dev_data_alloc(device, sizeof(uhci_root_hub_t));
     
    111109        }
    112110
    113         rc = uhci_root_hub_init(rh, (void*)io_regs, io_size, device);
     111        rc = uhci_root_hub_init(rh, &regs, device);
    114112        if (rc != EOK) {
    115113                usb_log_error("Failed(%d) to initialize rh driver instance: "
     
    127125 *
    128126 * @param[in] dev Device asking for the addresses.
    129  * @param[out] io_reg_address Base address of the memory range.
    130  * @param[out] io_reg_size Size of the memory range.
     127 * @param[out] io_regs_p Pointer to the device's register range.
    131128 * @return Error code.
    132129 */
    133 int hc_get_my_registers(
    134     ddf_dev_t *dev, uintptr_t *io_reg_address, size_t *io_reg_size)
     130int hc_get_my_registers(ddf_dev_t *dev, addr_range_t *io_regs_p)
    135131{
    136132        async_sess_t *parent_sess =
     
    153149        }
    154150
    155         if (io_reg_address != NULL)
    156                 *io_reg_address = hw_res.io_ranges.ranges[0].address;
    157 
    158         if (io_reg_size != NULL)
    159                 *io_reg_size = hw_res.io_ranges.ranges[0].size;
     151        if (io_regs_p != NULL)
     152                *io_regs_p = hw_res.io_ranges.ranges[0];
    160153
    161154        hw_res_list_parsed_clean(&hw_res);
  • uspace/drv/bus/usb/uhcirh/root_hub.c

    r7f84430 r99c2c69e  
    3636#include <ddi.h>
    3737#include <usb/debug.h>
     38#include <device/hw_res_parsed.h>
    3839
    3940#include "root_hub.h"
     
    4243 *
    4344 * @param[in] instance Driver memory structure to use.
    44  * @param[in] addr Address of I/O registers.
    45  * @param[in] size Size of available I/O space.
     45 * @param[in] io_regs Range of I/O registers.
    4646 * @param[in] rh Pointer to DDF instance of the root hub driver.
    4747 * @return Error code.
    4848 */
    49 int uhci_root_hub_init(
    50   uhci_root_hub_t *instance, void *addr, size_t size, ddf_dev_t *rh)
     49int uhci_root_hub_init(uhci_root_hub_t *instance, addr_range_t *io_regs,
     50    ddf_dev_t *rh)
    5151{
     52        port_status_t *regs;
     53
    5254        assert(instance);
    5355        assert(rh);
    5456
    5557        /* Allow access to root hub port registers */
    56         assert(sizeof(port_status_t) * UHCI_ROOT_HUB_PORT_COUNT <= size);
    57         port_status_t *regs;
    58         int ret = pio_enable(addr, size, (void**)&regs);
     58        assert(sizeof(*regs) * UHCI_ROOT_HUB_PORT_COUNT <= io_regs->size);
     59
     60        int ret = pio_enable_range(io_regs, (void **) &regs);
    5961        if (ret < 0) {
    6062                usb_log_error(
    6163                    "Failed(%d) to gain access to port registers at %p: %s.\n",
    62                     ret, regs, str_error(ret));
     64                    ret, RNGABSPTR(*io_regs), str_error(ret));
    6365                return ret;
    6466        }
  • uspace/drv/bus/usb/uhcirh/root_hub.h

    r7f84430 r99c2c69e  
    3636
    3737#include <ddf/driver.h>
     38#include <device/hw_res_parsed.h>
    3839
    3940#include "port.h"
     
    4849} uhci_root_hub_t;
    4950
    50 int uhci_root_hub_init(
    51     uhci_root_hub_t *instance, void *addr, size_t size, ddf_dev_t *rh);
     51int uhci_root_hub_init(uhci_root_hub_t *instance, addr_range_t *regs,
     52    ddf_dev_t *rh);
    5253
    5354void uhci_root_hub_fini(uhci_root_hub_t *instance);
  • uspace/drv/bus/usb/usbmid/explore.c

    r7f84430 r99c2c69e  
    5656static bool interface_in_list(const list_t *list, int interface_no)
    5757{
    58         list_foreach(*list, l) {
    59                 usbmid_interface_t *iface = usbmid_interface_from_link(l);
     58        list_foreach(*list, link, usbmid_interface_t, iface) {
    6059                if (iface->interface_no == interface_no) {
    6160                        return true;
     
    190189
    191190        /* Start child function for every interface. */
    192         list_foreach(usb_mid->interface_list, link) {
    193                 usbmid_interface_t *iface = usbmid_interface_from_link(link);
    194 
     191        list_foreach(usb_mid->interface_list, link, usbmid_interface_t, iface) {
    195192                usb_log_info("Creating child for interface %d (%s).\n",
    196193                    iface->interface_no,
  • uspace/drv/bus/usb/usbmid/usbmid.c

    r7f84430 r99c2c69e  
    135135        }
    136136
    137         list_foreach(match_ids.ids, link) {
    138                 match_id_t *match_id = list_get_instance(link, match_id_t, link);
     137        list_foreach(match_ids.ids, link, match_id_t, match_id) {
    139138                rc = ddf_fun_add_match_id(child, match_id->id, match_id->score);
    140139                if (rc != EOK) {
  • uspace/drv/bus/usb/vhc/transfer.c

    r7f84430 r99c2c69e  
    9292
    9393        bool target_found = false;
    94         list_foreach(vhc->devices, pos) {
    95                 vhc_virtdev_t *dev = list_get_instance(pos, vhc_virtdev_t, link);
     94        list_foreach(vhc->devices, link, vhc_virtdev_t, dev) {
    9695                fibril_mutex_lock(&dev->guard);
    9796                if (dev->address == transfer->address) {
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