Index: uspace/lib/c/generic/device/hw_res.c
===================================================================
--- uspace/lib/c/generic/device/hw_res.c	(revision d98d136b4638fc87308c328043b875d0715b1d29)
+++ uspace/lib/c/generic/device/hw_res.c	(revision 9991c47fc8c46d0e24bc1c32ff3c50cc3e8b340d)
@@ -84,4 +84,18 @@
 }
 
+int hw_res_dma_channel_setup(async_sess_t *sess,
+    unsigned channel, uint32_t pa, uint16_t size, uint8_t mode)
+{
+	async_exch_t *exch = async_exchange_begin(sess);
+	if (exch == NULL)
+		return ENOMEM;
+	uint32_t packed = size | (mode << 16);
+	int ret = async_req_4_0(exch, DEV_IFACE_ID(HW_RES_DEV_IFACE),
+	    HW_RES_DMA_CHANNEL_SETUP, channel, pa, packed);
+	async_exchange_end(exch);
+	
+	return ret;
+}
+
 /** @}
  */
Index: uspace/lib/c/include/device/hw_res.h
===================================================================
--- uspace/lib/c/include/device/hw_res.h	(revision d98d136b4638fc87308c328043b875d0715b1d29)
+++ uspace/lib/c/include/device/hw_res.h	(revision 9991c47fc8c46d0e24bc1c32ff3c50cc3e8b340d)
@@ -43,5 +43,6 @@
 typedef enum {
 	HW_RES_GET_RESOURCE_LIST = 0,
-	HW_RES_ENABLE_INTERRUPT
+	HW_RES_ENABLE_INTERRUPT,
+	HW_RES_DMA_CHANNEL_SETUP,
 } hw_res_method_t;
 
@@ -105,4 +106,15 @@
 extern bool hw_res_enable_interrupt(async_sess_t *);
 
+#define DMA_MODE_WRITE (1 << 2)
+#define DMA_MODE_READ (1 << 3)
+#define DMA_MODE_AUTO (1 << 4)
+#define DMA_MODE_DOWN (1 << 5)
+#define DMA_MODE_SINGLE (1 << 6)
+#define DMA_MODE_BLOCK (1 << 7)
+#define DMA_MODE_ON_DEMAND (0)
+
+extern int hw_res_dma_channel_setup(async_sess_t *,
+    unsigned, uint32_t, uint16_t, uint8_t);
+
 #endif