Changeset 99718a2e in mainline
- Timestamp:
- 2010-06-30T20:42:42Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 873c681
- Parents:
- 50f4b95
- Location:
- kernel
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia32/include/smp/apic.h
r50f4b95 r99718a2e 347 347 348 348 extern uint32_t apic_id_mask; 349 extern uint8_t bsp_l_apic; 349 350 350 351 extern void apic_init(void); … … 355 356 extern int l_apic_send_init_ipi(uint8_t); 356 357 extern void l_apic_debug(void); 357 extern uint8_t l_apic_id(void);358 358 359 359 extern uint32_t io_apic_read(uint8_t); -
kernel/arch/ia32/src/smp/apic.c
r50f4b95 r99718a2e 76 76 77 77 uint32_t apic_id_mask = 0; 78 uint8_t bsp_l_apic = 0; 79 78 80 static irq_t l_apic_timer_irq; 79 81 … … 154 156 } 155 157 158 /** Get Local APIC ID. 159 * 160 * @return Local APIC ID. 161 * 162 */ 163 static uint8_t l_apic_id(void) 164 { 165 l_apic_id_t idreg; 166 167 idreg.value = l_apic[L_APIC_ID]; 168 return idreg.apic_id; 169 } 170 156 171 /** Initialize APIC on BSP. */ 157 172 void apic_init(void) … … 208 223 l_apic_init(); 209 224 l_apic_debug(); 225 226 bsp_l_apic = l_apic_id(); 210 227 } 211 228 … … 460 477 { 461 478 #ifdef LAPIC_VERBOSE 462 printf("LVT on cpu%" PRIs ", LAPIC ID: %" PRIu8 "\n", CPU->id, l_apic_id()); 479 printf("LVT on cpu%" PRIs ", LAPIC ID: %" PRIu8 "\n", 480 CPU->id, l_apic_id()); 463 481 464 482 lvt_tm_t tm; 465 483 tm.value = l_apic[LVT_Tm]; 466 printf("LVT Tm: vector=%hhd, %s, %s, %s\n", tm.vector, delivs_str[tm.delivs], mask_str[tm.masked], tm_mode_str[tm.mode]); 484 printf("LVT Tm: vector=%" PRIu8 ", %s, %s, %s\n", 485 tm.vector, delivs_str[tm.delivs], mask_str[tm.masked], 486 tm_mode_str[tm.mode]); 467 487 468 488 lvt_lint_t lint; 469 489 lint.value = l_apic[LVT_LINT0]; 470 printf("LVT LINT0: vector=%hhd, %s, %s, %s, irr=%d, %s, %s\n", tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs], intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode], mask_str[lint.masked]); 471 lint.value = l_apic[LVT_LINT1]; 472 printf("LVT LINT1: vector=%hhd, %s, %s, %s, irr=%d, %s, %s\n", tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs], intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode], mask_str[lint.masked]); 490 printf("LVT LINT0: vector=%" PRIu8 ", %s, %s, %s, irr=%u, %s, %s\n", 491 tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs], 492 intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode], 493 mask_str[lint.masked]); 494 495 lint.value = l_apic[LVT_LINT1]; 496 printf("LVT LINT1: vector=%" PRIu8 ", %s, %s, %s, irr=%u, %s, %s\n", 497 tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs], 498 intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode], 499 mask_str[lint.masked]); 473 500 474 501 lvt_error_t error; 475 502 error.value = l_apic[LVT_Err]; 476 printf("LVT Err: vector=%hhd, %s, %s\n", error.vector, delivs_str[error.delivs], mask_str[error.masked]); 503 printf("LVT Err: vector=%" PRIu8 ", %s, %s\n", error.vector, 504 delivs_str[error.delivs], mask_str[error.masked]); 477 505 #endif 478 }479 480 /** Get Local APIC ID.481 *482 * @return Local APIC ID.483 *484 */485 uint8_t l_apic_id(void)486 {487 l_apic_id_t idreg;488 489 idreg.value = l_apic[L_APIC_ID];490 return idreg.apic_id;491 506 } 492 507 -
kernel/arch/ia32/src/smp/smp.c
r50f4b95 r99718a2e 113 113 apic_init(); 114 114 115 uint8_t apic = l_apic_id();116 117 115 for (i = 0; i < config.cpu_count; i++) { 118 116 /* … … 128 126 continue; 129 127 130 if (ops->cpu_apic_id(i) == apic) {131 printf(" %s: bad processor entry #%u, will not send IPI "132 "to myself\n", __FUNCTION__,i);128 if (ops->cpu_apic_id(i) == bsp_l_apic) { 129 printf("kmp: bad processor entry #%u, will not send IPI " 130 "to myself\n", i); 133 131 continue; 134 132 } -
kernel/genarch/src/acpi/madt.c
r50f4b95 r99718a2e 111 111 return ((struct madt_l_apic *) 112 112 madt_entries_index[madt_l_apic_entry_index + i])->apic_id == 113 l_apic_id();113 bsp_l_apic; 114 114 } 115 115 … … 147 147 static void madt_l_apic_entry(struct madt_l_apic *la, size_t i) 148 148 { 149 if ( !madt_l_apic_entry_cnt++)149 if (madt_l_apic_entry_cnt == 0) 150 150 madt_l_apic_entry_index = i; 151 152 madt_l_apic_entry_cnt++; 151 153 152 154 if (!(la->flags & 0x1)) { … … 160 162 static void madt_io_apic_entry(struct madt_io_apic *ioa, size_t i) 161 163 { 162 if ( !madt_io_apic_entry_cnt++) {164 if (madt_io_apic_entry_cnt == 0) { 163 165 /* Remember index of the first io apic entry */ 164 166 madt_io_apic_entry_index = i; … … 167 169 /* Currently not supported */ 168 170 } 171 172 madt_io_apic_entry_cnt++; 169 173 } 170 174 … … 190 194 /* Count MADT entries */ 191 195 unsigned int madt_entries_index_cnt = 0; 192 for (hdr = &acpi_madt->apic_header[0]; hdr < end;196 for (hdr = acpi_madt->apic_header; hdr < end; 193 197 hdr = (struct madt_apic_header *) (((uint8_t *) hdr) + hdr->length)) 194 198 madt_entries_index_cnt++; … … 196 200 /* Create MADT APIC entries index array */ 197 201 madt_entries_index = (struct madt_apic_header **) 198 malloc(madt_entries_index_cnt * sizeof(struct madt_apic_header * *),202 malloc(madt_entries_index_cnt * sizeof(struct madt_apic_header *), 199 203 FRAME_ATOMIC); 200 204 if (!madt_entries_index) … … 203 207 size_t i = 0; 204 208 205 for (hdr = &acpi_madt->apic_header[0]; hdr < end; 206 hdr = (struct madt_apic_header *) (((uint8_t *) hdr) + hdr->length)) 207 madt_entries_index[i++] = hdr; 209 for (hdr = acpi_madt->apic_header; hdr < end; 210 hdr = (struct madt_apic_header *) (((uint8_t *) hdr) + hdr->length)) { 211 madt_entries_index[i] = hdr; 212 i++; 213 } 208 214 209 215 /* Sort MADT index structure */
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