Changeset 985e26d2 in mainline for kernel/arch/ia32


Ignore:
Timestamp:
2010-01-07T19:06:59Z (16 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
8190e63
Parents:
743e17b (diff), eca2435 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline changes.

Location:
kernel/arch/ia32
Files:
11 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/ia32/Makefile.inc

    r743e17b r985e26d2  
    3434BFD = binary
    3535TARGET = i686-pc-linux-gnu
     36CLANG_ARCH = i386
    3637TOOLCHAIN_DIR = $(CROSS_PREFIX)/ia32
    3738
     
    4344ICC_CFLAGS += $(CMN1)
    4445SUNCC_CFLAGS += $(CMN1)
     46CLANG_CFLAGS += $(CMN1)
    4547
    4648## Accepted CPUs
     
    7173GCC_CFLAGS += $(CMN2)
    7274ICC_CFLAGS += $(CMN2)
     75CLANG_CFLAGS += $(CMN2)
    7376
    7477ARCH_SOURCES = \
  • kernel/arch/ia32/include/cpu.h

    r743e17b r985e26d2  
    5050#include <arch/pm.h>
    5151#include <arch/asm.h>
     52#include <arch/cpuid.h>
    5253
    5354typedef struct {
     
    5657        unsigned int model;
    5758        unsigned int stepping;
     59        cpuid_feature_info fi;
     60
    5861        tss_t *tss;
    5962       
  • kernel/arch/ia32/include/cpuid.h

    r743e17b r985e26d2  
    6363
    6464struct __cpuid_feature_info {
    65         unsigned                        : 23;
     65        unsigned      : 11;
     66        unsigned sep  :  1;
     67        unsigned      : 11;
    6668        unsigned mmx  :  1;
    6769        unsigned fxsr :  1;
  • kernel/arch/ia32/include/mm/page.h

    r743e17b r985e26d2  
    146146#define PFERR_CODE_RSVD         (1 << 3)       
    147147
    148 static inline int get_pt_flags(pte_t *pt, size_t i)
     148/** Page Table Entry. */
     149typedef struct {
     150        unsigned present : 1;
     151        unsigned writeable : 1;
     152        unsigned uaccessible : 1;
     153        unsigned page_write_through : 1;
     154        unsigned page_cache_disable : 1;
     155        unsigned accessed : 1;
     156        unsigned dirty : 1;
     157        unsigned pat : 1;
     158        unsigned global : 1;
     159        unsigned soft_valid : 1;        /**< Valid content even if the present bit is not set. */
     160        unsigned avl : 2;
     161        unsigned frame_address : 20;
     162} __attribute__ ((packed)) pte_t;
     163
     164static inline unsigned int get_pt_flags(pte_t *pt, size_t i)
    149165{
    150166        pte_t *p = &pt[i];
  • kernel/arch/ia32/include/types.h

    r743e17b r985e26d2  
    8080#define PRIxn "x"       /**< Format for hexadecimal (u)native_t. */
    8181
    82 /** Page Table Entry. */
    83 typedef struct {
    84         unsigned present : 1;
    85         unsigned writeable : 1;
    86         unsigned uaccessible : 1;
    87         unsigned page_write_through : 1;
    88         unsigned page_cache_disable : 1;
    89         unsigned accessed : 1;
    90         unsigned dirty : 1;
    91         unsigned pat : 1;
    92         unsigned global : 1;
    93         unsigned soft_valid : 1;        /**< Valid content even if the present bit is not set. */
    94         unsigned avl : 2;
    95         unsigned frame_address : 20;
    96 } __attribute__ ((packed)) pte_t;
    97 
    9882#endif
    9983
  • kernel/arch/ia32/src/boot/boot.S

    r743e17b r985e26d2  
    8585        pse_supported:
    8686       
    87         bt $(INTEL_SEP), %edx
    88         jc sep_supported
    89        
    90                 movl $sep_msg, %esi
    91                 jmp error_halt
    92        
    93         sep_supported:
    94 
    9587#include "vesa_prot.inc"
    9688
     
    225217        .asciz "Page Size Extension not supported. System halted."
    226218
    227 sep_msg:
    228         .asciz "SYSENTER/SYSEXIT not supported. System halted."
  • kernel/arch/ia32/src/cpu/cpu.c

    r743e17b r985e26d2  
    9292void cpu_arch_init(void)
    9393{
    94         cpuid_feature_info fi;
    9594        cpuid_extended_feature_info efi;
    9695        cpu_info_t info;
     
    102101        CPU->fpu_owner = NULL;
    103102       
    104         cpuid(1, &info);
     103        cpuid(INTEL_CPUID_STANDARD, &info);
    105104       
    106         fi.word = info.cpuid_edx;
     105        CPU->arch.fi.word = info.cpuid_edx;
    107106        efi.word = info.cpuid_ecx;
    108107       
    109         if (fi.bits.fxsr)
     108        if (CPU->arch.fi.bits.fxsr)
    110109                fpu_fxsr();
    111110        else
    112111                fpu_fsr();
    113112       
    114         if (fi.bits.sse) {
     113        if (CPU->arch.fi.bits.sse) {
    115114                asm volatile (
    116115                        "mov %%cr4, %[help]\n"
     
    122121        }
    123122       
    124         /* Setup fast SYSENTER/SYSEXIT syscalls */
    125         syscall_setup_cpu();
     123        if (CPU->arch.fi.bits.sep) {
     124                /* Setup fast SYSENTER/SYSEXIT syscalls */
     125                syscall_setup_cpu();
     126        }
    126127}
    127128
     
    132133        CPU->arch.vendor = VendorUnknown;
    133134        if (has_cpuid()) {
    134                 cpuid(0, &info);
     135                cpuid(INTEL_CPUID_LEVEL, &info);
    135136
    136137                /*
     
    150151                        CPU->arch.vendor = VendorIntel;
    151152               
    152                 cpuid(1, &info);
     153                cpuid(INTEL_CPUID_STANDARD, &info);
    153154                CPU->arch.family = (info.cpuid_eax >> 8) & 0x0f;
    154155                CPU->arch.model = (info.cpuid_eax >> 4) & 0x0f;
  • kernel/arch/ia32/src/ia32.c

    r743e17b r985e26d2  
    6868#include <sysinfo/sysinfo.h>
    6969#include <arch/boot/boot.h>
     70#include <memstr.h>
    7071
    7172#ifdef CONFIG_SMP
     
    169170                        i8042_wire(i8042_instance, kbrd);
    170171                        trap_virtual_enable_irqs(1 << IRQ_KBD);
     172                        trap_virtual_enable_irqs(1 << IRQ_MOUSE);
    171173                }
    172174        }
     
    176178         * self-sufficient.
    177179         */
    178         sysinfo_set_item_val("kbd", NULL, true);
    179         sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
    180         sysinfo_set_item_val("kbd.address.physical", NULL,
     180        sysinfo_set_item_val("i8042", NULL, true);
     181        sysinfo_set_item_val("i8042.inr_a", NULL, IRQ_KBD);
     182        sysinfo_set_item_val("i8042.inr_b", NULL, IRQ_MOUSE);
     183        sysinfo_set_item_val("i8042.address.physical", NULL,
    181184            (uintptr_t) I8042_BASE);
    182         sysinfo_set_item_val("kbd.address.kernel", NULL,
     185        sysinfo_set_item_val("i8042.address.kernel", NULL,
    183186            (uintptr_t) I8042_BASE);
    184187#endif
  • kernel/arch/ia32/src/interrupt.c

    r743e17b r985e26d2  
    9898}
    9999
     100static void de_fault(int n, istate_t *istate)
     101{
     102        fault_if_from_uspace(istate, "Divide error.");
     103
     104        decode_istate(istate);
     105        panic("Divide error.");
     106}
     107
    100108/** General Protection Fault. */
    101109static void gp_fault(int n __attribute__((unused)), istate_t *istate)
     
    215223        }
    216224       
     225        exc_register(0, "de_fault", (iroutine) de_fault);
    217226        exc_register(7, "nm_fault", (iroutine) nm_fault);
    218227        exc_register(12, "ss_fault", (iroutine) ss_fault);
  • kernel/arch/ia32/src/proc/scheduler.c

    r743e17b r985e26d2  
    6161            SP_DELTA];
    6262       
    63         /* Set kernel stack for CP3 -> CPL0 switch via SYSENTER */
    64         write_msr(IA32_MSR_SYSENTER_ESP, kstk);
     63        if (CPU->arch.fi.bits.sep) {
     64                /* Set kernel stack for CP3 -> CPL0 switch via SYSENTER */
     65                write_msr(IA32_MSR_SYSENTER_ESP, kstk);
     66        }
    6567       
    6668        /* Set kernel stack for CPL3 -> CPL0 switch via interrupt */
  • kernel/arch/ia32/src/userspace.c

    r743e17b r985e26d2  
    7070                "movl %[uarg], %%eax\n"
    7171               
    72                 /* %ebx is defined to hold pcb_ptr - set it to 0 */
    73                 "xorl %%ebx, %%ebx\n"
     72                /* %edi is defined to hold pcb_ptr - set it to 0 */
     73                "xorl %%edi, %%edi\n"
    7474               
    7575                "iret\n"
Note: See TracChangeset for help on using the changeset viewer.