Changeset 97f1691 in mainline for arch/sparc64/src/trap


Ignore:
Timestamp:
2006-02-28T00:02:39Z (20 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
7d6ec87
Parents:
d87c3f3
Message:

sparc64 work.
Fix KBD_VIRT_ADDRESS.
Call before_thread_runs() prior to the switch to the thread's stack. Add comment why this is crucial.
Add after_thread_ran() to the scheduler.
Add before_thread_runs_arch() and after_thread_ran_arch() for sparc64, mapping/demapping thread's kernel stack.
Add dummy after_thread_ran_arch() to all other architectures.
Add dtlb_insert_mapping() to promote code reuse.

Location:
arch/sparc64/src/trap
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • arch/sparc64/src/trap/exception.c

    rd87c3f3 r97f1691  
    4343}
    4444
     45/** Handle data_access_error. */
     46void do_data_access_error(void)
     47{
     48        panic("Data Access Error: %P\n", tpc_read());
     49}
     50
    4551/** Handle mem_address_not_aligned. */
    4652void do_illegal_instruction(void)
  • arch/sparc64/src/trap/trap_table.S

    rd87c3f3 r97f1691  
    7373        CLEAN_WINDOW_HANDLER
    7474
     75/* TT = 0x32, TL = 0, data_access_error */
     76.org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE
     77.global data_access_error
     78data_access_error:
     79        SIMPLE_HANDLER do_data_access_error
     80
    7581/* TT = 0x34, TL = 0, mem_address_not_aligned */
    7682.org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE
     
    226232clean_window_handler_high:
    227233        CLEAN_WINDOW_HANDLER
     234
     235/* TT = 0x32, TL > 0, data_access_error */
     236.org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE
     237.global data_access_error_high
     238data_access_error_high:
     239        SIMPLE_HANDLER do_data_access_error
    228240
    229241/* TT = 0x34, TL > 0, mem_address_not_aligned */
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