Index: kernel/arch/mips32/include/debugger.h
===================================================================
--- kernel/arch/mips32/include/debugger.h	(revision 41a7f624830c173ff6e5ed22c0abc99dbc08751a)
+++ kernel/arch/mips32/include/debugger.h	(revision 96b02eb9b2f96f3843b8275c254c43a9cb6c8c88)
@@ -58,8 +58,8 @@
 
 typedef struct  {
-	uintptr_t address;          /**< Breakpoint address */
-	unative_t instruction;      /**< Original instruction */
-	unative_t nextinstruction;  /**< Original instruction following break */
-	unsigned int flags;         /**< Flags regarding breakpoint */
+	uintptr_t address;         /**< Breakpoint address */
+	sysarg_t instruction;      /**< Original instruction */
+	sysarg_t nextinstruction;  /**< Original instruction following break */
+	unsigned int flags;        /**< Flags regarding breakpoint */
 	size_t counter;
 	void (*bkfunc)(void *, istate_t *);
@@ -68,5 +68,5 @@
 extern bpinfo_t breakpoints[BKPOINTS_MAX];
 
-extern bool is_jump(unative_t);
+extern bool is_jump(sysarg_t);
 
 extern void debugger_init(void);
Index: kernel/arch/mips32/include/fpu_context.h
===================================================================
--- kernel/arch/mips32/include/fpu_context.h	(revision 41a7f624830c173ff6e5ed22c0abc99dbc08751a)
+++ kernel/arch/mips32/include/fpu_context.h	(revision 96b02eb9b2f96f3843b8275c254c43a9cb6c8c88)
@@ -38,9 +38,9 @@
 #include <typedefs.h>
 
-#define FPU_CONTEXT_ALIGN    sizeof(unative_t)
+#define FPU_CONTEXT_ALIGN    sizeof(sysarg_t)
 
 typedef struct {
-	unative_t dregs[32];
-	unative_t cregs[32];
+	sysarg_t dregs[32];
+	sysarg_t cregs[32];
 } fpu_context_t;
 
Index: kernel/arch/mips32/include/types.h
===================================================================
--- kernel/arch/mips32/include/types.h	(revision 41a7f624830c173ff6e5ed22c0abc99dbc08751a)
+++ kernel/arch/mips32/include/types.h	(revision 96b02eb9b2f96f3843b8275c254c43a9cb6c8c88)
@@ -43,5 +43,5 @@
 typedef uint32_t ipl_t;
 
-typedef uint32_t unative_t;
+typedef uint32_t sysarg_t;
 typedef int32_t native_t;
 typedef uint32_t atomic_count_t;
@@ -54,6 +54,6 @@
 
 #define PRIdn  PRId32  /**< Format for native_t. */
-#define PRIun  PRIu32  /**< Format for unative_t. */
-#define PRIxn  PRIx32  /**< Format for hexadecimal unative_t. */
+#define PRIun  PRIu32  /**< Format for sysarg_t. */
+#define PRIxn  PRIx32  /**< Format for hexadecimal sysarg_t. */
 #define PRIua  PRIu32  /**< Format for atomic_count_t. */
 
Index: kernel/arch/mips32/src/debugger.c
===================================================================
--- kernel/arch/mips32/src/debugger.c	(revision 41a7f624830c173ff6e5ed22c0abc99dbc08751a)
+++ kernel/arch/mips32/src/debugger.c	(revision 96b02eb9b2f96f3843b8275c254c43a9cb6c8c88)
@@ -134,5 +134,5 @@
  *
  */
-bool is_jump(unative_t instr)
+bool is_jump(sysarg_t instr)
 {
 	unsigned int i;
@@ -166,6 +166,6 @@
 			return 0;
 		} else if ((breakpoints[i].address == (uintptr_t) argv->intval +
-		    sizeof(unative_t)) || (breakpoints[i].address ==
-		    (uintptr_t) argv->intval - sizeof(unative_t))) {
+		    sizeof(sysarg_t)) || (breakpoints[i].address ==
+		    (uintptr_t) argv->intval - sizeof(sysarg_t))) {
 			printf("Adjacent breakpoints not supported, conflict "
 			    "with %d.\n", i);
@@ -194,6 +194,6 @@
 	
 	cur->address = (uintptr_t) argv->intval;
-	cur->instruction = ((unative_t *) cur->address)[0];
-	cur->nextinstruction = ((unative_t *) cur->address)[1];
+	cur->instruction = ((sysarg_t *) cur->address)[0];
+	cur->nextinstruction = ((sysarg_t *) cur->address)[1];
 	if (argv == &add_argv) {
 		cur->flags = 0;
@@ -209,5 +209,5 @@
 	
 	/* Set breakpoint */
-	*((unative_t *) cur->address) = 0x0d;
+	*((sysarg_t *) cur->address) = 0x0d;
 	smc_coherence(cur->address);
 	
@@ -341,5 +341,5 @@
 		/* Reinst only breakpoint */
 		if ((breakpoints[i].flags & BKPOINT_REINST) &&
-		    (fireaddr == breakpoints[i].address + sizeof(unative_t))) {
+		    (fireaddr == breakpoints[i].address + sizeof(sysarg_t))) {
 			cur = &breakpoints[i];
 			break;
Index: kernel/arch/mips32/src/mips32.c
===================================================================
--- kernel/arch/mips32/src/mips32.c	(revision 41a7f624830c173ff6e5ed22c0abc99dbc08751a)
+++ kernel/arch/mips32/src/mips32.c	(revision 96b02eb9b2f96f3843b8275c254c43a9cb6c8c88)
@@ -233,5 +233,5 @@
  * possible to have it separately in the future.
  */
-unative_t sys_tls_set(unative_t addr)
+sysarg_t sys_tls_set(sysarg_t addr)
 {
 	return 0;