Index: uspace/drv/bus/adb/cuda_adb/Makefile =================================================================== --- uspace/drv/bus/adb/cuda_adb/Makefile (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) +++ uspace/drv/bus/adb/cuda_adb/Makefile (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) @@ -0,0 +1,38 @@ +# +# Copyright (c) 2010 Jiri Svoboda +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +USPACE_PREFIX = ../../../.. +LIBS = $(LIBDRV_PREFIX)/libdrv.a +EXTRA_CFLAGS += -I$(LIBDRV_PREFIX)/include +BINARY = cuda_adb + +SOURCES = \ + cuda_adb.c \ + main.c + +include $(USPACE_PREFIX)/Makefile.common Index: uspace/drv/bus/adb/cuda_adb/cuda_adb.c =================================================================== --- uspace/drv/bus/adb/cuda_adb/cuda_adb.c (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) +++ uspace/drv/bus/adb/cuda_adb/cuda_adb.c (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) @@ -0,0 +1,506 @@ +/* + * Copyright (c) 2010 Jiri Svoboda + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** @file VIA-CUDA Apple Desktop Bus driver + * + * Note: We should really do a full bus scan at the beginning and resolve + * address conflicts. Also we should consider the handler ID in r3. Instead + * we just assume a keyboard at address 2 or 8 and a mouse at address 9. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "cuda_adb.h" +#include "cuda_hw.h" + +#define NAME "cuda_adb" + +static void cuda_dev_connection(ipc_callid_t, ipc_call_t *, void *); +static int cuda_init(cuda_t *); +static void cuda_irq_handler(ipc_callid_t, ipc_call_t *, void *); + +static void cuda_irq_listen(cuda_t *); +static void cuda_irq_receive(cuda_t *); +static void cuda_irq_rcv_end(cuda_t *, void *, size_t *); +static void cuda_irq_send_start(cuda_t *); +static void cuda_irq_send(cuda_t *); + +static void cuda_packet_handle(cuda_t *, uint8_t *, size_t); +static void cuda_send_start(cuda_t *); +static void cuda_autopoll_set(cuda_t *, bool); + +static void adb_packet_handle(cuda_t *, uint8_t *, size_t, bool); + +static irq_pio_range_t cuda_ranges[] = { + { + .base = 0, + .size = sizeof(cuda_regs_t) + } +}; + +static irq_cmd_t cuda_cmds[] = { + { + .cmd = CMD_PIO_READ_8, + .addr = NULL, + .dstarg = 1 + }, + { + .cmd = CMD_AND, + .value = SR_INT, + .srcarg = 1, + .dstarg = 2 + }, + { + .cmd = CMD_PREDICATE, + .value = 1, + .srcarg = 2 + }, + { + .cmd = CMD_ACCEPT + } +}; + + +static irq_code_t cuda_irq_code = { + sizeof(cuda_ranges) / sizeof(irq_pio_range_t), + cuda_ranges, + sizeof(cuda_cmds) / sizeof(irq_cmd_t), + cuda_cmds +}; + +static int cuda_dev_create(cuda_t *cuda, const char *name, adb_dev_t **rdev) +{ + adb_dev_t *dev = NULL; + ddf_fun_t *fun; + int rc; + + fun = ddf_fun_create(cuda->dev, fun_exposed, name); + if (fun == NULL) { + ddf_msg(LVL_ERROR, "Failed creating function '%s'.", name); + rc = ENOMEM; + goto error; + } + + dev = ddf_fun_data_alloc(fun, sizeof(adb_dev_t)); + if (dev == NULL) { + ddf_msg(LVL_ERROR, "Failed allocating memory for '%s'.", name); + rc = ENOMEM; + goto error; + } + + dev->fun = fun; + list_append(&dev->lcuda, &cuda->devs); + + ddf_fun_set_conn_handler(fun, cuda_dev_connection); + + rc = ddf_fun_bind(fun); + if (rc != EOK) { + ddf_msg(LVL_ERROR, "Failed binding function '%s'.", name); + goto error; + } + + *rdev = dev; + return EOK; +error: + if (fun != NULL) + ddf_fun_destroy(fun); + return rc; +} + +int cuda_add(cuda_t *cuda, cuda_res_t *res) +{ + adb_dev_t *kbd = NULL; + adb_dev_t *mouse = NULL; + int rc; + + cuda->phys_base = res->base; + + rc = cuda_dev_create(cuda, "kbd", &kbd); + if (rc != EOK) + goto error; + + rc = cuda_dev_create(cuda, "mouse", &mouse); + if (rc != EOK) + goto error; + + cuda->addr_dev[2] = kbd; + cuda->addr_dev[8] = kbd; + + cuda->addr_dev[9] = mouse; + + rc = cuda_init(cuda); + if (rc != EOK) { + ddf_msg(LVL_ERROR, "Failed initializing CUDA hardware."); + return rc; + } + + return EOK; +error: + return rc; +} + +int cuda_remove(cuda_t *cuda) +{ + return ENOTSUP; +} + +int cuda_gone(cuda_t *cuda) +{ + return ENOTSUP; +} + +/** Device connection handler */ +static void cuda_dev_connection(ipc_callid_t iid, ipc_call_t *icall, void *arg) +{ + adb_dev_t *dev = (adb_dev_t *) ddf_fun_data_get((ddf_fun_t *) arg); + ipc_callid_t callid; + ipc_call_t call; + sysarg_t method; + + /* Answer the IPC_M_CONNECT_ME_TO call. */ + async_answer_0(iid, EOK); + + while (true) { + callid = async_get_call(&call); + method = IPC_GET_IMETHOD(call); + + if (!method) { + /* The other side has hung up. */ + async_answer_0(callid, EOK); + return; + } + + async_sess_t *sess = + async_callback_receive_start(EXCHANGE_SERIALIZE, &call); + if (sess != NULL) { + dev->client_sess = sess; + async_answer_0(callid, EOK); + } else { + async_answer_0(callid, EINVAL); + } + } +} + +static int cuda_init(cuda_t *cuda) +{ + int rc; + + void *vaddr; + rc = pio_enable((void *) cuda->phys_base, sizeof(cuda_regs_t), + &vaddr); + if (rc != EOK) + return rc; + + cuda->regs = vaddr; + cuda->xstate = cx_listen; + cuda->bidx = 0; + cuda->snd_bytes = 0; + + fibril_mutex_initialize(&cuda->dev_lock); + + /* Disable all interrupts from CUDA. */ + pio_write_8(&cuda->regs->ier, IER_CLR | ALL_INT); + + cuda_irq_code.ranges[0].base = (uintptr_t) cuda->phys_base; + cuda_irq_code.cmds[0].addr = (void *) &((cuda_regs_t *) + cuda->phys_base)->ifr; + async_irq_subscribe(10, cuda_irq_handler, cuda, &cuda_irq_code); + + /* Enable SR interrupt. */ + pio_write_8(&cuda->regs->ier, TIP | TREQ); + pio_write_8(&cuda->regs->ier, IER_SET | SR_INT); + + /* Enable ADB autopolling. */ + cuda_autopoll_set(cuda, true); + + return EOK; +} + +static void cuda_irq_handler(ipc_callid_t iid, ipc_call_t *call, void *arg) +{ + uint8_t rbuf[CUDA_RCV_BUF_SIZE]; + cuda_t *cuda = (cuda_t *)arg; + size_t len; + bool handle; + + handle = false; + len = 0; + + fibril_mutex_lock(&cuda->dev_lock); + + switch (cuda->xstate) { + case cx_listen: + cuda_irq_listen(cuda); + break; + case cx_receive: + cuda_irq_receive(cuda); + break; + case cx_rcv_end: + cuda_irq_rcv_end(cuda, rbuf, &len); + handle = true; + break; + case cx_send_start: + cuda_irq_send_start(cuda); + break; + case cx_send: + cuda_irq_send(cuda); + break; + } + + /* Lower IFR.SR_INT so that CUDA can generate next int by raising it. */ + pio_write_8(&cuda->regs->ifr, SR_INT); + + fibril_mutex_unlock(&cuda->dev_lock); + + /* Handle an incoming packet. */ + if (handle) + cuda_packet_handle(cuda, rbuf, len); +} + +/** Interrupt in listen state. + * + * Start packet reception. + * + * @param cuda CUDA instance + */ +static void cuda_irq_listen(cuda_t *cuda) +{ + uint8_t b = pio_read_8(&cuda->regs->b); + + if ((b & TREQ) != 0) { + ddf_msg(LVL_WARN, "cuda_irq_listen: no TREQ?!"); + return; + } + + pio_write_8(&cuda->regs->b, b & ~TIP); + cuda->xstate = cx_receive; +} + +/** Interrupt in receive state. + * + * Receive next byte of packet. + * + * @param cuda CUDA instance + */ +static void cuda_irq_receive(cuda_t *cuda) +{ + uint8_t data = pio_read_8(&cuda->regs->sr); + if (cuda->bidx < CUDA_RCV_BUF_SIZE) + cuda->rcv_buf[cuda->bidx++] = data; + + uint8_t b = pio_read_8(&cuda->regs->b); + + if ((b & TREQ) == 0) { + pio_write_8(&cuda->regs->b, b ^ TACK); + } else { + pio_write_8(&cuda->regs->b, b | TACK | TIP); + cuda->xstate = cx_rcv_end; + } +} + +/** Interrupt in rcv_end state. + * + * Terminate packet reception. Either go back to listen state or start + * receiving another packet if CUDA has one for us. + * + * @param cuda CUDA instance + * @param buf Buffer for storing received packet + * @param len Place to store length of received packet + */ +static void cuda_irq_rcv_end(cuda_t *cuda, void *buf, size_t *len) +{ + uint8_t b = pio_read_8(&cuda->regs->b); + + if ((b & TREQ) == 0) { + cuda->xstate = cx_receive; + pio_write_8(&cuda->regs->b, b & ~TIP); + } else { + cuda->xstate = cx_listen; + cuda_send_start(cuda); + } + + memcpy(buf, cuda->rcv_buf, cuda->bidx); + *len = cuda->bidx; + cuda->bidx = 0; +} + +/** Interrupt in send_start state. + * + * Process result of sending first byte (and send second on success). + * + * @param cuda CUDA instance + */ +static void cuda_irq_send_start(cuda_t *cuda) +{ + uint8_t b; + + b = pio_read_8(&cuda->regs->b); + + if ((b & TREQ) == 0) { + /* Collision */ + pio_write_8(&cuda->regs->acr, pio_read_8(&cuda->regs->acr) & + ~SR_OUT); + pio_read_8(&cuda->regs->sr); + pio_write_8(&cuda->regs->b, pio_read_8(&cuda->regs->b) | + TIP | TACK); + cuda->xstate = cx_listen; + return; + } + + pio_write_8(&cuda->regs->sr, cuda->snd_buf[1]); + pio_write_8(&cuda->regs->b, pio_read_8(&cuda->regs->b) ^ TACK); + cuda->bidx = 2; + + cuda->xstate = cx_send; +} + +/** Interrupt in send state. + * + * Send next byte or terminate transmission. + * + * @param cuda CUDA instance + */ +static void cuda_irq_send(cuda_t *cuda) +{ + if (cuda->bidx < cuda->snd_bytes) { + /* Send next byte. */ + pio_write_8(&cuda->regs->sr, + cuda->snd_buf[cuda->bidx++]); + pio_write_8(&cuda->regs->b, pio_read_8(&cuda->regs->b) ^ TACK); + return; + } + + /* End transfer. */ + cuda->snd_bytes = 0; + cuda->bidx = 0; + + pio_write_8(&cuda->regs->acr, pio_read_8(&cuda->regs->acr) & ~SR_OUT); + pio_read_8(&cuda->regs->sr); + pio_write_8(&cuda->regs->b, pio_read_8(&cuda->regs->b) | TACK | TIP); + + cuda->xstate = cx_listen; + /* TODO: Match reply with request. */ +} + +static void cuda_packet_handle(cuda_t *cuda, uint8_t *data, size_t len) +{ + if (data[0] != PT_ADB) + return; + if (len < 2) + return; + + adb_packet_handle(cuda, data + 2, len - 2, (data[1] & 0x40) != 0); +} + +static void adb_packet_handle(cuda_t *cuda, uint8_t *data, size_t size, + bool autopoll) +{ + uint8_t dev_addr; + uint8_t reg_no; + uint16_t reg_val; + adb_dev_t *dev; + unsigned i; + + dev_addr = data[0] >> 4; + reg_no = data[0] & 0x03; + + if (size != 3) { + ddf_msg(LVL_WARN, "Unrecognized packet, size=%zu", size); + for (i = 0; i < size; ++i) { + ddf_msg(LVL_WARN, " 0x%02x", data[i]); + } + return; + } + + if (reg_no != 0) { + ddf_msg(LVL_WARN, "Unrecognized packet, size=%zu", size); + for (i = 0; i < size; ++i) { + ddf_msg(LVL_WARN, " 0x%02x", data[i]); + } + return; + } + + reg_val = ((uint16_t) data[1] << 8) | (uint16_t) data[2]; + + ddf_msg(LVL_DEBUG, "Received ADB packet for device address %d", + dev_addr); + dev = cuda->addr_dev[dev_addr]; + if (dev == NULL) + return; + + async_exch_t *exch = async_exchange_begin(dev->client_sess); + async_msg_1(exch, ADB_REG_NOTIF, reg_val); + async_exchange_end(exch); +} + +static void cuda_autopoll_set(cuda_t *cuda, bool enable) +{ + cuda->snd_buf[0] = PT_CUDA; + cuda->snd_buf[1] = CPT_AUTOPOLL; + cuda->snd_buf[2] = enable ? 0x01 : 0x00; + cuda->snd_bytes = 3; + cuda->bidx = 0; + + cuda_send_start(cuda); +} + +static void cuda_send_start(cuda_t *cuda) +{ + assert(cuda->xstate == cx_listen); + + if (cuda->snd_bytes == 0) + return; + + /* Check for incoming data. */ + if ((pio_read_8(&cuda->regs->b) & TREQ) == 0) + return; + + pio_write_8(&cuda->regs->acr, pio_read_8(&cuda->regs->acr) | SR_OUT); + pio_write_8(&cuda->regs->sr, cuda->snd_buf[0]); + pio_write_8(&cuda->regs->b, pio_read_8(&cuda->regs->b) & ~TIP); + + cuda->xstate = cx_send_start; +} + +/** @} + */ Index: uspace/drv/bus/adb/cuda_adb/cuda_adb.h =================================================================== --- uspace/drv/bus/adb/cuda_adb/cuda_adb.h (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) +++ uspace/drv/bus/adb/cuda_adb/cuda_adb.h (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) @@ -0,0 +1,96 @@ +/* + * Copyright (c) 2006 Martin Decky + * Copyright (c) 2010 Jiri Svoboda + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** @file + */ + +#ifndef CUDA_ADB_H_ +#define CUDA_ADB_H_ + +#include +#include +#include +#include +#include +#include +#include "cuda_hw.h" + +enum { + CUDA_RCV_BUF_SIZE = 5 +}; + +enum cuda_xfer_state { + cx_listen, + cx_receive, + cx_rcv_end, + cx_send_start, + cx_send +}; + +typedef struct { + uintptr_t base; + int irq; +} cuda_res_t; + +/** ADB bus device */ +typedef struct { + ddf_fun_t *fun; + async_sess_t *client_sess; + link_t lcuda; + struct cuda *cuda; +} adb_dev_t; + +/** CUDA ADB bus */ +typedef struct cude { + struct cuda_regs *regs; + uintptr_t phys_base; + ddf_dev_t *dev; + + uint8_t rcv_buf[CUDA_RCV_BUF_SIZE]; + uint8_t snd_buf[CUDA_RCV_BUF_SIZE]; + size_t bidx; + size_t snd_bytes; + enum cuda_xfer_state xstate; + fibril_mutex_t dev_lock; + + list_t devs; + adb_dev_t *addr_dev[ADB_MAX_ADDR]; +} cuda_t; + +extern int cuda_add(cuda_t *, cuda_res_t *); +extern int cuda_remove(cuda_t *); +extern int cuda_gone(cuda_t *); + +#endif + +/** @} + */ Index: uspace/drv/bus/adb/cuda_adb/cuda_adb.ma =================================================================== --- uspace/drv/bus/adb/cuda_adb/cuda_adb.ma (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) +++ uspace/drv/bus/adb/cuda_adb/cuda_adb.ma (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) @@ -0,0 +1,1 @@ +10 cuda_adb Index: uspace/drv/bus/adb/cuda_adb/cuda_hw.h =================================================================== --- uspace/drv/bus/adb/cuda_adb/cuda_hw.h (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) +++ uspace/drv/bus/adb/cuda_adb/cuda_hw.h (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) @@ -0,0 +1,130 @@ +/* + * Copyright (c) 2006 Martin Decky + * Copyright (c) 2010 Jiri Svoboda + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** @file + */ + +#ifndef CUDA_HW_H_ +#define CUDA_HW_H_ + +#include + +typedef struct cuda_regs { + uint8_t b; + uint8_t pad0[0x1ff]; + + uint8_t a; + uint8_t pad1[0x1ff]; + + uint8_t dirb; + uint8_t pad2[0x1ff]; + + uint8_t dira; + uint8_t pad3[0x1ff]; + + uint8_t t1cl; + uint8_t pad4[0x1ff]; + + uint8_t t1ch; + uint8_t pad5[0x1ff]; + + uint8_t t1ll; + uint8_t pad6[0x1ff]; + + uint8_t t1lh; + uint8_t pad7[0x1ff]; + + uint8_t t2cl; + uint8_t pad8[0x1ff]; + + uint8_t t2ch; + uint8_t pad9[0x1ff]; + + uint8_t sr; + uint8_t pad10[0x1ff]; + + uint8_t acr; + uint8_t pad11[0x1ff]; + + uint8_t pcr; + uint8_t pad12[0x1ff]; + + uint8_t ifr; + uint8_t pad13[0x1ff]; + + uint8_t ier; + uint8_t pad14[0x1ff]; + + uint8_t anh; + uint8_t pad15[0x1ff]; +} cuda_regs_t; + +/** B register fields */ +enum { + TREQ = 0x08, + TACK = 0x10, + TIP = 0x20 +}; + +/** IER register fields */ +enum { + IER_CLR = 0x00, + IER_SET = 0x80, + + SR_INT = 0x04, + ALL_INT = 0x7f +}; + +/** ACR register fields */ +enum { + SR_OUT = 0x10 +}; + +/** Packet types */ +enum { + PT_ADB = 0x00, + PT_CUDA = 0x01 +}; + +/** CUDA packet types */ +enum { + CPT_AUTOPOLL = 0x01 +}; + +enum { + ADB_MAX_ADDR = 16 +}; + +#endif + +/** @} + */ Index: uspace/drv/bus/adb/cuda_adb/main.c =================================================================== --- uspace/drv/bus/adb/cuda_adb/main.c (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) +++ uspace/drv/bus/adb/cuda_adb/main.c (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) @@ -0,0 +1,162 @@ +/* + * Copyright (c) 2017 Jiri Svoboda + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** @file VIA-CUDA Apple Desktop Bus driver + */ + +#include +#include +#include +#include +#include + +#include "cuda_adb.h" + +#define NAME "cuda_adb" + +static int cuda_dev_add(ddf_dev_t *dev); +static int cuda_dev_remove(ddf_dev_t *dev); +static int cuda_dev_gone(ddf_dev_t *dev); +static int cuda_fun_online(ddf_fun_t *fun); +static int cuda_fun_offline(ddf_fun_t *fun); + +static driver_ops_t driver_ops = { + .dev_add = cuda_dev_add, + .dev_remove = cuda_dev_remove, + .dev_gone = cuda_dev_gone, + .fun_online = cuda_fun_online, + .fun_offline = cuda_fun_offline +}; + +static driver_t cuda_adb_driver = { + .name = NAME, + .driver_ops = &driver_ops +}; + +static int cuda_get_res(ddf_dev_t *dev, cuda_res_t *res) +{ + async_sess_t *parent_sess; + hw_res_list_parsed_t hw_res; + int rc; + + parent_sess = ddf_dev_parent_sess_get(dev); + if (parent_sess == NULL) + return ENOMEM; + + hw_res_list_parsed_init(&hw_res); + rc = hw_res_get_list_parsed(parent_sess, &hw_res, 0); + if (rc != EOK) + return rc; + + if (hw_res.io_ranges.count != 1) { + rc = EINVAL; + goto error; + } + + res->base = RNGABS(hw_res.io_ranges.ranges[0]); + + if (hw_res.irqs.count != 1) { + rc = EINVAL; + goto error; + } + + res->irq = hw_res.irqs.irqs[0]; + + return EOK; +error: + hw_res_list_parsed_clean(&hw_res); + return rc; +} + +static int cuda_dev_add(ddf_dev_t *dev) +{ + cuda_t *cuda; + cuda_res_t cuda_res; + int rc; + + ddf_msg(LVL_DEBUG, "cuda_dev_add(%p)", dev); + cuda = ddf_dev_data_alloc(dev, sizeof(cuda_t)); + if (cuda == NULL) { + ddf_msg(LVL_ERROR, "Failed allocating soft state."); + return ENOMEM; + } + + cuda->dev = dev; + list_initialize(&cuda->devs); + + rc = cuda_get_res(dev, &cuda_res); + if (rc != EOK) { + ddf_msg(LVL_ERROR, "Failed getting hardware resource list.\n"); + return EIO; + } + + return cuda_add(cuda, &cuda_res); +} + +static int cuda_dev_remove(ddf_dev_t *dev) +{ + cuda_t *cuda = (cuda_t *)ddf_dev_data_get(dev); + + ddf_msg(LVL_DEBUG, "cuda_dev_remove(%p)", dev); + + return cuda_remove(cuda); +} + +static int cuda_dev_gone(ddf_dev_t *dev) +{ + cuda_t *cuda = (cuda_t *)ddf_dev_data_get(dev); + + ddf_msg(LVL_DEBUG, "cuda_dev_gone(%p)", dev); + + return cuda_gone(cuda); +} + +static int cuda_fun_online(ddf_fun_t *fun) +{ + ddf_msg(LVL_DEBUG, "cuda_fun_online()"); + return ddf_fun_online(fun); +} + +static int cuda_fun_offline(ddf_fun_t *fun) +{ + ddf_msg(LVL_DEBUG, "cuda_fun_offline()"); + return ddf_fun_offline(fun); +} + +int main(int argc, char *argv[]) +{ + printf(NAME ": VIA-CUDA Apple Desktop Bus driver\n"); + ddf_log_init(NAME); + return ddf_driver_main(&cuda_adb_driver); +} + +/** @} + */ Index: uspace/drv/bus/isa/i8237.c =================================================================== --- uspace/drv/bus/isa/i8237.c (revision dbf32b10e7146a1f953c4eda94c63b8ac246f0ba) +++ uspace/drv/bus/isa/i8237.c (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) @@ -371,5 +371,5 @@ /* 16 bit transfers are a bit special */ - ddf_msg(LVL_DEBUG, "Unspoiled address %#" PRIx32 " (size %" PRIu16 ")", + ddf_msg(LVL_DEBUG, "Unspoiled address %#" PRIx32 " (size %" PRIu32 ")", pa, size); if (is_dma16(channel)) { @@ -388,5 +388,5 @@ ddf_msg(LVL_DEBUG, "Setting channel %u to address %#" PRIx32 " " - "(size %" PRIu16 "), mode %hhx.", channel, pa, size, mode); + "(size %" PRIu32 "), mode %hhx.", channel, pa, size, mode); /* Mask DMA request */ Index: uspace/drv/bus/isa/isa.c =================================================================== --- uspace/drv/bus/isa/isa.c (revision dbf32b10e7146a1f953c4eda94c63b8ac246f0ba) +++ uspace/drv/bus/isa/isa.c (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) @@ -115,24 +115,47 @@ } -static bool isa_fun_enable_interrupt(ddf_fun_t *fnode) -{ - /* This is an old ugly way, copied from pci driver */ - assert(fnode); +static bool isa_fun_owns_interrupt(isa_fun_t *fun, int irq) +{ + const hw_resource_list_t *res = &fun->hw_resources; + + /* Check that specified irq really belongs to the function */ + for (size_t i = 0; i < res->count; ++i) { + if (res->resources[i].type == INTERRUPT && + res->resources[i].res.interrupt.irq == irq) { + return true; + } + } + + return false; +} + +static int isa_fun_enable_interrupt(ddf_fun_t *fnode, int irq) +{ isa_fun_t *fun = isa_fun(fnode); - assert(fun); - - const hw_resource_list_t *res = &fun->hw_resources; - assert(res); - for (size_t i = 0; i < res->count; ++i) { - if (res->resources[i].type == INTERRUPT) { - int rc = irc_enable_interrupt( - res->resources[i].res.interrupt.irq); - - if (rc != EOK) - return false; - } - } - - return true; + + if (!isa_fun_owns_interrupt(fun, irq)) + return EINVAL; + + return irc_enable_interrupt(irq); +} + +static int isa_fun_disable_interrupt(ddf_fun_t *fnode, int irq) +{ + isa_fun_t *fun = isa_fun(fnode); + + if (!isa_fun_owns_interrupt(fun, irq)) + return EINVAL; + + return irc_disable_interrupt(irq); +} + +static int isa_fun_clear_interrupt(ddf_fun_t *fnode, int irq) +{ + isa_fun_t *fun = isa_fun(fnode); + + if (!isa_fun_owns_interrupt(fun, irq)) + return EINVAL; + + return irc_clear_interrupt(irq); } @@ -185,4 +208,6 @@ .get_resource_list = isa_fun_get_resources, .enable_interrupt = isa_fun_enable_interrupt, + .disable_interrupt = isa_fun_disable_interrupt, + .clear_interrupt = isa_fun_clear_interrupt, .dma_channel_setup = isa_fun_setup_dma, .dma_channel_remain = isa_fun_remain_dma, @@ -643,5 +668,5 @@ list_initialize(&isa->functions); - sess = ddf_dev_parent_sess_create(dev); + sess = ddf_dev_parent_sess_get(dev); if (sess == NULL) { ddf_msg(LVL_ERROR, "isa_dev_add failed to connect to the " Index: uspace/drv/bus/pci/pciintel/pci.c =================================================================== --- uspace/drv/bus/pci/pciintel/pci.c (revision dbf32b10e7146a1f953c4eda94c63b8ac246f0ba) +++ uspace/drv/bus/pci/pciintel/pci.c (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) @@ -99,23 +99,47 @@ } -static bool pciintel_enable_interrupt(ddf_fun_t *fnode) -{ - /* This is an old ugly way */ - assert(fnode); - pci_fun_t *dev_data = pci_fun(fnode); - - size_t i = 0; - hw_resource_list_t *res = &dev_data->hw_resources; - for (; i < res->count; i++) { - if (res->resources[i].type == INTERRUPT) { - int rc = irc_enable_interrupt( - res->resources[i].res.interrupt.irq); - - if (rc != EOK) - return false; +static int pciintel_fun_owns_interrupt(pci_fun_t *fun, int irq) +{ + size_t i; + hw_resource_list_t *res = &fun->hw_resources; + + for (i = 0; i < res->count; i++) { + if (res->resources[i].type == INTERRUPT && + res->resources[i].res.interrupt.irq == irq) { + return true; } } - return true; + return false; +} + +static int pciintel_enable_interrupt(ddf_fun_t *fnode, int irq) +{ + pci_fun_t *fun = pci_fun(fnode); + + if (!pciintel_fun_owns_interrupt(fun, irq)) + return EINVAL; + + return irc_enable_interrupt(irq); +} + +static int pciintel_disable_interrupt(ddf_fun_t *fnode, int irq) +{ + pci_fun_t *fun = pci_fun(fnode); + + if (!pciintel_fun_owns_interrupt(fun, irq)) + return EINVAL; + + return irc_disable_interrupt(irq); +} + +static int pciintel_clear_interrupt(ddf_fun_t *fnode, int irq) +{ + pci_fun_t *fun = pci_fun(fnode); + + if (!pciintel_fun_owns_interrupt(fun, irq)) + return EINVAL; + + return irc_clear_interrupt(irq); } @@ -187,4 +211,6 @@ .get_resource_list = &pciintel_get_resources, .enable_interrupt = &pciintel_enable_interrupt, + .disable_interrupt = &pciintel_disable_interrupt, + .clear_interrupt = &pciintel_clear_interrupt, }; @@ -683,5 +709,5 @@ bus->dnode = dnode; - sess = ddf_dev_parent_sess_create(dnode); + sess = ddf_dev_parent_sess_get(dnode); if (sess == NULL) { ddf_msg(LVL_ERROR, "pci_dev_add failed to connect to the " Index: uspace/drv/bus/usb/ehci/res.c =================================================================== --- uspace/drv/bus/usb/ehci/res.c (revision dbf32b10e7146a1f953c4eda94c63b8ac246f0ba) +++ uspace/drv/bus/usb/ehci/res.c (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) @@ -39,5 +39,5 @@ #include #include -#include +#include #include #include @@ -176,7 +176,6 @@ assert(device); - async_sess_t *parent_sess = devman_parent_device_connect( - ddf_dev_get_handle(device), IPC_FLAG_BLOCKING); - if (!parent_sess) + async_sess_t *parent_sess = ddf_dev_parent_sess_get(device); + if (parent_sess == NULL) return ENOMEM; Index: uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.c =================================================================== --- uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.c (revision dbf32b10e7146a1f953c4eda94c63b8ac246f0ba) +++ uspace/drv/bus/usb/ohci/hw_struct/transfer_descriptor.c (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) @@ -78,5 +78,5 @@ /* Allow less data on input. */ - if (dir == USB_DIRECTION_IN) { + if (direction == USB_DIRECTION_IN) { OHCI_MEM32_SET(instance->status, TD_STATUS_ROUND_FLAG); } Index: uspace/drv/bus/usb/ohci/ohci_rh.c =================================================================== --- uspace/drv/bus/usb/ohci/ohci_rh.c (revision dbf32b10e7146a1f953c4eda94c63b8ac246f0ba) +++ uspace/drv/bus/usb/ohci/ohci_rh.c (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) @@ -361,5 +361,5 @@ case USB_HUB_FEATURE_C_PORT_RESET: /*20*/ usb_log_debug2("Clearing port C_CONNECTION, C_ENABLE, " - "C_SUSPEND, C_OC or C_RESET on port %"PRIu16".\n", port); + "C_SUSPEND, C_OC or C_RESET on port %u.\n", port); /* Bit offsets correspond to the feature number */ OHCI_WR(hub->registers->rh_port_status[port], @@ -410,5 +410,5 @@ case USB_HUB_FEATURE_PORT_RESET: /*4*/ usb_log_debug2("Setting port POWER, ENABLE, SUSPEND or RESET " - "on port %"PRIu16".\n", port); + "on port %u.\n", port); /* Bit offsets correspond to the feature number */ OHCI_WR(hub->registers->rh_port_status[port], 1 << feature); Index: uspace/drv/bus/usb/uhci/main.c =================================================================== --- uspace/drv/bus/usb/uhci/main.c (revision dbf32b10e7146a1f953c4eda94c63b8ac246f0ba) +++ uspace/drv/bus/usb/uhci/main.c (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) @@ -36,5 +36,4 @@ #include #include -#include #include #include @@ -123,15 +122,11 @@ assert(device); - async_sess_t *parent_sess = devman_parent_device_connect( - ddf_dev_get_handle(device), IPC_FLAG_BLOCKING); - if (!parent_sess) + async_sess_t *parent_sess = ddf_dev_parent_sess_get(device); + if (parent_sess == NULL) return ENOMEM; /* See UHCI design guide page 45 for these values. * Write all WC bits in USB legacy register */ - const int rc = pci_config_space_write_16(parent_sess, 0xc0, 0xaf00); - - async_hangup(parent_sess); - return rc; + return pci_config_space_write_16(parent_sess, 0xc0, 0xaf00); } Index: uspace/drv/bus/usb/usbhub/status.h =================================================================== --- uspace/drv/bus/usb/usbhub/status.h (revision dbf32b10e7146a1f953c4eda94c63b8ac246f0ba) +++ uspace/drv/bus/usb/usbhub/status.h (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) @@ -35,6 +35,4 @@ #define HUB_STATUS_H -#include -#include #include Index: uspace/drv/bus/usb/usbhub/usbhub.h =================================================================== --- uspace/drv/bus/usb/usbhub/usbhub.h (revision dbf32b10e7146a1f953c4eda94c63b8ac246f0ba) +++ uspace/drv/bus/usb/usbhub/usbhub.h (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) @@ -38,5 +38,4 @@ #define DRV_USBHUB_USBHUB_H -#include #include @@ -72,5 +71,5 @@ /** Condition variable for pending_ops_count. */ fibril_condvar_t pending_ops_cv; - /** Pointer to devman usbhub function. */ + /** Pointer to usbhub function. */ ddf_fun_t *hub_fun; /** Status indicator */ Index: uspace/drv/bus/usb/usbmid/explore.c =================================================================== --- uspace/drv/bus/usb/usbmid/explore.c (revision dbf32b10e7146a1f953c4eda94c63b8ac246f0ba) +++ uspace/drv/bus/usb/usbmid/explore.c (revision 95c675b4aa3fea7b424b73892a90b052c673cfd3) @@ -132,5 +132,5 @@ * * @param dev Device to be explored. - * @return Whether to accept this device from devman. + * @return Whether to accept this device. */ int usbmid_explore_device(usb_device_t *dev)