Changes in kernel/arch/sparc64/include/trap/interrupt.h [965dc18:95c4776] in mainline
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kernel/arch/sparc64/include/trap/interrupt.h
r965dc18 r95c4776 32 32 /** 33 33 * @file 34 * @brief This file contains interrupt vector trap handler. 34 * @brief This file contains level N interrupt and inter-processor interrupt 35 * trap handler. 35 36 */ 36 37 #ifndef KERN_sparc64_TRAP_INTERRUPT_H_ 38 #define KERN_sparc64_TRAP_INTERRUPT_H_ 39 40 #include <arch/trap/trap_table.h> 41 #include <arch/stack.h> 42 43 /* IMAP register bits */ 44 #define IGN_MASK 0x7c0 45 #define INO_MASK 0x1f 46 #define IMAP_V_MASK (1ULL << 31) 47 48 #define IGN_SHIFT 6 49 50 51 /* Interrupt ASI registers. */ 52 #define ASI_INTR_W 0x77 53 #define ASI_INTR_DISPATCH_STATUS 0x48 54 #define ASI_INTR_R 0x7f 55 #define ASI_INTR_RECEIVE 0x49 56 57 /* VA's used with ASI_INTR_W register. */ 58 #if defined (US) 59 #define ASI_UDB_INTR_W_DATA_0 0x40 60 #define ASI_UDB_INTR_W_DATA_1 0x50 61 #define ASI_UDB_INTR_W_DATA_2 0x60 62 #elif defined (US3) 63 #define VA_INTR_W_DATA_0 0x40 64 #define VA_INTR_W_DATA_1 0x48 65 #define VA_INTR_W_DATA_2 0x50 66 #define VA_INTR_W_DATA_3 0x58 67 #define VA_INTR_W_DATA_4 0x60 68 #define VA_INTR_W_DATA_5 0x68 69 #define VA_INTR_W_DATA_6 0x80 70 #define VA_INTR_W_DATA_7 0x88 71 #endif 72 #define VA_INTR_W_DISPATCH 0x70 73 74 /* VA's used with ASI_INTR_R register. */ 75 #if defined(US) 76 #define ASI_UDB_INTR_R_DATA_0 0x40 77 #define ASI_UDB_INTR_R_DATA_1 0x50 78 #define ASI_UDB_INTR_R_DATA_2 0x60 79 #elif defined (US3) 80 #define VA_INTR_R_DATA_0 0x40 81 #define VA_INTR_R_DATA_1 0x48 82 #define VA_INTR_R_DATA_2 0x50 83 #define VA_INTR_R_DATA_3 0x58 84 #define VA_INTR_R_DATA_4 0x60 85 #define VA_INTR_R_DATA_5 0x68 86 #define VA_INTR_R_DATA_6 0x80 87 #define VA_INTR_R_DATA_7 0x88 88 #endif 89 90 /* Shifts in the Interrupt Vector Dispatch virtual address. */ 91 #define INTR_VEC_DISPATCH_MID_SHIFT 14 92 93 /* Bits in the Interrupt Dispatch Status register. */ 94 #define INTR_DISPATCH_STATUS_NACK 0x2 95 #define INTR_DISPATCH_STATUS_BUSY 0x1 37 #ifndef KERN_sparc64_INTERRUPT_TRAP_H_ 38 #define KERN_sparc64_INTERRUPT_TRAP_H_ 96 39 97 40 #define TT_INTERRUPT_LEVEL_1 0x41 … … 111 54 #define TT_INTERRUPT_LEVEL_15 0x4f 112 55 113 #define TT_INTERRUPT_VECTOR_TRAP 0x6056 #define INTERRUPT_LEVEL_N_HANDLER_SIZE TRAP_TABLE_ENTRY_SIZE 114 57 115 #define INTERRUPT_LEVEL_N_HANDLER_SIZE TRAP_TABLE_ENTRY_SIZE 116 #define INTERRUPT_VECTOR_TRAP_HANDLER_SIZE TRAP_TABLE_ENTRY_SIZE 58 /* IMAP register bits */ 59 #define IGN_MASK 0x7c0 60 #define INO_MASK 0x1f 61 #define IMAP_V_MASK (1ULL << 31) 62 63 #define IGN_SHIFT 6 64 117 65 118 66 #ifdef __ASM__ … … 121 69 PREEMPTIBLE_HANDLER exc_dispatch 122 70 .endm 123 124 .macro INTERRUPT_VECTOR_TRAP_HANDLER 125 PREEMPTIBLE_HANDLER interrupt 126 .endm 127 #endif /* __ASM__ */ 71 #endif 128 72 129 73 #ifndef __ASM__ … … 134 78 #endif /* !def __ASM__ */ 135 79 80 81 #if defined (SUN4U) 82 #include <arch/trap/sun4u/interrupt.h> 83 #elif defined (SUN4V) 84 #include <arch/trap/sun4v/interrupt.h> 85 #endif 86 136 87 #endif 137 88
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