Index: kernel/arch/arm32/include/arch/asm.h
===================================================================
--- kernel/arch/arm32/include/arch/asm.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
+++ kernel/arch/arm32/include/arch/asm.h	(revision 95aed62f997beed657c99c003a81e20a7a71d608)
@@ -105,5 +105,5 @@
 {
 	uintptr_t v;
-	
+
 	asm volatile (
 		"and %[v], sp, %[size]\n"
@@ -111,5 +111,5 @@
 		: [size] "r" (~(STACK_SIZE - 1))
 	);
-	
+
 	return v;
 }
Index: kernel/arch/arm32/include/arch/atomic.h
===================================================================
--- kernel/arch/arm32/include/arch/atomic.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
+++ kernel/arch/arm32/include/arch/atomic.h	(revision 95aed62f997beed657c99c003a81e20a7a71d608)
@@ -59,5 +59,5 @@
 	atomic_count_t ret = val->count;
 	interrupts_restore(ipl);
-	
+
 	return ret;
 }
Index: kernel/arch/arm32/include/arch/mm/page_armv4.h
===================================================================
--- kernel/arch/arm32/include/arch/mm/page_armv4.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
+++ kernel/arch/arm32/include/arch/mm/page_armv4.h	(revision 95aed62f997beed657c99c003a81e20a7a71d608)
@@ -137,5 +137,5 @@
 	pte_level0_t *p = &pt[i].l0;
 	int np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT);
-	
+
 	return (np << PAGE_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) |
 	    (1 << PAGE_READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) |
@@ -152,8 +152,8 @@
 {
 	pte_level1_t *p = &pt[i].l1;
-	
+
 	int dt = p->descriptor_type;
 	int ap = p->access_permission_0;
-	
+
 	return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) |
 	    ((ap == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT) |
@@ -177,5 +177,5 @@
 {
 	pte_level0_t *p = &pt[i].l0;
-	
+
 	if (flags & PAGE_NOT_PRESENT) {
 		p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT;
@@ -206,17 +206,17 @@
 {
 	pte_level1_t *p = &pt[i].l1;
-	
+
 	if (flags & PAGE_NOT_PRESENT)
 		p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT;
 	else
 		p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE;
-	
+
 	p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0;
-	
+
 	/* default access permission */
 	p->access_permission_0 = p->access_permission_1 =
 	    p->access_permission_2 = p->access_permission_3 =
 	    PTE_AP_USER_NO_KERNEL_RW;
-	
+
 	if (flags & PAGE_USER)  {
 		if (flags & PAGE_READ) {
Index: kernel/arch/arm32/include/arch/mm/page_armv6.h
===================================================================
--- kernel/arch/arm32/include/arch/mm/page_armv6.h	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
+++ kernel/arch/arm32/include/arch/mm/page_armv6.h	(revision 95aed62f997beed657c99c003a81e20a7a71d608)
@@ -170,5 +170,5 @@
 	const pte_level0_t *p = &pt[i].l0;
 	const unsigned np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT);
-	
+
 	return (np << PAGE_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) |
 	    (1 << PAGE_READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) |
@@ -185,9 +185,9 @@
 {
 	const pte_level1_t *p = &pt[i].l1;
-	
+
 	const unsigned dt = p->descriptor_type;
 	const unsigned ap0 = p->access_permission_0;
 	const unsigned ap1 = p->access_permission_1;
-	
+
 	return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) |
 	    ((dt != PTE_DESCRIPTOR_SMALL_PAGE_NX) << PAGE_EXEC_SHIFT) |
@@ -211,5 +211,5 @@
 {
 	pte_level0_t *p = &pt[i].l0;
-	
+
 	if (flags & PAGE_NOT_PRESENT) {
 		p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT;
@@ -245,5 +245,5 @@
 {
 	pte_level1_t *p = &pt[i].l1;
-	
+
 	if (flags & PAGE_NOT_PRESENT) {
 		p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT;
@@ -278,14 +278,14 @@
 		p->bufferable = 1;
 	}
-	
+
 	/* Shareable is ignored for devices (non-cacheable),
 	 * turn it off for normal memory. */
 	p->shareable = 0;
-	
+
 	p->non_global = !(flags & PAGE_GLOBAL);
-	
+
 	/* default access permission: kernel only*/
 	p->access_permission_0 = PTE_AP0_USER_NO_KERNEL_FULL;
-	
+
 	if (flags & PAGE_USER) {
 		p->access_permission_0 = PTE_AP0_USER_FULL_KERNEL_FULL;