Index: kernel/arch/ia32/include/asm.h
===================================================================
--- kernel/arch/ia32/include/asm.h	(revision 82b72e401e53bd1d38280c3f1cc11cc0e83fbae4)
+++ kernel/arch/ia32/include/asm.h	(revision 94f8e3c12f3631587fc47bc8a061c59efb915ec5)
@@ -248,4 +248,20 @@
 }
 
+/** Write to MSR */
+static inline void write_msr(uint32_t msr, uint64_t value)
+{
+	asm volatile ("wrmsr" : : "c" (msr), "a" ((uint32_t)(value)),
+	    "d" ((uint32_t)(value >> 32)));
+}
+
+static inline uint64_t read_msr(uint32_t msr)
+{
+	uint32_t ax, dx;
+
+	asm volatile ("rdmsr" : "=a"(ax), "=d"(dx) : "c" (msr));
+	return ((uint64_t)dx << 32) | ax;
+}
+
+
 /** Return base address of current stack
  *
Index: kernel/arch/ia32/include/cpu.h
===================================================================
--- kernel/arch/ia32/include/cpu.h	(revision 82b72e401e53bd1d38280c3f1cc11cc0e83fbae4)
+++ kernel/arch/ia32/include/cpu.h	(revision 94f8e3c12f3631587fc47bc8a061c59efb915ec5)
@@ -36,9 +36,18 @@
 #define KERN_ia32_CPU_H_
 
+#define EFLAGS_IF       (1 << 9)
+#define EFLAGS_RF       (1 << 16)
+
+#define CR4_OSFXSR_MASK (1<<9)
+
+/* Support for SYSENTER and SYSEXIT */
+#define IA32_MSR_SYSENTER_CS	0x174
+#define IA32_MSR_SYSENTER_ESP	0x175
+#define IA32_MSR_SYSENTER_EIP	0x176
+
+#ifndef __ASM__
+
 #include <arch/pm.h>
 #include <arch/asm.h>
-
-#define EFLAGS_IF       (1 << 9)
-#define EFLAGS_RF       (1 << 16)
 
 typedef struct {
@@ -52,6 +61,5 @@
 } cpu_arch_t;
 
-
-#define CR4_OSFXSR_MASK (1<<9)
+#endif
 
 #endif
Index: kernel/arch/ia32/include/syscall.h
===================================================================
--- kernel/arch/ia32/include/syscall.h	(revision 94f8e3c12f3631587fc47bc8a061c59efb915ec5)
+++ kernel/arch/ia32/include/syscall.h	(revision 94f8e3c12f3631587fc47bc8a061c59efb915ec5)
@@ -0,0 +1,1 @@
+../../amd64/include/syscall.h