Index: boot/arch/arm32/src/mm.c
===================================================================
--- boot/arch/arm32/src/mm.c	(revision 2826998bbecee0bf5a27635707da0db286c328a3)
+++ boot/arch/arm32/src/mm.c	(revision 949869d2e42c585807fd47d9e647bc004522407f)
@@ -120,7 +120,7 @@
 		
 #ifdef PROCESSOR_armv7_a
-		/* Mask to enable paging, I-cache D-cache
+		/* Mask to enable paging, I-cache D-cache and branch predict
 		 * See kernel/arch/arm32/include/regutils.h for bit values.*/
-		"ldr r1, =0x00001005\n"
+		"ldr r1, =0x00001805\n"
 #else
 		/* Mask to enable paging */
Index: kernel/arch/arm32/src/cpu/cpu.c
===================================================================
--- kernel/arch/arm32/src/cpu/cpu.c	(revision 2826998bbecee0bf5a27635707da0db286c328a3)
+++ kernel/arch/arm32/src/cpu/cpu.c	(revision 949869d2e42c585807fd47d9e647bc004522407f)
@@ -129,4 +129,6 @@
 	control_reg |= CP15_R1_CACHE_EN | CP15_R1_INST_CACHE_EN;
 	
+	/* Enable branch prediction */
+	control_reg |= CP15_R1_BRANCH_PREDICT_EN;
 	asm volatile (
 		"mcr p15, 0, %[control_reg], c1, c0"