Index: kernel/arch/arm32/include/arch/mm/page.h
===================================================================
--- kernel/arch/arm32/include/arch/mm/page.h	(revision ae5fb7c8167b12c7be26bb5b4830aa37837e6eba)
+++ kernel/arch/arm32/include/arch/mm/page.h	(revision 8e77b60eb9a6d9795e56ef452732a0eb498ca046)
@@ -154,5 +154,5 @@
 {
 	uint32_t val = (uint32_t)pt & TTBR_ADDR_MASK;
-	val |= TTBR_RGN_WT_CACHE | TTBR_C_FLAG;
+	val |= TTBR_RGN_WBWA_CACHE | TTBR_C_FLAG;
 	TTBR0_write(val);
 }
Index: kernel/arch/arm32/include/arch/mm/page_armv6.h
===================================================================
--- kernel/arch/arm32/include/arch/mm/page_armv6.h	(revision ae5fb7c8167b12c7be26bb5b4830aa37837e6eba)
+++ kernel/arch/arm32/include/arch/mm/page_armv6.h	(revision 8e77b60eb9a6d9795e56ef452732a0eb498ca046)
@@ -265,8 +265,7 @@
 		 * set_ptl0_addr (kernel/arch/arm32/include/arch/mm/page.h)
 		 */
-		//TODO: Use writeback, write-allocate caches
-		p->tex = 6;
-		p->cacheable = 1;
-		p->bufferable = 0;
+		p->tex = 5;
+		p->cacheable = 0;
+		p->bufferable = 1;
 	} else {
 		/*