Index: kernel/arch/sparc64/src/mm/sun4v/as.c
===================================================================
--- kernel/arch/sparc64/src/mm/sun4v/as.c	(revision 7254df6b9c028277faef1784d448e4999d6330ab)
+++ kernel/arch/sparc64/src/mm/sun4v/as.c	(revision 8e670dd092f7b844f4aab37e24535fa37e8fe4ef)
@@ -66,20 +66,19 @@
 {
 #ifdef CONFIG_TSB
-	uintptr_t tsb =
-	    frame_alloc(SIZE2FRAMES(TSB_ENTRY_COUNT * sizeof(tsb_entry_t)),
-	    flags, 0);
-	if (!tsb)
+	uintptr_t tsb_base = frame_alloc(TSB_FRAMES, flags, TSB_SIZE - 1);
+	if (!tsb_base)
 		return -1;
-	
+
+	tsb_entry_t *tsb = (tsb_entry_t *) PA2KA(tsb_base);
+
 	as->arch.tsb_description.page_size = PAGESIZE_8K;
 	as->arch.tsb_description.associativity = 1;
 	as->arch.tsb_description.num_ttes = TSB_ENTRY_COUNT;
 	as->arch.tsb_description.pgsize_mask = 1 << PAGESIZE_8K;
-	as->arch.tsb_description.tsb_base = tsb;
+	as->arch.tsb_description.tsb_base = tsb_base;
 	as->arch.tsb_description.reserved = 0;
 	as->arch.tsb_description.context = 0;
 	
-	memsetb((void *) PA2KA(as->arch.tsb_description.tsb_base),
-		TSB_ENTRY_COUNT * sizeof(tsb_entry_t), 0);
+	memsetb(tsb, TSB_SIZE, 0);
 #endif
 	
@@ -90,8 +89,7 @@
 {
 #ifdef CONFIG_TSB
-	size_t frames = SIZE2FRAMES(TSB_ENTRY_COUNT * sizeof(tsb_entry_t));
-	frame_free(as->arch.tsb_description.tsb_base, frames);
+	frame_free(as->arch.tsb_description.tsb_base, TSB_FRAMES);
 	
-	return frames;
+	return TSB_FRAMES;
 #else
 	return 0;
@@ -126,5 +124,5 @@
 	uintptr_t tsb = PA2KA(as->arch.tsb_description.tsb_base);
 	
-	if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
+	if (!overlaps(tsb, TSB_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
 		/*
 		 * TSBs were allocated from memory not covered
@@ -137,5 +135,5 @@
 	}
 	
-	__hypercall_fast2(MMU_TSB_CTXNON0, 1, KA2PA(&(as->arch.tsb_description)));
+	__hypercall_fast2(MMU_TSB_CTXNON0, 1, KA2PA(&as->arch.tsb_description));
 #endif
 }
@@ -166,5 +164,5 @@
 	uintptr_t tsb = PA2KA(as->arch.tsb_description.tsb_base);
 	
-	if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
+	if (!overlaps(tsb, TSB_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) {
 		/*
 		 * TSBs were allocated from memory not covered
Index: kernel/arch/sparc64/src/mm/sun4v/tsb.c
===================================================================
--- kernel/arch/sparc64/src/mm/sun4v/tsb.c	(revision 7254df6b9c028277faef1784d448e4999d6330ab)
+++ kernel/arch/sparc64/src/mm/sun4v/tsb.c	(revision 8e670dd092f7b844f4aab37e24535fa37e8fe4ef)
@@ -44,6 +44,4 @@
 #include <debug.h>
 
-#define TSB_INDEX_MASK	((1 << (21 + 1 + TSB_SIZE - MMU_PAGE_WIDTH)) - 1)
-
 /** Invalidate portion of TSB.
  *
@@ -58,4 +56,5 @@
 void tsb_invalidate(as_t *as, uintptr_t page, size_t pages)
 {
+	tsb_entry_t *tsb;
 	size_t i0, i;
 	size_t cnt;
@@ -63,16 +62,14 @@
 	ASSERT(as->arch.tsb_description.tsb_base);
 	
-	i0 = (page >> MMU_PAGE_WIDTH) & TSB_INDEX_MASK;
-	ASSERT(i0 < TSB_ENTRY_COUNT);
+	i0 = (page >> MMU_PAGE_WIDTH) & TSB_ENTRY_MASK;
 
-	if (pages == (size_t) - 1 || (pages) > TSB_ENTRY_COUNT)
+	if (pages == (size_t) -1 || pages > TSB_ENTRY_COUNT)
 		cnt = TSB_ENTRY_COUNT;
 	else
 		cnt = pages;
 	
-	for (i = 0; i < cnt; i++) {
-		((tsb_entry_t *) PA2KA(as->arch.tsb_description.tsb_base))[
-			(i0 + i) & (TSB_ENTRY_COUNT - 1)].data.v = false;
-	}
+	tsb = (tsb_entry_t *) PA2KA(as->arch.tsb_description.tsb_base);
+	for (i = 0; i < cnt; i++)
+		tsb[(i0 + i) & TSB_ENTRY_MASK].data.v = false;
 }
 
@@ -85,10 +82,12 @@
 	as_t *as;
 	tsb_entry_t *tsb;
-	size_t entry;
+	tsb_entry_t *tte;
+	size_t index;
 
 	as = t->as;
-	entry = (t->page >> MMU_PAGE_WIDTH) & TSB_INDEX_MASK; 
-	ASSERT(entry < TSB_ENTRY_COUNT);
-	tsb = &((tsb_entry_t *) PA2KA(as->arch.tsb_description.tsb_base))[entry];
+	index = (t->page >> MMU_PAGE_WIDTH) & TSB_ENTRY_MASK; 
+	
+	tsb = (tsb_entry_t *) PA2KA(as->arch.tsb_description.tsb_base);
+	tte = &tsb[index];
 
 	/*
@@ -98,25 +97,25 @@
 	 */
 
-	tsb->data.v = false;
+	tte->data.v = false;
 
 	write_barrier();
 
-	tsb->tag.va_tag = t->page >> VA_TAG_PAGE_SHIFT;
+	tte->tag.va_tag = t->page >> VA_TAG_PAGE_SHIFT;
 
-	tsb->data.value = 0;
-	tsb->data.nfo = false;
-	tsb->data.ra = t->frame >> MMU_FRAME_WIDTH;
-	tsb->data.ie = false;
-	tsb->data.e = false;
-	tsb->data.cp = t->c;	/* cp as cache in phys.-idxed, c as cacheable */
-	tsb->data.cv = false;
-	tsb->data.p = t->k;	/* p as privileged, k as kernel */
-	tsb->data.x = true;
-	tsb->data.w = false;
-	tsb->data.size = PAGESIZE_8K;
+	tte->data.value = 0;
+	tte->data.nfo = false;
+	tte->data.ra = t->frame >> MMU_FRAME_WIDTH;
+	tte->data.ie = false;
+	tte->data.e = false;
+	tte->data.cp = t->c;	/* cp as cache in phys.-idxed, c as cacheable */
+	tte->data.cv = false;
+	tte->data.p = t->k;	/* p as privileged, k as kernel */
+	tte->data.x = true;
+	tte->data.w = false;
+	tte->data.size = PAGESIZE_8K;
 	
 	write_barrier();
 	
-	tsb->data.v = t->p;	/* v as valid, p as present */
+	tte->data.v = t->p;	/* v as valid, p as present */
 }
 
@@ -130,10 +129,11 @@
 	as_t *as;
 	tsb_entry_t *tsb;
-	size_t entry;
+	tsb_entry_t *tte;
+	size_t index;
 
 	as = t->as;
-	entry = (t->page >> MMU_PAGE_WIDTH) & TSB_INDEX_MASK; 
-	ASSERT(entry < TSB_ENTRY_COUNT);
-	tsb = &((tsb_entry_t *) PA2KA(as->arch.tsb_description.tsb_base))[entry];
+	index = (t->page >> MMU_PAGE_WIDTH) & TSB_ENTRY_MASK;
+	tsb = (tsb_entry_t *) PA2KA(as->arch.tsb_description.tsb_base);
+	tte = &tsb[index];
 
 	/*
@@ -143,27 +143,27 @@
 	 */
 
-	tsb->data.v = false;
+	tte->data.v = false;
 
 	write_barrier();
 
-	tsb->tag.va_tag = t->page >> VA_TAG_PAGE_SHIFT;
+	tte->tag.va_tag = t->page >> VA_TAG_PAGE_SHIFT;
 
-	tsb->data.value = 0;
-	tsb->data.nfo = false;
-	tsb->data.ra = t->frame >> MMU_FRAME_WIDTH;
-	tsb->data.ie = false;
-	tsb->data.e = false;
-	tsb->data.cp = t->c;	/* cp as cache in phys.-idxed, c as cacheable */
+	tte->data.value = 0;
+	tte->data.nfo = false;
+	tte->data.ra = t->frame >> MMU_FRAME_WIDTH;
+	tte->data.ie = false;
+	tte->data.e = false;
+	tte->data.cp = t->c;	/* cp as cache in phys.-idxed, c as cacheable */
 #ifdef CONFIG_VIRT_IDX_DCACHE
-	tsb->data.cv = t->c;
+	tte->data.cv = t->c;
 #endif /* CONFIG_VIRT_IDX_DCACHE */
-	tsb->data.p = t->k;	/* p as privileged, k as kernel */
-	tsb->data.x = true;
-	tsb->data.w = ro ? false : t->w;
-	tsb->data.size = PAGESIZE_8K;
+	tte->data.p = t->k;	/* p as privileged, k as kernel */
+	tte->data.x = true;
+	tte->data.w = ro ? false : t->w;
+	tte->data.size = PAGESIZE_8K;
 	
 	write_barrier();
 	
-	tsb->data.v = t->p;	/* v as valid, p as present */
+	tte->data.v = t->p;	/* v as valid, p as present */
 }