Index: kernel/arch/ppc32/include/asm.h
===================================================================
--- kernel/arch/ppc32/include/asm.h	(revision eef1b0317f3802b67fa2a31033fa2973fbaab4e7)
+++ kernel/arch/ppc32/include/asm.h	(revision 8d8eeb9b91e7d7323c26964af5c059bcd010897f)
@@ -38,5 +38,5 @@
 #include <typedefs.h>
 #include <config.h>
-#include <arch/cpu.h>
+#include <arch/msr.h>
 #include <arch/mm/asid.h>
 #include <trace.h>
Index: kernel/arch/ppc32/include/context_offset.h
===================================================================
--- kernel/arch/ppc32/include/context_offset.h	(revision eef1b0317f3802b67fa2a31033fa2973fbaab4e7)
+++ kernel/arch/ppc32/include/context_offset.h	(revision 8d8eeb9b91e7d7323c26964af5c059bcd010897f)
@@ -75,7 +75,16 @@
 
 #ifdef __ASM__
-# include <arch/asm/regname.h>
 
-# ctx: address of the structure with saved context
+#ifdef KERNEL
+
+#include <arch/asm/regname.h>
+
+#else /* KERNEL */
+
+#include <libarch/regname.h>
+
+#endif /* KERNEL */
+
+/* ctx: address of the structure with saved context */
 .macro CONTEXT_SAVE_ARCH_CORE ctx:req
 	stw sp, OFFSET_SP(\ctx)
@@ -102,5 +111,5 @@
 .endm
 
-# ctx: address of the structure with saved context
+/* ctx: address of the structure with saved context */
 .macro CONTEXT_RESTORE_ARCH_CORE ctx:req
 	lwz sp, OFFSET_SP(\ctx)
Index: kernel/arch/ppc32/include/cpu.h
===================================================================
--- kernel/arch/ppc32/include/cpu.h	(revision eef1b0317f3802b67fa2a31033fa2973fbaab4e7)
+++ kernel/arch/ppc32/include/cpu.h	(revision 8d8eeb9b91e7d7323c26964af5c059bcd010897f)
@@ -36,19 +36,4 @@
 #define KERN_ppc32_CPU_H_
 
-/* MSR bits */
-#define MSR_DR  (1 << 4)
-#define MSR_IR  (1 << 5)
-#define MSR_PR  (1 << 14)
-#define MSR_EE  (1 << 15)
-
-/* HID0 bits */
-#define HID0_STEN  (1 << 24)
-#define HID0_ICE   (1 << 15)
-#define HID0_DCE   (1 << 14)
-#define HID0_ICFI  (1 << 11)
-#define HID0_DCI   (1 << 10)
-
-#ifndef __ASM__
-
 #include <typedefs.h>
 #include <trace.h>
@@ -67,6 +52,4 @@
 }
 
-#endif /* __ASM__ */
-
 #endif
 
Index: kernel/arch/ppc32/include/exception.h
===================================================================
--- kernel/arch/ppc32/include/exception.h	(revision eef1b0317f3802b67fa2a31033fa2973fbaab4e7)
+++ kernel/arch/ppc32/include/exception.h	(revision 8d8eeb9b91e7d7323c26964af5c059bcd010897f)
@@ -37,5 +37,5 @@
 
 #include <typedefs.h>
-#include <arch/cpu.h>
+#include <arch/msr.h>
 #include <trace.h>
 
Index: kernel/arch/ppc32/include/istate.h
===================================================================
--- kernel/arch/ppc32/include/istate.h	(revision eef1b0317f3802b67fa2a31033fa2973fbaab4e7)
+++ kernel/arch/ppc32/include/istate.h	(revision 8d8eeb9b91e7d7323c26964af5c059bcd010897f)
@@ -36,7 +36,15 @@
 #define KERN_ppc32_EXCEPTION_H_
 
-#include <typedefs.h>
-#include <arch/cpu.h>
 #include <trace.h>
+
+#ifdef KERNEL
+
+#include <arch/msr.h>
+
+#else /* KERNEL */
+
+#include <libarch/msr.h>
+
+#endif /* KERNEL */
 
 typedef struct istate {
Index: kernel/arch/ppc32/include/mm/frame.h
===================================================================
--- kernel/arch/ppc32/include/mm/frame.h	(revision eef1b0317f3802b67fa2a31033fa2973fbaab4e7)
+++ kernel/arch/ppc32/include/mm/frame.h	(revision 8d8eeb9b91e7d7323c26964af5c059bcd010897f)
@@ -39,5 +39,4 @@
 #define FRAME_SIZE   (1 << FRAME_WIDTH)
 
-#ifdef KERNEL
 #ifndef __ASM__
 
@@ -63,5 +62,4 @@
 
 #endif /* __ASM__ */
-#endif /* KERNEL */
 
 #endif
Index: kernel/arch/ppc32/include/mm/page.h
===================================================================
--- kernel/arch/ppc32/include/mm/page.h	(revision eef1b0317f3802b67fa2a31033fa2973fbaab4e7)
+++ kernel/arch/ppc32/include/mm/page.h	(revision 8d8eeb9b91e7d7323c26964af5c059bcd010897f)
@@ -41,6 +41,4 @@
 #define PAGE_WIDTH  FRAME_WIDTH
 #define PAGE_SIZE   FRAME_SIZE
-
-#ifdef KERNEL
 
 #ifndef __ASM__
@@ -181,6 +179,4 @@
 #endif /* __ASM__ */
 
-#endif /* KERNEL */
-
 #endif
 
Index: kernel/arch/ppc32/include/msr.h
===================================================================
--- kernel/arch/ppc32/include/msr.h	(revision 8d8eeb9b91e7d7323c26964af5c059bcd010897f)
+++ kernel/arch/ppc32/include/msr.h	(revision 8d8eeb9b91e7d7323c26964af5c059bcd010897f)
@@ -0,0 +1,54 @@
+/*
+ * Copyright (c) 2005 Martin Decky
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * - Redistributions of source code must retain the above copyright
+ *   notice, this list of conditions and the following disclaimer.
+ * - Redistributions in binary form must reproduce the above copyright
+ *   notice, this list of conditions and the following disclaimer in the
+ *   documentation and/or other materials provided with the distribution.
+ * - The name of the author may not be used to endorse or promote products
+ *   derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/** @addtogroup ppc32
+ * @{
+ */
+/** @file
+ */
+
+#ifndef KERN_ppc32_MSR_H_
+#define KERN_ppc32_MSR_H_
+
+/* MSR bits */
+#define MSR_DR  (1 << 4)
+#define MSR_IR  (1 << 5)
+#define MSR_PR  (1 << 14)
+#define MSR_EE  (1 << 15)
+
+/* HID0 bits */
+#define HID0_STEN  (1 << 24)
+#define HID0_ICE   (1 << 15)
+#define HID0_DCE   (1 << 14)
+#define HID0_ICFI  (1 << 11)
+#define HID0_DCI   (1 << 10)
+
+#endif
+
+/** @}
+ */
