Index: kernel/arch/ia32/Makefile.inc =================================================================== --- kernel/arch/ia32/Makefile.inc (revision b8fac76dfe5c0b164242ffb27f4a79965e1351e7) +++ kernel/arch/ia32/Makefile.inc (revision 8d427a3bd39f1c6efaaaf99eece08d5fc3551d8f) @@ -105,2 +105,6 @@ arch/$(KARCH)/src/fpu_context.c \ arch/$(KARCH)/src/syscall.c + +ARCH_AUTOGENS_AG = \ + arch/$(KARCH)/include/arch/istate_struct.ag + Index: kernel/arch/ia32/include/arch/istate.h =================================================================== --- kernel/arch/ia32/include/arch/istate.h (revision b8fac76dfe5c0b164242ffb27f4a79965e1351e7) +++ kernel/arch/ia32/include/arch/istate.h (revision 8d427a3bd39f1c6efaaaf99eece08d5fc3551d8f) @@ -38,33 +38,9 @@ #include -typedef struct istate { - /* - * The strange order of the GPRs is given by the requirement to use the - * istate structure for both regular interrupts and exceptions as well - * as for syscall handlers which use this order as an optimization. - */ - uint32_t edx; - uint32_t ecx; - uint32_t ebx; - uint32_t esi; - uint32_t edi; - uint32_t ebp; - uint32_t eax; - - uint32_t ebp_frame; /* imitation of frame pointer linkage */ - uint32_t eip_frame; /* imitation of return address linkage */ - - uint32_t gs; - uint32_t fs; - uint32_t es; - uint32_t ds; - - uint32_t error_word; /* real or fake error word */ - uint32_t eip; - uint32_t cs; - uint32_t eflags; - uint32_t esp; /* only if istate_t is from uspace */ - uint32_t ss; /* only if istate_t is from uspace */ -} istate_t; +#ifdef KERNEL +#include +#else +#include +#endif /* KERNEL */ #define RPL_USER 3 Index: kernel/arch/ia32/include/arch/istate_struct.ag =================================================================== --- kernel/arch/ia32/include/arch/istate_struct.ag (revision 8d427a3bd39f1c6efaaaf99eece08d5fc3551d8f) +++ kernel/arch/ia32/include/arch/istate_struct.ag (revision 8d427a3bd39f1c6efaaaf99eece08d5fc3551d8f) @@ -0,0 +1,135 @@ +# Copyright (c) 2014 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +{ + name : istate, + + includes : [ + { + guard : KERNEL, + include : + }, + { + negative-guard: KERNEL, + include : + } + ], + + members : [ + + # + # The strange order of the GPRs is given by the requirement to use the + # istate structure for both regular interrupts and exceptions as well + # as for syscall handlers which use this order as an optimization. + # + + { + name : edx, + type : uint32_t + }, + { + name : ecx, + type : uint32_t + }, + { + name : ebx, + type : uint32_t + }, + { + name : esi, + type : uint32_t + }, + { + name : edi, + type : uint32_t + }, + { + name : ebp, + type : uint32_t + }, + { + name : eax, + type : uint32_t + }, + + { + # imitation of frame pointer linkage + name : ebp_frame, + type : uint32_t + }, + { + # imitation of return address linkage + name : eip_frame, + type : uint32_t + }, + + { + name : gs, + type : uint32_t + }, + { + name : fs, + type : uint32_t + }, + { + name : es, + type : uint32_t + }, + { + name : ds, + type : uint32_t + }, + + { + # real or fake error word + name : error_word, + type : uint32_t + }, + { + name : eip, + type : uint32_t + }, + { + name : cs, + type : uint32_t + }, + { + name : eflags, + type : uint32_t + }, + { + # only if istate_t is from uspace + name : esp, + type : uint32_t + }, + { + # only if istate_t is from uspace + name : ss, + type : uint32_t + } + ] +} Index: kernel/arch/ia32/src/asm.S =================================================================== --- kernel/arch/ia32/src/asm.S (revision b8fac76dfe5c0b164242ffb27f4a79965e1351e7) +++ kernel/arch/ia32/src/asm.S (revision 8d427a3bd39f1c6efaaaf99eece08d5fc3551d8f) @@ -34,4 +34,5 @@ #include #include +#include .text @@ -136,29 +137,9 @@ ret -#define ISTATE_OFFSET_EDX 0 -#define ISTATE_OFFSET_ECX 4 -#define ISTATE_OFFSET_EBX 8 -#define ISTATE_OFFSET_ESI 12 -#define ISTATE_OFFSET_EDI 16 -#define ISTATE_OFFSET_EBP 20 -#define ISTATE_OFFSET_EAX 24 -#define ISTATE_OFFSET_EBP_FRAME 28 -#define ISTATE_OFFSET_EIP_FRAME 32 -#define ISTATE_OFFSET_GS 36 -#define ISTATE_OFFSET_FS 40 -#define ISTATE_OFFSET_ES 44 -#define ISTATE_OFFSET_DS 48 -#define ISTATE_OFFSET_ERROR_WORD 52 -#define ISTATE_OFFSET_EIP 56 -#define ISTATE_OFFSET_CS 60 -#define ISTATE_OFFSET_EFLAGS 64 -#define ISTATE_OFFSET_ESP 68 -#define ISTATE_OFFSET_SS 72 - /* * Size of the istate structure without the hardware-saved part * and without the error word. */ -#define ISTATE_SOFT_SIZE 52 +#define ISTATE_SOFT_SIZE ISTATE_SIZE - (6 * 4) /*