Changes in kernel/arch/sparc64/src/mm/sun4v/as.c [ba50a34:8c2214e] in mainline
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kernel/arch/sparc64/src/mm/sun4v/as.c
rba50a34 r8c2214e 1 1 /* 2 2 * Copyright (c) 2006 Jakub Jermar 3 * Copyright (c) 2009 Pavel Rimsky 3 4 * All rights reserved. 4 5 * … … 34 35 35 36 #include <arch/mm/as.h> 37 #include <arch/mm/pagesize.h> 36 38 #include <arch/mm/tlb.h> 37 39 #include <genarch/mm/page_ht.h> … … 39 41 #include <debug.h> 40 42 #include <config.h> 43 #include <arch/sun4v/hypercall.h> 41 44 42 45 #ifdef CONFIG_TSB … … 86 89 { 87 90 #ifdef CONFIG_TSB 88 count_t cnt = (TSB_ENTRY_COUNT * sizeof(tsb_entry_t)) >> FRAME_WIDTH;91 size_t cnt = (TSB_ENTRY_COUNT * sizeof(tsb_entry_t)) >> FRAME_WIDTH; 89 92 frame_free((uintptr_t) as->arch.tsb_description.tsb_base); 90 93 return cnt; … … 112 115 { 113 116 mmu_secondary_context_write(as->asid); 117 #ifdef CONFIG_TSB 118 uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH); 119 120 ASSERT(as->arch.tsb_description.tsb_base); 121 uintptr_t tsb = PA2KA(as->arch.tsb_description.tsb_base); 122 123 if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) { 124 /* 125 * TSBs were allocated from memory not covered 126 * by the locked 4M kernel DTLB entry. We need 127 * to map both TSBs explicitly. 128 */ 129 mmu_demap_page(tsb, 0, MMU_FLAG_DTLB); 130 dtlb_insert_mapping(tsb, KA2PA(tsb), PAGESIZE_64K, true, true); 131 } 132 133 __hypercall_fast2(MMU_TSB_CTXNON0, 1, KA2PA(&(as->arch.tsb_description))); 134 135 #endif 114 136 } 115 137 … … 134 156 uintptr_t base = ALIGN_DOWN(config.base, 1 << KERNEL_PAGE_WIDTH); 135 157 136 ASSERT(as->arch. itsb && as->arch.dtsb);158 ASSERT(as->arch.tsb_description.tsb_base); 137 159 138 uintptr_t tsb = (uintptr_t) as->arch.itsb;160 uintptr_t tsb = PA2KA(as->arch.tsb_description.tsb_base); 139 161 140 162 if (!overlaps(tsb, 8 * MMU_PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) { … … 144 166 * to demap the entry installed by as_install_arch(). 145 167 */ 146 dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, tsb);168 __hypercall_fast3(MMU_UNMAP_PERM_ADDR, tsb, 0, MMU_FLAG_DTLB); 147 169 } 148 170 #endif
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