Index: kernel/arch/riscv64/Makefile.inc =================================================================== --- kernel/arch/riscv64/Makefile.inc (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/Makefile.inc (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,53 @@ +# +# Copyright (c) 2016 Martin Decky +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +BFD_NAME = elf64-littleriscv +BFD_ARCH = riscv +BFD = binary + +BITS = 64 +ENDIANESS = LE + +ARCH_SOURCES = \ + arch/$(KARCH)/src/asm.S \ + arch/$(KARCH)/src/debug/stacktrace.c \ + arch/$(KARCH)/src/proc/scheduler.c \ + arch/$(KARCH)/src/proc/task.c \ + arch/$(KARCH)/src/proc/thread.c \ + arch/$(KARCH)/src/riscv64.c \ + arch/$(KARCH)/src/userspace.c \ + arch/$(KARCH)/src/cpu/cpu.c \ + arch/$(KARCH)/src/mm/km.c \ + arch/$(KARCH)/src/mm/as.c \ + arch/$(KARCH)/src/mm/frame.c \ + arch/$(KARCH)/src/mm/page.c \ + arch/$(KARCH)/src/mm/tlb.c + +ARCH_AUTOGENS_AG = \ + arch/$(KARCH)/include/arch/istate_struct.ag \ + arch/$(KARCH)/include/arch/context_struct.ag Index: kernel/arch/riscv64/_link.ld.in =================================================================== --- kernel/arch/riscv64/_link.ld.in (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/_link.ld.in (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,63 @@ +/* + * RISC-V 64 linker script + * + * kernel text + * kernel data + * + */ + +OUTPUT_ARCH(riscv) +ENTRY(kernel_image_start) + +#include +#include + +SECTIONS { + .unmapped BOOT_OFFSET: AT (0) { + unmapped_ktext_start = .; + *(K_TEXT_START); + unmapped_ktext_end = .; + + unmapped_kdata_start = .; + *(K_DATA_START); + *(K_INI_PTLS); + unmapped_kdata_end = .; + } + + .mapped (BOOT_OFFSET + SIZEOF(.unmapped)) : AT (SIZEOF(.unmapped)) { + ktext_start = .; + *(.text); + ktext_end = .; + + kdata_start = .; + *(.data); /* initialized data */ + *(.rodata*); + hardcoded_load_address = .; + QUAD(PA2KA(BOOT_OFFSET)); + hardcoded_ktext_size = .; + QUAD(ktext_end - ktext_start + (unmapped_ktext_end - unmapped_ktext_start)); + hardcoded_kdata_size = .; + QUAD(kdata_end - kdata_start + (unmapped_kdata_end - unmapped_kdata_start)); + hardcoded_unmapped_ktext_size = .; + QUAD(unmapped_ktext_end - unmapped_ktext_start); + hardcoded_unmapped_kdata_size = .; + QUAD(unmapped_kdata_end - unmapped_kdata_start); + *(.sdata); + *(.reginfo); + *(.sbss); + *(.scommon); + *(.bss); /* uninitialized static variables */ + *(COMMON); /* global variables */ + . = ALIGN(8); + symbol_table = .; + *(symtab.*); + kdata_end = .; + } + + /DISCARD/ : { + *(.mdebug*); + *(.pdr); + *(.comment); + *(.note); + } +} Index: kernel/arch/riscv64/include/arch/arch.h =================================================================== --- kernel/arch/riscv64/include/arch/arch.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/arch.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_ARCH_H_ +#define KERN_riscv64_ARCH_H_ + +#include + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/asm.h =================================================================== --- kernel/arch/riscv64/include/arch/asm.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/asm.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,120 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_ASM_H_ +#define KERN_riscv64_ASM_H_ + +#include +#include +#include +#include + +NO_TRACE static inline ipl_t interrupts_enable(void) +{ + // FIXME + return 0; +} + +NO_TRACE static inline ipl_t interrupts_disable(void) +{ + // FIXME + return 0; +} + +NO_TRACE static inline void interrupts_restore(ipl_t ipl) +{ + // FIXME +} + +NO_TRACE static inline ipl_t interrupts_read(void) +{ + // FIXME + return 0; +} + +NO_TRACE static inline bool interrupts_disabled(void) +{ + // FIXME + return 0; +} + +NO_TRACE static inline uintptr_t get_stack_base(void) +{ + // FIXME + return 0; +} + +NO_TRACE static inline void cpu_sleep(void) +{ +} + +NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) +{ + *port = v; +} + +NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) +{ + *port = v; +} + +NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) +{ + *port = v; +} + +NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) +{ + return *port; +} + +NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) +{ + return *port; +} + +NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) +{ + return *port; +} + +extern void cpu_halt(void) __attribute__((noreturn)); +extern void asm_delay_loop(uint32_t t); +extern void userspace_asm(uintptr_t uspace_uarg, uintptr_t stack, + uintptr_t entry); + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/atomic.h =================================================================== --- kernel/arch/riscv64/include/arch/atomic.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/atomic.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_ATOMIC_H_ +#define KERN_riscv64_ATOMIC_H_ + +#include + +NO_TRACE static inline void atomic_inc(atomic_t *val) +{ + // FIXME +} + +NO_TRACE static inline void atomic_dec(atomic_t *val) +{ + // FIXME +} + +NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) +{ + atomic_inc(val); + return val->count - 1; +} + +NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) +{ + atomic_dec(val); + return val->count + 1; +} + +NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val) +{ + atomic_inc(val); + return val->count; +} + +NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val) +{ + atomic_dec(val); + return val->count; +} + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/barrier.h =================================================================== --- kernel/arch/riscv64/include/arch/barrier.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/barrier.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,59 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_BARRIER_H_ +#define KERN_riscv64_BARRIER_H_ + +#include + +// FIXME + +#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") +#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") + +#define memory_barrier() asm volatile ("" ::: "memory") +#define read_barrier() asm volatile ("" ::: "memory") +#define write_barrier() asm volatile ("" ::: "memory") + +#ifdef KERNEL + +#define smc_coherence(addr) +#define smc_coherence_block(addr, size) + +#endif /* KERNEL */ + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/boot/boot.h =================================================================== --- kernel/arch/riscv64/include/arch/boot/boot.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/boot/boot.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,84 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_BOOT_H_ +#define KERN_riscv64_BOOT_H_ + +#define BOOT_OFFSET 0x200000 + +#define TASKMAP_MAX_RECORDS 32 +#define MEMMAP_MAX_RECORDS 32 +#define BOOTINFO_TASK_NAME_BUFLEN 32 + +#ifndef __ASM__ + +#include +#include + +typedef struct { + void *addr; + size_t size; + char name[BOOTINFO_TASK_NAME_BUFLEN]; +} utask_t; + +typedef struct { + size_t cnt; + utask_t tasks[TASKMAP_MAX_RECORDS]; +} taskmap_t; + +typedef struct { + void *start; + size_t size; +} memzone_t; + +typedef struct { + uint64_t total; + size_t cnt; + memzone_t zones[MEMMAP_MAX_RECORDS]; +} memmap_t; + +typedef struct { + memmap_t memmap; + taskmap_t taskmap; + ballocs_t ballocs; +} bootinfo_t; + +extern memmap_t memmap; + +#endif + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/context.h =================================================================== --- kernel/arch/riscv64/include/arch/context.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/context.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_CONTEXT_H_ +#define KERN_riscv64_CONTEXT_H_ + +#include + +#define SP_DELTA 16 + +// FIXME + +#define context_set(context, pc, stack, size) \ + context_set_generic(context, pc, stack, size) + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/context_struct.ag =================================================================== --- kernel/arch/riscv64/include/arch/context_struct.ag (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/context_struct.ag (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,184 @@ +# +# Copyright (c) 2016 Martin Decky +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +{ + name : context, + + includes : [ + { + include : + } + ], + + members : [ + # + # There is a room for optimization (we can store just those + # registers that must be preserved during ABI function call). + # + + { + name : sp, + type : uint64_t + }, + { + name : pc, + type : uint64_t + }, + + { + name : zero, + type : uint64_t + }, + { + name : ra, + type : uint64_t + }, + + { + name : x3, + type : uint64_t + }, + { + name : x4, + type : uint64_t + }, + { + name : x5, + type : uint64_t + }, + { + name : x6, + type : uint64_t + }, + { + name : x7, + type : uint64_t + }, + { + name : x8, + type : uint64_t + }, + { + name : x9, + type : uint64_t + }, + { + name : x10, + type : uint64_t + }, + { + name : x11, + type : uint64_t + }, + { + name : x12, + type : uint64_t + }, + { + name : x13, + type : uint64_t + }, + { + name : x14, + type : uint64_t + }, + { + name : x15, + type : uint64_t + }, + { + name : x16, + type : uint64_t + }, + { + name : x17, + type : uint64_t + }, + { + name : x18, + type : uint64_t + }, + { + name : x19, + type : uint64_t + }, + { + name : x20, + type : uint64_t + }, + { + name : x21, + type : uint64_t + }, + { + name : x22, + type : uint64_t + }, + { + name : x23, + type : uint64_t + }, + { + name : x24, + type : uint64_t + }, + { + name : x25, + type : uint64_t + }, + { + name : x26, + type : uint64_t + }, + { + name : x27, + type : uint64_t + }, + { + name : x28, + type : uint64_t + }, + { + name : x29, + type : uint64_t + }, + { + name : x30, + type : uint64_t + }, + { + name : x31, + type : uint64_t + }, + + { + name : ipl, + type : ipl_t + } + ] +} Index: kernel/arch/riscv64/include/arch/cpu.h =================================================================== --- kernel/arch/riscv64/include/arch/cpu.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/cpu.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_CPU_H_ +#define KERN_riscv64_CPU_H_ + +#ifndef __ASM__ + +typedef struct { +} cpu_arch_t; + +extern void cpu_setup_fpu(void); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/cycle.h =================================================================== --- kernel/arch/riscv64/include/arch/cycle.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/cycle.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_CYCLE_H_ +#define KERN_riscv64_CYCLE_H_ + +#include + +NO_TRACE static inline uint64_t get_cycle(void) +{ + return 0; +} + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/elf.h =================================================================== --- kernel/arch/riscv64/include/arch/elf.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/elf.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_ELF_H_ +#define KERN_riscv64_ELF_H_ + +#define ELF_MACHINE EM_RISCV +#define ELF_DATA_ENCODING ELFDATA2LSB +#define ELF_CLASS ELFCLASS64 + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/faddr.h =================================================================== --- kernel/arch/riscv64/include/arch/faddr.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/faddr.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_FADDR_H_ +#define KERN_riscv64_FADDR_H_ + +#include + +#define FADDR(fptr) ((uintptr_t) (fptr)) + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/fpu_context.h =================================================================== --- kernel/arch/riscv64/include/arch/fpu_context.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/fpu_context.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_FPU_CONTEXT_H_ +#define KERN_riscv64_FPU_CONTEXT_H_ + +#include + +typedef struct { +} fpu_context_t; + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/interrupt.h =================================================================== --- kernel/arch/riscv64/include/arch/interrupt.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/interrupt.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_INTERRUPT_H_ +#define KERN_riscv64_INTERRUPT_H_ + +#include +#include + +#define IVT_ITEMS 0 +#define IVT_FIRST 0 + +#define VECTOR_TLB_SHOOTDOWN_IPI 0 + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/istate.h =================================================================== --- kernel/arch/riscv64/include/arch/istate.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/istate.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64interrupt + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_ISTATE_H_ +#define KERN_riscv64_ISTATE_H_ + +#include + +#ifdef KERNEL + #include +#else + #include +#endif + +NO_TRACE static inline int istate_from_uspace(istate_t *istate) +{ + // FIXME + return 0; +} + +NO_TRACE static inline void istate_set_retaddr(istate_t *istate, + uintptr_t retaddr) +{ + // FIXME +} + +NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) +{ + // FIXME + return 0; +} + +NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) +{ + // FIXME + return 0; +} + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/istate_struct.ag =================================================================== --- kernel/arch/riscv64/include/arch/istate_struct.ag (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/istate_struct.ag (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,177 @@ +# +# Copyright (c) 2016 Martin Decky +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +{ + name : istate, + + includes : [ + { + guard : KERNEL, + include : + }, + { + negative-guard: KERNEL, + include : + } + ], + + members : [ + { + name : zero, + type : uint64_t + }, + { + name : ra, + type : uint64_t + }, + { + name : sp, + type : uint64_t + }, + { + name : x3, + type : uint64_t + }, + { + name : x4, + type : uint64_t + }, + { + name : x5, + type : uint64_t + }, + { + name : x6, + type : uint64_t + }, + { + name : x7, + type : uint64_t + }, + { + name : x8, + type : uint64_t + }, + { + name : x9, + type : uint64_t + }, + { + name : x10, + type : uint64_t + }, + { + name : x11, + type : uint64_t + }, + { + name : x12, + type : uint64_t + }, + { + name : x13, + type : uint64_t + }, + { + name : x14, + type : uint64_t + }, + { + name : x15, + type : uint64_t + }, + { + name : x16, + type : uint64_t + }, + { + name : x17, + type : uint64_t + }, + { + name : x18, + type : uint64_t + }, + { + name : x19, + type : uint64_t + }, + { + name : x20, + type : uint64_t + }, + { + name : x21, + type : uint64_t + }, + { + name : x22, + type : uint64_t + }, + { + name : x23, + type : uint64_t + }, + { + name : x24, + type : uint64_t + }, + { + name : x25, + type : uint64_t + }, + { + name : x26, + type : uint64_t + }, + { + name : x27, + type : uint64_t + }, + { + name : x28, + type : uint64_t + }, + { + name : x29, + type : uint64_t + }, + { + name : x30, + type : uint64_t + }, + { + name : x31, + type : uint64_t + }, + { + name : pc, + type : uint64_t + }, + ] +} Index: kernel/arch/riscv64/include/arch/mm/as.h =================================================================== --- kernel/arch/riscv64/include/arch/mm/as.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/mm/as.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_AS_H_ +#define KERN_riscv64_AS_H_ + +#define ADDRESS_SPACE_HOLE_START UINT64_C(0x0000800000000000) +#define ADDRESS_SPACE_HOLE_END UINT64_C(0xffff7fffffffffff) + +#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 + +#define KERNEL_ADDRESS_SPACE_START_ARCH UINT64_C(0xffff800000000000) +#define KERNEL_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffffffffffff) +#define USER_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) +#define USER_ADDRESS_SPACE_END_ARCH UINT64_C(0x00007fffffffffff) + +typedef struct { +} as_arch_t; + +#include + +#define as_constructor_arch(as, flags) (as != as) +#define as_destructor_arch(as) (as != as) +#define as_create_arch(as, flags) (as != as) +#define as_deinstall_arch(as) +#define as_invalidate_translation_cache(as, page, cnt) + +extern void as_arch_init(void); + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/mm/asid.h =================================================================== --- kernel/arch/riscv64/include/arch/mm/asid.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/mm/asid.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_ASID_H_ +#define KERN_riscv64_ASID_H_ + +#include + +#define ASID_MAX_ARCH 4096 + +typedef uint32_t asid_t; + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/mm/frame.h =================================================================== --- kernel/arch/riscv64/include/arch/mm/frame.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/mm/frame.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2016 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_FRAME_H_ +#define KERN_riscv64_FRAME_H_ + +#define FRAME_WIDTH 12 /* 4 KiB */ +#define FRAME_SIZE (1 << FRAME_WIDTH) + +#define FRAME_LOWPRIO 0 + +#ifndef __ASM__ + +#include + +extern void frame_low_arch_init(void); +extern void frame_high_arch_init(void); +extern void physmem_print(void); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/mm/km.h =================================================================== --- kernel/arch/riscv64/include/arch/mm/km.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/mm/km.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_KM_H_ +#define KERN_riscv64_KM_H_ + +#include + +extern void km_identity_arch_init(void); +extern void km_non_identity_arch_init(void); +extern bool km_is_non_identity_arch(uintptr_t); + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/mm/page.h =================================================================== --- kernel/arch/riscv64/include/arch/mm/page.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/mm/page.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,272 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_PAGE_H_ +#define KERN_riscv64_PAGE_H_ + +#include + +#define PAGE_WIDTH FRAME_WIDTH +#define PAGE_SIZE FRAME_SIZE + +#ifndef __ASM__ + #define KA2PA(x) (((uintptr_t) (x)) - UINT64_C(0xffff800000000000)) + #define PA2KA(x) (((uintptr_t) (x)) + UINT64_C(0xffff800000000000)) +#else + #define KA2PA(x) ((x) - 0xffff800000000000) + #define PA2KA(x) ((x) + 0xffff800000000000) +#endif + +/* + * Page table entry types. + * + * - PTE_TYPE_PTR: pointer to next level PTE + * - PTE_TYPE_PTR_GLOBAL: pointer to next level PTE (global mapping) + * + * - PTE_TYPE_SRURX: kernel read, user read execute + * - PTE_TYPE_SRWURWX: kernel read write, user read write execute + * - PTE_TYPE_SRUR: kernel read, user read + * - PTE_TYPE_SRWURW: kernel read write, user read write + * - PTE_TYPE_SRXURX: kernel read execute, user read execute + * - PTE_TYPE_SRWXURWX: kernel read write execute, user read write execute + * + * - PTE_TYPE_SR: kernel read + * - PTE_TYPE_SRW: kernel read write + * - PTE_TYPE_SRX: kernel read execute + * - PTE_TYPE_SRWX: kernel read write execute + * + * - PTE_TYPE_SR_GLOBAL: kernel read (global mapping) + * - PTE_TYPE_SRW_GLOBAL: kernel read write (global mapping) + * - PTE_TYPE_SRX_GLOBAL: kernel read execute (global mapping) + * - PTE_TYPE_SRWX_GLOBAL: kernel read write execute (global mapping) + */ + +#define PTE_TYPE_PTR 0 +#define PTE_TYPE_PTR_GLOBAL 1 + +#define PTE_TYPE_SRURX 2 +#define PTE_TYPE_SRWURWX 3 +#define PTE_TYPE_SRUR 4 +#define PTE_TYPE_SRWURW 5 +#define PTE_TYPE_SRXURX 6 +#define PTE_TYPE_SRWXURWX 7 + +#define PTE_TYPE_SR 8 +#define PTE_TYPE_SRW 9 +#define PTE_TYPE_SRX 10 +#define PTE_TYPE_SRWX 11 + +#define PTE_TYPE_SR_GLOBAL 12 +#define PTE_TYPE_SRW_GLOBAL 13 +#define PTE_TYPE_SRX_GLOBAL 14 +#define PTE_TYPE_SRWX_GLOBAL 15 + +/* + * Implementation of 4-level page table interface. + * + * Page table layout: + * - 64-bit virtual addressess + * (the virtual address space is 2^48 bytes in size + * with a hole in the middle) + * - Offset is 12 bits => pages are 4 KiB long + * - PTL0 has 512 entries (9 bits) + * - PTL1 has 512 entries (9 bits) + * - PTL2 has 512 entries (9 bits) + * - PLT3 has 512 entries (9 bits) + */ + +/* Number of entries in each level. */ +#define PTL0_ENTRIES_ARCH 512 +#define PTL1_ENTRIES_ARCH 512 +#define PTL2_ENTRIES_ARCH 512 +#define PTL3_ENTRIES_ARCH 512 + +/* Page table sizes for each level. */ +#define PTL0_FRAMES_ARCH 1 +#define PTL1_FRAMES_ARCH 1 +#define PTL2_FRAMES_ARCH 1 +#define PTL3_FRAMES_ARCH 1 + +/* Macros calculating indices into page tables on each level. */ +#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 39) & 0x1ff) +#define PTL1_INDEX_ARCH(vaddr) (((vaddr) >> 30) & 0x1ff) +#define PTL2_INDEX_ARCH(vaddr) (((vaddr) >> 21) & 0x1ff) +#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x1ff) + +/* Get PTE address accessors for each level. */ +#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ + (((pte_t *) (ptl0))[(i)].pfn << 12) + +#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ + (((pte_t *) (ptl1))[(i)].pfn << 12) + +#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ + (((pte_t *) (ptl2))[(i)].pfn << 12) + +#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ + (((pte_t *) (ptl3))[(i)].pfn << 12) + +/* Set PTE address accessors for each level. */ +#define SET_PTL0_ADDRESS_ARCH(ptl0) + +#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ + (((pte_t *) (ptl0))[(i)].pfn = (a) >> 12) + +#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) \ + (((pte_t *) (ptl1))[(i)].pfn = (a) >> 12) + +#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) \ + (((pte_t *) (ptl2))[(i)].pfn = (a) >> 12) + +#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ + (((pte_t *) (ptl3))[(i)].pfn = (a) >> 12) + +/* Get PTE flags accessors for each level. */ +#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ + get_pt_flags((pte_t *) (ptl0), (size_t) (i)) + +#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ + get_pt_flags((pte_t *) (ptl1), (size_t) (i)) + +#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ + get_pt_flags((pte_t *) (ptl2), (size_t) (i)) + +#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ + get_pt_flags((pte_t *) (ptl3), (size_t) (i)) + +/* Set PTE flags accessors for each level. */ +#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ + set_pt_flags((pte_t *) (ptl0), (size_t) (i), (x)) + +#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) \ + set_pt_flags((pte_t *) (ptl1), (size_t) (i), (x)) + +#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) \ + set_pt_flags((pte_t *) (ptl2), (size_t) (i), (x)) + +#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ + set_pt_flags((pte_t *) (ptl3), (size_t) (i), (x)) + +/* Set PTE present accessors for each level. */ +#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ + set_pt_present((pte_t *) (ptl0), (size_t) (i)) + +#define SET_PTL2_PRESENT_ARCH(ptl1, i) \ + set_pt_present((pte_t *) (ptl1), (size_t) (i)) + +#define SET_PTL3_PRESENT_ARCH(ptl2, i) \ + set_pt_present((pte_t *) (ptl2), (size_t) (i)) + +#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ + set_pt_present((pte_t *) (ptl3), (size_t) (i)) + +/* Macros for querying the last-level PTEs. */ +#define PTE_VALID_ARCH(pte) ((pte)->valid != 0) +#define PTE_PRESENT_ARCH(pte) ((pte)->valid != 0) +#define PTE_GET_FRAME_ARCH(pte) ((uintptr_t) (pte)->pfn << 12) + +#define PTE_WRITABLE_ARCH(pte) \ + (((pte)->type == PTE_TYPE_SRWURWX) || \ + ((pte)->type == PTE_TYPE_SRWURW) || \ + ((pte)->type == PTE_TYPE_SRWXURWX)) + +#define PTE_EXECUTABLE_ARCH(pte) \ + (((pte)->type == PTE_TYPE_SRURX) || \ + ((pte)->type == PTE_TYPE_SRWURWX) || \ + ((pte)->type == PTE_TYPE_SRXURX) || \ + ((pte)->type == PTE_TYPE_SRWXURWX)) + +#ifndef __ASM__ + +#include +#include +#include + +/** Page Table Entry. */ +typedef struct { + unsigned long valid : 1; /**< Valid bit. */ + unsigned long type : 4; /**< Entry type. */ + unsigned long referenced : 1; /**< Refenced bit. */ + unsigned long dirty : 1; /**< Dirty bit. */ + unsigned long reserved : 3; /**< Reserved bits. */ + unsigned long pfn : 54; /**< Physical frame number. */ +} pte_t; + +NO_TRACE static inline unsigned int get_pt_flags(pte_t *pt, size_t i) +{ + pte_t *entry = &pt[i]; + + return (((!entry->valid) << PAGE_PRESENT_SHIFT) | + ((entry->type < PTE_TYPE_SR) << PAGE_USER_SHIFT) | + PAGE_READ | + (PTE_WRITABLE_ARCH(entry) << PAGE_WRITE_SHIFT) | + (PTE_EXECUTABLE_ARCH(entry) << PAGE_EXEC_SHIFT) | + ((entry->type >= PTE_TYPE_SR_GLOBAL) << PAGE_GLOBAL_SHIFT)); +} + +NO_TRACE static inline void set_pt_flags(pte_t *pt, size_t i, int flags) +{ + pte_t *entry = &pt[i]; + + entry->valid = !(flags & PAGE_NOT_PRESENT); + + if ((flags & PAGE_WRITE) != 0) { + if ((flags & PAGE_EXEC) != 0) + entry->type = PTE_TYPE_SRWXURWX; + else + entry->type = PTE_TYPE_SRWURW; + } else { + if ((flags & PAGE_EXEC) != 0) + entry->type = PTE_TYPE_SRXURX; + else + entry->type = PTE_TYPE_SRUR; + } +} + +NO_TRACE static inline void set_pt_present(pte_t *pt, size_t i) +{ + pte_t *entry = &pt[i]; + + entry->valid = 1; +} + +extern void page_arch_init(void); +extern void page_fault(unsigned int, istate_t *); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/mm/tlb.h =================================================================== --- kernel/arch/riscv64/include/arch/mm/tlb.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/mm/tlb.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,41 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64mm + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_TLB_H_ +#define KERN_riscv64_TLB_H_ + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/proc/task.h =================================================================== --- kernel/arch/riscv64/include/arch/proc/task.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/proc/task.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64proc + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_TASK_H_ +#define KERN_riscv64_TASK_H_ + +#include + +typedef struct { +} task_arch_t; + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/proc/thread.h =================================================================== --- kernel/arch/riscv64/include/arch/proc/thread.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/proc/thread.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64proc + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_THREAD_H_ +#define KERN_riscv64_THREAD_H_ + +typedef struct { +} thread_arch_t; + +#define thr_constructor_arch(thread) +#define thr_destructor_arch(thread) + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/stack.h =================================================================== --- kernel/arch/riscv64/include/arch/stack.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/stack.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_STACK_H_ +#define KERN_riscv64_STACK_H_ + +#include + +#define MEM_STACK_SIZE STACK_SIZE + +#endif + +/** @} + */ Index: kernel/arch/riscv64/include/arch/types.h =================================================================== --- kernel/arch/riscv64/include/arch/types.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/include/arch/types.h (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#ifndef KERN_riscv64_TYPES_H_ +#define KERN_riscv64_TYPES_H_ + +typedef uint64_t size_t; +typedef int64_t ssize_t; + +typedef uint64_t uintptr_t; +typedef uint64_t pfn_t; + +typedef uint64_t ipl_t; + +typedef uint64_t sysarg_t; +typedef int64_t native_t; +typedef uint64_t atomic_count_t; + +typedef struct { +} fncptr_t; + +#define INTN_C(c) INT64_C(c) +#define UINTN_C(c) UINT64_C(c) + +#define PRIdn PRId64 /**< Format for native_t. */ +#define PRIun PRIu64 /**< Format for sysarg_t. */ +#define PRIxn PRIx64 /**< Format for hexadecimal sysarg_t. */ +#define PRIua PRIu64 /**< Format for atomic_count_t. */ + +#endif + +/** @} + */ Index: kernel/arch/riscv64/src/asm.S =================================================================== --- kernel/arch/riscv64/src/asm.S (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/src/asm.S (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include + +.text + +SYMBOL(kernel_image_start) + // FIXME + nop Index: kernel/arch/riscv64/src/cpu/cpu.c =================================================================== --- kernel/arch/riscv64/src/cpu/cpu.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/src/cpu/cpu.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#include +#include +#include +#include +#include +#include + + +void fpu_disable(void) +{ +} + +void fpu_enable(void) +{ +} + +void cpu_arch_init(void) +{ +} + +void cpu_identify(void) +{ +} + +void cpu_print_report(cpu_t* cpu) +{ +} + +/** @} + */ Index: kernel/arch/riscv64/src/debug/stacktrace.c =================================================================== --- kernel/arch/riscv64/src/debug/stacktrace.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/src/debug/stacktrace.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,80 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#include +#include +#include + +bool kernel_stack_trace_context_validate(stack_trace_context_t *ctx) +{ + return true; +} + +bool kernel_frame_pointer_prev(stack_trace_context_t *ctx, uintptr_t *prev) +{ + return true; +} + +bool kernel_return_address_get(stack_trace_context_t *ctx, uintptr_t *ra) +{ + return true; +} + +bool uspace_stack_trace_context_validate(stack_trace_context_t *ctx) +{ + return true; +} + +bool uspace_frame_pointer_prev(stack_trace_context_t *ctx, uintptr_t *prev) +{ + return true; +} + +bool uspace_return_address_get(stack_trace_context_t *ctx, uintptr_t *ra) +{ + return true; +} + +uintptr_t frame_pointer_get(void) +{ + return 0; +} + +uintptr_t program_counter_get(void) +{ + return 0; +} + +/** @} + */ Index: kernel/arch/riscv64/src/mm/as.c =================================================================== --- kernel/arch/riscv64/src/mm/as.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/src/mm/as.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64mm + * @{ + */ + +#include +#include +#include + +void as_arch_init(void) +{ + as_operations = &as_pt_operations; +} + +/** @} + */ Index: kernel/arch/riscv64/src/mm/frame.c =================================================================== --- kernel/arch/riscv64/src/mm/frame.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/src/mm/frame.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64mm + * @{ + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +size_t hardcoded_unmapped_ktext_size = 0; +size_t hardcoded_unmapped_kdata_size = 0; + +void physmem_print(void) +{ +} + + +void frame_low_arch_init(void) +{ +} + +void frame_high_arch_init(void) +{ +} + +/** @} + */ Index: kernel/arch/riscv64/src/mm/km.c =================================================================== --- kernel/arch/riscv64/src/mm/km.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/src/mm/km.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64mm + * @{ + */ + +#include +#include + +void km_identity_arch_init(void) +{ +} + +void km_non_identity_arch_init(void) +{ +} + +bool km_is_non_identity_arch(uintptr_t addr) +{ + return false; +} + +/** @} + */ Index: kernel/arch/riscv64/src/mm/page.c =================================================================== --- kernel/arch/riscv64/src/mm/page.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/src/mm/page.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,63 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64mm + * @{ + */ +/** @file + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +void page_arch_init(void) +{ + if (config.cpu_active == 1) + page_mapping_operations = &pt_mapping_operations; +} + +void page_fault(unsigned int n __attribute__((unused)), istate_t *istate) +{ +} + +/** @} + */ Index: kernel/arch/riscv64/src/mm/tlb.c =================================================================== --- kernel/arch/riscv64/src/mm/tlb.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/src/mm/tlb.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64mm + * @{ + */ + +#include +#include +#include +#include + +void tlb_invalidate_all(void) +{ +} + +void tlb_invalidate_asid(asid_t asid __attribute__((unused))) +{ + tlb_invalidate_all(); +} + +void tlb_invalidate_pages(asid_t asid __attribute__((unused)), uintptr_t page, size_t cnt) +{ + tlb_invalidate_all(); +} + +void tlb_arch_init(void) +{ +} + +void tlb_print(void) +{ +} + +/** @} + */ Index: kernel/arch/riscv64/src/proc/scheduler.c =================================================================== --- kernel/arch/riscv64/src/proc/scheduler.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/src/proc/scheduler.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64proc + * @{ + */ +/** @file + */ + +#include + +void before_task_runs_arch(void) +{ +} + +void before_thread_runs_arch(void) +{ +} + +void after_thread_ran_arch(void) +{ +} + +/** @} + */ Index: kernel/arch/riscv64/src/proc/task.c =================================================================== --- kernel/arch/riscv64/src/proc/task.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/src/proc/task.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,46 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64proc + * @{ + */ +/** @file + */ + +#include + +void task_create_arch(task_t *t) +{ +} + +void task_destroy_arch(task_t *t) +{ +} + +/** @} + */ Index: kernel/arch/riscv64/src/proc/thread.c =================================================================== --- kernel/arch/riscv64/src/proc/thread.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/src/proc/thread.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64proc + * @{ + */ +/** @file + */ + +#include + +void thread_create_arch(thread_t *t) +{ +} + +/** @} + */ Index: kernel/arch/riscv64/src/riscv64.c =================================================================== --- kernel/arch/riscv64/src/riscv64.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/src/riscv64.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,129 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +char memcpy_from_uspace_failover_address; +char memcpy_to_uspace_failover_address; + +arch_ops_t riscv64_ops = { +}; + +arch_ops_t *arch_ops = &riscv64_ops; + +void calibrate_delay_loop(void) +{ +} + +/** Construct function pointer + * + * @param fptr function pointer structure + * @param addr function address + * @param caller calling function address + * + * @return address of the function pointer + * + */ +void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller) +{ + return addr; +} + +void arch_reboot(void) +{ +} + +void irq_initialize_arch(irq_t *irq) +{ + (void) irq; +} + +void istate_decode(istate_t *istate) +{ + (void) istate; +} + +int context_save_arch(context_t *ctx) +{ + return 1; +} + +void context_restore_arch(context_t *ctx) +{ + while (true); +} + +void fpu_init(void) +{ +} + +void fpu_context_save(fpu_context_t *ctx) +{ +} + +void fpu_context_restore(fpu_context_t *ctx) +{ +} + +int memcpy_from_uspace(void *dst, const void *uspace_src, size_t size) +{ + return EOK; +} + +int memcpy_to_uspace(void *uspace_dst, const void *src, size_t size) +{ + return EOK; +} + +void early_putchar(wchar_t ch) +{ +} + +/** @} + */ Index: kernel/arch/riscv64/src/userspace.c =================================================================== --- kernel/arch/riscv64/src/userspace.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) +++ kernel/arch/riscv64/src/userspace.c (revision 8b6aa3923668ec2fbb91e100c43265f2f32fe31c) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2016 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup riscv64 + * @{ + */ +/** @file + */ + +#include +#include +#include +#include +#include + +void userspace(uspace_arg_t *kernel_uarg) +{ + // FIXME + while (true); +} + +/** @} + */