Changeset 894f58c in mainline
- Timestamp:
- 2017-10-23T23:39:36Z (7 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 56db65d
- Parents:
- ec700c7
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/usb/xhci/endpoint.c
rec700c7 r894f58c 79 79 } 80 80 81 static bool primary_stream_ctx_has_secondary_array(xhci_stream_ctx_t *primary_ctx) { 82 /* Section 6.2.4.1, SCT values */ 83 return XHCI_STREAM_SCT(*primary_ctx) >= 2; 84 } 85 86 static size_t secondary_stream_ctx_array_size(xhci_stream_ctx_t *primary_ctx) { 87 if (XHCI_STREAM_SCT(*primary_ctx) < 2) return 0; 88 return 2 << XHCI_STREAM_SCT(*primary_ctx); 89 } 90 81 91 int xhci_endpoint_alloc_transfer_ds(xhci_endpoint_t *xhci_ep) 82 92 { … … 114 124 xhci_ep->base.target.address, xhci_ep->base.target.endpoint); 115 125 116 // TODO: What about secondaries? 126 // maybe check if LSA, then skip? 127 for (size_t index = 0; index < primary_stream_ctx_array_size(xhci_ep); ++index) { 128 xhci_stream_ctx_t *primary_ctx = xhci_ep->primary_stream_ctx_array + index; 129 if (primary_stream_ctx_has_secondary_array(primary_ctx)) { 130 // uintptr_t phys = XHCI_STREAM_DEQ_PTR(*primary_ctx); 131 /* size_t size = */ secondary_stream_ctx_array_size(primary_ctx); 132 // TODO: somehow map the address to virtual and free the secondary array 133 } 134 } 117 135 free32(xhci_ep->primary_stream_ctx_array); 118 136 } else {
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