Changeset 8565a42 in mainline for uspace/lib/c/arch/mips32/src


Ignore:
Timestamp:
2018-03-02T20:34:50Z (8 years ago)
Author:
GitHub <noreply@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
a1a81f69, d5e5fd1
Parents:
3061bc1 (diff), 34e1206 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
git-author:
Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-02 20:34:50)
git-committer:
GitHub <noreply@…> (2018-03-02 20:34:50)
Message:

Remove all trailing whitespace, everywhere.

See individual commit messages for details.

Location:
uspace/lib/c/arch/mips32/src
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • uspace/lib/c/arch/mips32/src/entry.S

    r3061bc1 r8565a42  
    4444        .frame $sp, ABI_STACK_FRAME, $ra
    4545        .cpload $t9
    46        
     46
    4747        # Allocate the stack frame.
    4848        addiu $sp, -ABI_STACK_FRAME
    49        
     49
    5050        # Allow PIC code
    5151        .cprestore 16
    52        
     52
    5353        # Pass pcb_ptr to __main() as the first argument. It is already
    5454        # in $a0. As the first argument is passed in $a0, no operation
    5555        # is needed.
    56        
     56
    5757        jal __main
    5858        nop
    59        
     59
    6060        #
    6161        # Not reached.
  • uspace/lib/c/arch/mips32/src/entryjmp.S

    r3061bc1 r8565a42  
    4343        # tmp := entry_point
    4444        move $t9, $a0
    45        
     45
    4646        # Pass pcb to the entry point in $a0
    4747        move $a0, $a1
    48        
     48
    4949        jr $t9
    5050        addiu $sp, -ABI_STACK_FRAME
  • uspace/lib/c/arch/mips32/src/fibril.S

    r3061bc1 r8565a42  
    4646        sw $s8, CONTEXT_OFFSET_S8($a0)
    4747        sw $gp, CONTEXT_OFFSET_GP($a0)
    48        
     48
    4949        sw $k1, CONTEXT_OFFSET_TLS($a0)
    50        
     50
    5151#ifdef CONFIG_FPU
    5252        mfc1 $t0, $20
    5353        sw $t0, CONTEXT_OFFSET_F20($a0)
    54        
     54
    5555        mfc1 $t0, $21
    5656        sw $t0, CONTEXT_OFFSET_F21($a0)
    57        
     57
    5858        mfc1 $t0, $22
    5959        sw $t0, CONTEXT_OFFSET_F22($a0)
    60        
     60
    6161        mfc1 $t0, $23
    6262        sw $t0, CONTEXT_OFFSET_F23($a0)
    63        
     63
    6464        mfc1 $t0, $24
    6565        sw $t0, CONTEXT_OFFSET_F24($a0)
    66        
     66
    6767        mfc1 $t0, $25
    6868        sw $t0, CONTEXT_OFFSET_F25($a0)
    69        
     69
    7070        mfc1 $t0, $26
    7171        sw $t0, CONTEXT_OFFSET_F26($a0)
    72        
     72
    7373        mfc1 $t0, $27
    7474        sw $t0, CONTEXT_OFFSET_F27($a0)
    75        
     75
    7676        mfc1 $t0, $28
    7777        sw $t0, CONTEXT_OFFSET_F28($a0)
    78        
     78
    7979        mfc1 $t0, $29
    8080        sw $t0, CONTEXT_OFFSET_F29($a0)
    81        
     81
    8282        mfc1 $t0, $30
    8383        sw $t0, CONTEXT_OFFSET_F30($a0)
    8484#endif /* CONFIG_FPU */
    85        
     85
    8686        sw $ra, CONTEXT_OFFSET_PC($a0)
    8787        sw $sp, CONTEXT_OFFSET_SP($a0)
    88        
     88
    8989        # context_save returns 1
    9090        j $ra
     
    104104        lw $gp, CONTEXT_OFFSET_GP($a0)
    105105        lw $k1, CONTEXT_OFFSET_TLS($a0)
    106        
     106
    107107#ifdef CONFIG_FPU
    108108        lw $t0, CONTEXT_OFFSET_F20($a0)
    109109        mtc1 $t0, $20
    110        
     110
    111111        lw $t0, CONTEXT_OFFSET_F21($a0)
    112112        mtc1 $t0, $21
    113        
     113
    114114        lw $t0, CONTEXT_OFFSET_F22($a0)
    115115        mtc1 $t0, $22
    116        
     116
    117117        lw $t0, CONTEXT_OFFSET_F23($a0)
    118118        mtc1 $t0, $23
    119        
     119
    120120        lw $t0, CONTEXT_OFFSET_F24($a0)
    121121        mtc1 $t0, $24
    122        
     122
    123123        lw $t0, CONTEXT_OFFSET_F25($a0)
    124124        mtc1 $t0, $25
    125        
     125
    126126        lw $t0, CONTEXT_OFFSET_F26($a0)
    127127        mtc1 $t0, $26
    128        
     128
    129129        lw $t0, CONTEXT_OFFSET_F27($a0)
    130130        mtc1 $t0, $27
    131        
     131
    132132        lw $t0, CONTEXT_OFFSET_F28($a0)
    133133        mtc1 $t0, $28
    134        
     134
    135135        lw $t0, CONTEXT_OFFSET_F29($a0)
    136136        mtc1 $t0, $29
    137        
     137
    138138        lw $t0, CONTEXT_OFFSET_F30($a0)
    139139        mtc1 $t0, $30
    140140#endif /* CONFIG_FPU */
    141        
     141
    142142        lw $ra, CONTEXT_OFFSET_PC($a0)
    143143        lw $sp, CONTEXT_OFFSET_SP($a0)
    144        
     144
    145145        # Just for the jump into first function,
    146146        # but one instruction should not bother us
    147147        move $t9, $ra
    148        
     148
    149149        # context_restore returns 0
    150150        j $ra
  • uspace/lib/c/arch/mips32/src/syscall.c

    r3061bc1 r8565a42  
    4646        register sysarg_t __mips_reg_t1 asm("$9") = p6;
    4747        register sysarg_t __mips_reg_v0 asm("$2") = id;
    48        
     48
    4949        asm volatile (
    5050                "syscall\n"
     
    6363                : "%ra"
    6464        );
    65        
     65
    6666        return __mips_reg_v0;
    6767}
  • uspace/lib/c/arch/mips32/src/thread_entry.S

    r3061bc1 r8565a42  
    4343        .frame $sp, ABI_STACK_FRAME, $ra
    4444        .cpload $t9
    45        
     45
    4646        #
    4747        # v0 contains address of uarg.
    4848        #
    4949        add $a0, $v0, 0
    50        
     50
    5151        # Allocate the stack frame.
    5252        addiu $sp, -ABI_STACK_FRAME
    53        
     53
    5454        # Allow PIC code
    5555        .cprestore 16
    56        
     56
    5757        jal __thread_main
    5858        nop
    59        
     59
    6060        #
    6161        # Not reached.
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