Changeset 8565a42 in mainline for kernel/arch/abs32le/include
- Timestamp:
- 2018-03-02T20:34:50Z (8 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- a1a81f69, d5e5fd1
- Parents:
- 3061bc1 (diff), 34e1206 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)links above to see all the changes relative to each parent. - git-author:
- Jiří Zárevúcky <zarevucky.jiri@…> (2018-03-02 20:34:50)
- git-committer:
- GitHub <noreply@…> (2018-03-02 20:34:50)
- Location:
- kernel/arch/abs32le/include/arch
- Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/abs32le/include/arch/asm.h
r3061bc1 r8565a42 50 50 low-power mode) without any possibility of exitting 51 51 this function. */ 52 52 53 53 while (true); 54 54 } … … 137 137 * The return value stores the previous interrupt level. 138 138 */ 139 139 140 140 return 0; 141 141 } … … 151 151 * The return value stores the previous interrupt level. 152 152 */ 153 153 154 154 return 0; 155 155 } … … 169 169 * level. 170 170 */ 171 171 172 172 return 0; 173 173 } … … 179 179 * disabled. 180 180 */ 181 181 182 182 return false; 183 183 } … … 192 192 * address space. 193 193 */ 194 194 195 195 return 0; 196 196 } -
kernel/arch/abs32le/include/arch/atomic.h
r3061bc1 r8565a42 49 49 /* On real hardware the increment has to be done 50 50 as an atomic action. */ 51 51 52 52 val->count++; 53 53 } … … 60 60 /* On real hardware the decrement has to be done 61 61 as an atomic action. */ 62 62 63 63 val->count--; 64 64 } … … 72 72 value and the increment have to be done as a single 73 73 atomic action. */ 74 74 75 75 atomic_count_t prev = val->count; 76 76 77 77 val->count++; 78 78 return prev; … … 87 87 value and the decrement have to be done as a single 88 88 atomic action. */ 89 89 90 90 atomic_count_t prev = val->count; 91 91 92 92 val->count--; 93 93 return prev; … … 104 104 value and storing 1 have to be done as a single 105 105 atomic action. */ 106 106 107 107 atomic_count_t prev = val->count; 108 108 val->count = 1; -
kernel/arch/abs32le/include/arch/istate.h
r3061bc1 r8565a42 67 67 /* On real hardware this checks whether the interrupted 68 68 context originated from user space. */ 69 69 70 70 return !(istate->ip & UINT32_C(0x80000000)); 71 71 } … … 76 76 { 77 77 /* On real hardware this sets the instruction pointer. */ 78 78 79 79 istate->ip = retaddr; 80 80 } … … 84 84 { 85 85 /* On real hardware this returns the instruction pointer. */ 86 86 87 87 return istate->ip; 88 88 } … … 92 92 { 93 93 /* On real hardware this returns the frame pointer. */ 94 94 95 95 return istate->fp; 96 96 } -
kernel/arch/abs32le/include/arch/mm/page.h
r3061bc1 r8565a42 140 140 unsigned int pat : 1; 141 141 unsigned int global : 1; 142 142 143 143 /** Valid content even if the present bit is not set. */ 144 144 unsigned int soft_valid : 1; … … 151 151 { 152 152 pte_t *p = &pt[i]; 153 153 154 154 return ( 155 155 ((unsigned int) (!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT) | … … 168 168 { 169 169 pte_t *p = &pt[i]; 170 170 171 171 p->page_cache_disable = !(flags & PAGE_CACHEABLE); 172 172 p->present = !(flags & PAGE_NOT_PRESENT); … … 174 174 p->writeable = (flags & PAGE_WRITE) != 0; 175 175 p->global = (flags & PAGE_GLOBAL) != 0; 176 176 177 177 /* 178 178 * Ensure that there is at least one bit set even if the present bit is
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