Index: kernel/arch/sparc64/include/drivers/kbd.h
===================================================================
--- kernel/arch/sparc64/include/drivers/kbd.h	(revision 84060e23a3929fe446d82fec66852a1a6deaf4c7)
+++ kernel/arch/sparc64/include/drivers/kbd.h	(revision 8513ad77da21520006dc3e18de1e95a2b6f59c6f)
@@ -47,6 +47,4 @@
 extern kbd_type_t kbd_type;
 
-extern volatile uint8_t *kbd_virt_address;
-
 extern void kbd_init(ofw_tree_node_t *node);
 
Index: kernel/arch/sparc64/include/drivers/ns16550.h
===================================================================
--- kernel/arch/sparc64/include/drivers/ns16550.h	(revision 84060e23a3929fe446d82fec66852a1a6deaf4c7)
+++ kernel/arch/sparc64/include/drivers/ns16550.h	(revision 8513ad77da21520006dc3e18de1e95a2b6f59c6f)
@@ -51,42 +51,48 @@
 #define LCR_DLAB	0x80	/** Divisor Latch Access bit. */
 
-static inline uint8_t ns16550_rbr_read(void)
+/** Structure representing the ns16550 device. */
+typedef struct {
+	devno_t devno;
+	volatile uint8_t *reg;	/** Memory mapped registers of the ns16550. */
+} ns16550_t;
+
+static inline uint8_t ns16550_rbr_read(ns16550_t *dev)
 {
-	return kbd_virt_address[RBR_REG];
+	return dev->reg[RBR_REG];
 }
 
-static inline uint8_t ns16550_ier_read(void)
+static inline uint8_t ns16550_ier_read(ns16550_t *dev)
 {
-	return kbd_virt_address[IER_REG];
+	return dev->reg[IER_REG];
 }
 
-static inline void ns16550_ier_write(uint8_t v)
+static inline void ns16550_ier_write(ns16550_t *dev, uint8_t v)
 {
-	kbd_virt_address[IER_REG] = v;
+	dev->reg[IER_REG] = v;
 }
 
-static inline uint8_t ns16550_iir_read(void)
+static inline uint8_t ns16550_iir_read(ns16550_t *dev)
 {
-	return kbd_virt_address[IIR_REG];
+	return dev->reg[IIR_REG];
 }
 
-static inline void ns16550_fcr_write(uint8_t v)
+static inline void ns16550_fcr_write(ns16550_t *dev, uint8_t v)
 {
-	kbd_virt_address[FCR_REG] = v;
+	dev->reg[FCR_REG] = v;
 }
 
-static inline uint8_t ns16550_lcr_read(void)
+static inline uint8_t ns16550_lcr_read(ns16550_t *dev)
 {
-	return kbd_virt_address[LCR_REG];
+	return dev->reg[LCR_REG];
 }
 
-static inline void ns16550_lcr_write(uint8_t v)
+static inline void ns16550_lcr_write(ns16550_t *dev, uint8_t v)
 {
-	kbd_virt_address[LCR_REG] = v;
+	dev->reg[LCR_REG] = v;
 }
 
-static inline uint8_t ns16550_lsr_read(void)
+static inline uint8_t ns16550_lsr_read(ns16550_t *dev)
 {
-	return kbd_virt_address[LSR_REG];
+	return dev->reg[LSR_REG];
 }
 
Index: kernel/arch/sparc64/include/drivers/z8530.h
===================================================================
--- kernel/arch/sparc64/include/drivers/z8530.h	(revision 84060e23a3929fe446d82fec66852a1a6deaf4c7)
+++ kernel/arch/sparc64/include/drivers/z8530.h	(revision 8513ad77da21520006dc3e18de1e95a2b6f59c6f)
@@ -92,5 +92,11 @@
 #define RR0_RCA		(0x1<<0)	/** Receive Character Available. */
 
-static inline void z8530_write(index_t chan, uint8_t reg, uint8_t val)
+/** Structure representing the z8530 device. */
+typedef struct {
+	devno_t devno;
+	volatile uint8_t *reg;		/** Memory mapped registers of the z8530. */
+} z8530_t;
+
+static inline void z8530_write(z8530_t *dev, index_t chan, uint8_t reg, uint8_t val)
 {
 	/*
@@ -98,18 +104,18 @@
 	 * command as their bit 3 is 1.
 	 */
-	kbd_virt_address[WR0+chan] = reg;	/* select register */
-	kbd_virt_address[WR0+chan] = val;	/* write value */
+	dev->reg[WR0+chan] = reg;	/* select register */
+	dev->reg[WR0+chan] = val;	/* write value */
 }
 
-static inline void z8530_write_a(uint8_t reg, uint8_t val)
+static inline void z8530_write_a(z8530_t *dev, uint8_t reg, uint8_t val)
 {
-	z8530_write(Z8530_CHAN_A, reg, val);
+	z8530_write(dev, Z8530_CHAN_A, reg, val);
 }
-static inline void z8530_write_b(uint8_t reg, uint8_t val)
+static inline void z8530_write_b(z8530_t *dev, uint8_t reg, uint8_t val)
 {
-	z8530_write(Z8530_CHAN_B, reg, val);
+	z8530_write(dev, Z8530_CHAN_B, reg, val);
 }
 
-static inline uint8_t z8530_read(index_t chan, uint8_t reg) 
+static inline uint8_t z8530_read(z8530_t *dev, index_t chan, uint8_t reg) 
 {
 	/*
@@ -117,15 +123,15 @@
 	 * command as their bit 3 is 1.
 	 */
-	kbd_virt_address[WR0+chan] = reg;	/* select register */
-	return kbd_virt_address[WR0+chan];
+	dev->reg[WR0+chan] = reg;	/* select register */
+	return dev->reg[WR0+chan];
 }
 
-static inline uint8_t z8530_read_a(uint8_t reg)
+static inline uint8_t z8530_read_a(z8530_t *dev, uint8_t reg)
 {
-	return z8530_read(Z8530_CHAN_A, reg);
+	return z8530_read(dev, Z8530_CHAN_A, reg);
 }
-static inline uint8_t z8530_read_b(uint8_t reg)
+static inline uint8_t z8530_read_b(z8530_t *dev, uint8_t reg)
 {
-	return z8530_read(Z8530_CHAN_B, reg);
+	return z8530_read(dev, Z8530_CHAN_B, reg);
 }