Index: kernel/arch/sparc64/src/cpu/cpu.c
===================================================================
--- kernel/arch/sparc64/src/cpu/cpu.c	(revision e43982009725c81d67d73f4126d50ca467121cfb)
+++ kernel/arch/sparc64/src/cpu/cpu.c	(revision 84060e23a3929fe446d82fec66852a1a6deaf4c7)
@@ -41,4 +41,7 @@
 #include <arch/types.h>
 #include <arch/drivers/tick.h>
+#include <arch/mm/page.h>
+#include <arch/mm/tlb.h>
+#include <macros.h>
 
 /** Perform sparc64 specific initialization of the processor structure for the current processor. */
@@ -53,4 +56,7 @@
 	CPU->arch.mid = upa_config.mid;
 	
+	/*
+	 * Detect processor frequency.
+	 */
 	node = ofw_tree_find_child_by_device_type(ofw_tree_lookup("/"), "cpu");
 	while (node) {
@@ -71,4 +77,20 @@
 	CPU->arch.clock_frequency = clock_frequency;
 	tick_init();
+	
+	/*
+	 * Lock CPU stack in DTLB.
+	 */
+	uintptr_t base = ALIGN_DOWN(config.base, 1<<KERNEL_PAGE_WIDTH);
+		 
+	if (!overlaps((uintptr_t) CPU->stack, PAGE_SIZE, base, (1<<KERNEL_PAGE_WIDTH))) {
+		/*
+		 * Kernel stack of this processor is not locked in DTLB.
+		 * First, demap any already existing mappings.
+		 * Second, create a locked mapping for it.
+		 */
+		dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_NUCLEUS, (uintptr_t) CPU->stack);
+		dtlb_insert_mapping((uintptr_t) CPU->stack, KA2PA(CPU->stack), PAGESIZE_8K, true, true);
+	}
+
 }
 
Index: kernel/arch/sparc64/src/mm/page.c
===================================================================
--- kernel/arch/sparc64/src/mm/page.c	(revision e43982009725c81d67d73f4126d50ca467121cfb)
+++ kernel/arch/sparc64/src/mm/page.c	(revision 84060e23a3929fe446d82fec66852a1a6deaf4c7)
@@ -120,8 +120,9 @@
 		{ PAGESIZE_512K, 64*PAGE_SIZE, 4 },	/* 2M */
 		{ PAGESIZE_4M, 0, 1 }			/* 4M */
+		{ PAGESIZE_4M, 512*PAGE_SIZE, 2 }	/* 8M */
 	};
 	
 	ASSERT(ALIGN_UP(physaddr, PAGE_SIZE) == physaddr);
-	ASSERT(size <= 4*1024*1024);
+	ASSERT(size <= 8*1024*1024);
 	
 	if (size <= FRAME_SIZE)
Index: kernel/arch/sparc64/src/mm/tsb.c
===================================================================
--- kernel/arch/sparc64/src/mm/tsb.c	(revision e43982009725c81d67d73f4126d50ca467121cfb)
+++ kernel/arch/sparc64/src/mm/tsb.c	(revision 84060e23a3929fe446d82fec66852a1a6deaf4c7)
@@ -88,5 +88,5 @@
 	 */
 
-	tsb->tag.invalid = 1;	/* invalidate the entry (tag target has this set to 0 */
+	tsb->tag.invalid = 1;	/* invalidate the entry (tag target has this set to 0) */
 
 	write_barrier();
Index: kernel/arch/sparc64/src/start.S
===================================================================
--- kernel/arch/sparc64/src/start.S	(revision e43982009725c81d67d73f4126d50ca467121cfb)
+++ kernel/arch/sparc64/src/start.S	(revision 84060e23a3929fe446d82fec66852a1a6deaf4c7)
@@ -30,4 +30,5 @@
 #include <arch/regdef.h>
 #include <arch/boot/boot.h>
+#include <arch/stack.h>
 
 #include <arch/mm/mmu.h>
@@ -57,5 +58,4 @@
  * - TLBs are on
  * - identity mapping for the kernel image
- * - identity mapping for memory stack
  */
 
@@ -68,5 +68,8 @@
 	 */
 
-	flushw					! flush all but the active register window
+	wrpr %g0, NWINDOWS - 2, %cansave		! set maximum saveable windows
+	wrpr %g0, 0, %canrestore		! get rid of windows we will never need again
+	wrpr %g0, 0, %otherwin			! make sure the window state is consistent
+	wrpr %g0, NWINDOWS - 1, %cleanwin	! prevent needless clean_window traps for kernel
 
 	wrpr %g0, 0, %tl			! TL = 0, primary context register is used
@@ -216,4 +219,12 @@
 	nop
 
+	/*
+	 * So far, we have not touched the stack.
+	 * It is a good idead to set the kernel stack to a known state now.
+	 */
+	sethi %hi(temporary_boot_stack), %sp
+	or %sp, %lo(temporary_boot_stack), %sp
+	sub %sp, STACK_BIAS, %sp
+
 	sethi %hi(bootinfo), %o0
 	call memcpy				! copy bootinfo
@@ -273,2 +284,25 @@
 	ba 0b
 	nop
+
+
+.section K_DATA_START, "aw", @progbits
+
+/*
+ * Create small stack to be used by the bootstrap processor.
+ * It is going to be used only for a very limited period of
+ * time, but we switch to it anyway, just to be sure we are
+ * properly initialized.
+ *
+ * What is important is that this piece of memory is covered
+ * by the 4M DTLB locked entry and therefore there will be
+ * no surprises like deadly combinations of spill trap and
+ * and TLB miss on the stack address.
+ */
+
+#define INITIAL_STACK_SIZE	1024
+
+.align STACK_ALIGNMENT
+.space INITIAL_STACK_SIZE
+.align STACK_ALIGNMENT
+temporary_boot_stack:
+.space STACK_WINDOW_SAVE_AREA_SIZE
Index: kernel/arch/sparc64/src/trap/trap_table.S
===================================================================
--- kernel/arch/sparc64/src/trap/trap_table.S	(revision e43982009725c81d67d73f4126d50ca467121cfb)
+++ kernel/arch/sparc64/src/trap/trap_table.S	(revision 84060e23a3929fe446d82fec66852a1a6deaf4c7)
@@ -674,5 +674,5 @@
 	wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(2), %wstate
 
-	wrpr %g0, NWINDOW - 1, %cleanwin	! prevent unnecessary clean_window exceptions
+	wrpr %g0, NWINDOWS - 1, %cleanwin	! prevent unnecessary clean_window exceptions
 
 	/*
@@ -831,5 +831,5 @@
 	and %g1, TSTATE_CWP_MASK, %l0
 	inc %l0
-	and %l0, NWINDOW - 1, %l0	! %l0 mod NWINDOW
+	and %l0, NWINDOWS - 1, %l0	! %l0 mod NWINDOWS
 	rdpr %cwp, %l1
 	cmp %l0, %l1
@@ -902,5 +902,5 @@
 	sub %g1, %g2, %g3
 	dec %g3
-	and %g3, NWINDOW - 1, %g3
+	and %g3, NWINDOWS - 1, %g3
 	wrpr %g3, 0, %cwp
 
@@ -934,5 +934,5 @@
 
 	dec %g3
-	and %g3, NWINDOW - 1, %g3
+	and %g3, NWINDOWS - 1, %g3
 	wrpr %g3, 0, %cwp			! switch to the preceeding window
 
@@ -947,11 +947,11 @@
 	wrpr %g1, 0, %cwp
 	add %g4, %g2, %g2
-	cmp %g2, NWINDOW - 2
-	bg 2f					! fix the CANRESTORE=NWINDOW-1 anomaly
-	mov NWINDOW - 2, %g1			! use dealy slot for both cases
+	cmp %g2, NWINDOWS - 2
+	bg 2f					! fix the CANRESTORE=NWINDOWS-1 anomaly
+	mov NWINDOWS - 2, %g1			! use dealy slot for both cases
 	sub %g1, %g2, %g1
 	
 	wrpr %g0, 0, %otherwin
-	wrpr %g1, 0, %cansave			! NWINDOW - 2 - CANRESTORE
+	wrpr %g1, 0, %cansave			! NWINDOWS - 2 - CANRESTORE
 	wrpr %g2, 0, %canrestore		! OTHERWIN + windows in the buffer
 	wrpr %g2, 0, %cleanwin			! avoid information leak
@@ -973,12 +973,12 @@
 	 *
 	 * instruction trapped and spilled a register window into the userspace
-	 * window buffer, we have just restored NWINDOW - 1 register windows.
+	 * window buffer, we have just restored NWINDOWS - 1 register windows.
 	 * However, CANRESTORE can be only NWINDOW - 2 at most.
 	 *
-	 * The solution is to manually switch to (CWP - 1) mod NWINDOW
+	 * The solution is to manually switch to (CWP - 1) mod NWINDOWS
 	 * and set the window state registers so that:
 	 *
-	 * 	CANRESTORE 	= NWINDOW - 2
-	 *	CLEANWIN	= NWINDOW - 2
+	 * 	CANRESTORE 	= NWINDOWS - 2
+	 *	CLEANWIN	= NWINDOWS - 2
 	 *	CANSAVE 	= 0
 	 *	OTHERWIN	= 0
@@ -994,5 +994,5 @@
 	rdpr %cwp, %g1
 	dec %g1
-	and %g1, NWINDOW - 1, %g1
+	and %g1, NWINDOWS - 1, %g1
 	wrpr %g1, 0, %cwp			! CWP--