Index: arch/mips32/src/ddi/ddi.c
===================================================================
--- arch/mips32/src/ddi/ddi.c	(revision a6dd361b1b93be3250db112f36c9db227c077ff9)
+++ arch/mips32/src/ddi/ddi.c	(revision 7f1c620c9e5bd00a90322b5118b47b8b033b5152)
@@ -51,5 +51,5 @@
  * @return 0 on success or an error code from errno.h.
  */
-int ddi_iospace_enable_arch(task_t *task, __address ioaddr, size_t size)
+int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size)
 {
 	return 0;
Index: arch/mips32/src/debugger.c
===================================================================
--- arch/mips32/src/debugger.c	(revision a6dd361b1b93be3250db112f36c9db227c077ff9)
+++ arch/mips32/src/debugger.c	(revision 7f1c620c9e5bd00a90322b5118b47b8b033b5152)
@@ -92,6 +92,6 @@
 
 static struct {
-	__u32 andmask;
-	__u32 value;
+	uint32_t andmask;
+	uint32_t value;
 }jmpinstr[] = {
 	{0xf3ff0000, 0x41000000}, /* BCzF */
@@ -126,5 +126,5 @@
  * @return true - it is jump instruction, false otherwise
  */
-static bool is_jump(__native instr)
+static bool is_jump(unative_t instr)
 {
 	int i;
@@ -154,10 +154,10 @@
 	/* Check, that the breakpoints do not conflict */
 	for (i=0; i<BKPOINTS_MAX; i++) {
-		if (breakpoints[i].address == (__address)argv->intval) {
+		if (breakpoints[i].address == (uintptr_t)argv->intval) {
 			printf("Duplicate breakpoint %d.\n", i);
 			spinlock_unlock(&bkpoints_lock);
 			return 0;
-		} else if (breakpoints[i].address == (__address)argv->intval + sizeof(__native) || \
-			   breakpoints[i].address == (__address)argv->intval - sizeof(__native)) {
+		} else if (breakpoints[i].address == (uintptr_t)argv->intval + sizeof(unative_t) || \
+			   breakpoints[i].address == (uintptr_t)argv->intval - sizeof(unative_t)) {
 			printf("Adjacent breakpoints not supported, conflict with %d.\n", i);
 			spinlock_unlock(&bkpoints_lock);
@@ -178,8 +178,8 @@
 		return 0;
 	}
-	cur->address = (__address) argv->intval;
+	cur->address = (uintptr_t) argv->intval;
 	printf("Adding breakpoint on address: %p\n", argv->intval);
-	cur->instruction = ((__native *)cur->address)[0];
-	cur->nextinstruction = ((__native *)cur->address)[1];
+	cur->instruction = ((unative_t *)cur->address)[0];
+	cur->nextinstruction = ((unative_t *)cur->address)[1];
 	if (argv == &add_argv) {
 		cur->flags = 0;
@@ -193,5 +193,5 @@
 
 	/* Set breakpoint */
-	*((__native *)cur->address) = 0x0d;
+	*((unative_t *)cur->address) = 0x0d;
 
 	spinlock_unlock(&bkpoint_lock);
@@ -229,6 +229,6 @@
 		return 0;
 	}
-	((__u32 *)cur->address)[0] = cur->instruction;
-	((__u32 *)cur->address)[1] = cur->nextinstruction;
+	((uint32_t *)cur->address)[0] = cur->instruction;
+	((uint32_t *)cur->address)[1] = cur->nextinstruction;
 
 	cur->address = NULL;
@@ -299,5 +299,5 @@
 {
 	bpinfo_t *cur = NULL;
-	__address fireaddr = istate->epc;
+	uintptr_t fireaddr = istate->epc;
 	int i;
 
@@ -316,5 +316,5 @@
 		/* Reinst only breakpoint */
 		if ((breakpoints[i].flags & BKPOINT_REINST) \
-		    && (fireaddr ==breakpoints[i].address+sizeof(__native))) {
+		    && (fireaddr ==breakpoints[i].address+sizeof(unative_t))) {
 			cur = &breakpoints[i];
 			break;
@@ -324,7 +324,7 @@
 		if (cur->flags & BKPOINT_REINST) {
 			/* Set breakpoint on first instruction */
-			((__u32 *)cur->address)[0] = 0x0d;
+			((uint32_t *)cur->address)[0] = 0x0d;
 			/* Return back the second */
-			((__u32 *)cur->address)[1] = cur->nextinstruction;
+			((uint32_t *)cur->address)[1] = cur->nextinstruction;
 			cur->flags &= ~BKPOINT_REINST;
 			spinlock_unlock(&bkpoint_lock);
@@ -339,9 +339,9 @@
 
 		/* Return first instruction back */
-		((__u32 *)cur->address)[0] = cur->instruction;
+		((uint32_t *)cur->address)[0] = cur->instruction;
 
 		if (! (cur->flags & BKPOINT_ONESHOT)) {
 			/* Set Breakpoint on next instruction */
-			((__u32 *)cur->address)[1] = 0x0d;
+			((uint32_t *)cur->address)[1] = 0x0d;
 			cur->flags |= BKPOINT_REINST;
 		} 
Index: arch/mips32/src/drivers/arc.c
===================================================================
--- arch/mips32/src/drivers/arc.c	(revision a6dd361b1b93be3250db112f36c9db227c077ff9)
+++ arch/mips32/src/drivers/arc.c	(revision 7f1c620c9e5bd00a90322b5118b47b8b033b5152)
@@ -143,5 +143,5 @@
 		case CmResourceTypePort:
 			printf("Port: %p-size:%d ",
-			       (__address)configdata->descr[i].u.port.start,
+			       (uintptr_t)configdata->descr[i].u.port.start,
 			       configdata->descr[i].u.port.length);
 			break;
@@ -153,5 +153,5 @@
 		case CmResourceTypeMemory:
 			printf("Memory: %p-size:%d ",
-			       (__address)configdata->descr[i].u.port.start,
+			       (uintptr_t)configdata->descr[i].u.port.start,
 			       configdata->descr[i].u.port.length);
 			break;
@@ -237,5 +237,5 @@
 static void arc_putchar(char ch)
 {
-	__u32 cnt;
+	uint32_t cnt;
 	ipl_t ipl;
 
@@ -294,5 +294,5 @@
 {
 	char ch;
-	__u32 count;
+	uint32_t count;
 	long result;
 	
@@ -317,5 +317,5 @@
 {
 	char ch;
-	__u32 count;
+	uint32_t count;
 	long result;
 
@@ -381,5 +381,5 @@
 	arc_memdescriptor_t *desc;
 	int total = 0;
-	__address base;
+	uintptr_t base;
 	size_t basesize;
 
Index: arch/mips32/src/exception.c
===================================================================
--- arch/mips32/src/exception.c	(revision a6dd361b1b93be3250db112f36c9db227c077ff9)
+++ arch/mips32/src/exception.c	(revision 7f1c620c9e5bd00a90322b5118b47b8b033b5152)
@@ -96,5 +96,5 @@
 static void reserved_instr_exception(int n, istate_t *istate)
 {
-	if (*((__u32 *)istate->epc) == 0x7c03e83b) {
+	if (*((uint32_t *)istate->epc) == 0x7c03e83b) {
 		ASSERT(THREAD);
 		istate->epc += 4;
@@ -140,5 +140,5 @@
 static void interrupt_exception(int n, istate_t *istate)
 {
-	__u32 cause;
+	uint32_t cause;
 	int i;
 	
Index: arch/mips32/src/interrupt.c
===================================================================
--- arch/mips32/src/interrupt.c	(revision a6dd361b1b93be3250db112f36c9db227c077ff9)
+++ arch/mips32/src/interrupt.c	(revision 7f1c620c9e5bd00a90322b5118b47b8b033b5152)
@@ -133,5 +133,5 @@
 
 /* Reregister irq to be IPC-ready */
-void irq_ipc_bind_arch(__native irq)
+void irq_ipc_bind_arch(unative_t irq)
 {
 	/* Do not allow to redefine timer */
Index: arch/mips32/src/mips32.c
===================================================================
--- arch/mips32/src/mips32.c	(revision a6dd361b1b93be3250db112f36c9db227c077ff9)
+++ arch/mips32/src/mips32.c	(revision 7f1c620c9e5bd00a90322b5118b47b8b033b5152)
@@ -72,5 +72,5 @@
  * when not in .text section ????????
  */
-__address supervisor_sp __attribute__ ((section (".text")));
+uintptr_t supervisor_sp __attribute__ ((section (".text")));
 /* Stack pointer saved when entering user mode */
 /* TODO: How do we do it on SMP system???? */
@@ -82,5 +82,5 @@
 	init.cnt = bootinfo.cnt;
 	
-	__u32 i;
+	uint32_t i;
 	
 	for (i = 0; i < bootinfo.cnt; i++) {
@@ -147,8 +147,8 @@
 					      cp0_status_um_bit |
 					      cp0_status_ie_enabled_bit));
-	cp0_epc_write((__address) kernel_uarg->uspace_entry);
-	userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE), 
-		      (__address) kernel_uarg->uspace_uarg,
-		      (__address) kernel_uarg->uspace_entry);
+	cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
+	userspace_asm(((uintptr_t) kernel_uarg->uspace_stack+PAGE_SIZE), 
+		      (uintptr_t) kernel_uarg->uspace_uarg,
+		      (uintptr_t) kernel_uarg->uspace_entry);
 	while (1)
 		;
@@ -163,5 +163,5 @@
 void before_thread_runs_arch(void)
 {
-	supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
+	supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
 }
 
@@ -175,5 +175,5 @@
  * possible to have it separately in the future.
  */
-__native sys_tls_set(__native addr)
+unative_t sys_tls_set(unative_t addr)
 {
 	return 0;
Index: arch/mips32/src/mm/page.c
===================================================================
--- arch/mips32/src/mm/page.c	(revision a6dd361b1b93be3250db112f36c9db227c077ff9)
+++ arch/mips32/src/mm/page.c	(revision 7f1c620c9e5bd00a90322b5118b47b8b033b5152)
@@ -46,5 +46,5 @@
  *   translate the physical address to uncached area
  */
-__address hw_map(__address physaddr, size_t size)
+uintptr_t hw_map(uintptr_t physaddr, size_t size)
 {
 	return physaddr + 0xa0000000;
Index: arch/mips32/src/mm/tlb.c
===================================================================
--- arch/mips32/src/mm/tlb.c	(revision a6dd361b1b93be3250db112f36c9db227c077ff9)
+++ arch/mips32/src/mm/tlb.c	(revision 7f1c620c9e5bd00a90322b5118b47b8b033b5152)
@@ -52,8 +52,8 @@
 static void tlb_modified_fail(istate_t *istate);
 
-static pte_t *find_mapping_and_check(__address badvaddr, int access, istate_t *istate, int *pfrc);
-
-static void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, __address pfn);
-static void prepare_entry_hi(entry_hi_t *hi, asid_t asid, __address addr);
+static pte_t *find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate, int *pfrc);
+
+static void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, uintptr_t pfn);
+static void prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr);
 
 /** Initialize TLB
@@ -97,5 +97,5 @@
 	entry_hi_t hi;
 	asid_t asid;
-	__address badvaddr;
+	uintptr_t badvaddr;
 	pte_t *pte;
 	int pfrc;
@@ -167,5 +167,5 @@
 {
 	tlb_index_t index;
-	__address badvaddr;
+	uintptr_t badvaddr;
 	entry_lo_t lo;
 	entry_hi_t hi;
@@ -251,5 +251,5 @@
 {
 	tlb_index_t index;
-	__address badvaddr;
+	uintptr_t badvaddr;
 	entry_lo_t lo;
 	entry_hi_t hi;
@@ -384,5 +384,5 @@
  * @return PTE on success, NULL otherwise.
  */
-pte_t *find_mapping_and_check(__address badvaddr, int access, istate_t *istate, int *pfrc)
+pte_t *find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate, int *pfrc)
 {
 	entry_hi_t hi;
@@ -446,5 +446,5 @@
 }
 
-void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, __address pfn)
+void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, uintptr_t pfn)
 {
 	lo->value = 0;
@@ -456,5 +456,5 @@
 }
 
-void prepare_entry_hi(entry_hi_t *hi, asid_t asid, __address addr)
+void prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr)
 {
 	hi->value = ALIGN_DOWN(addr, PAGE_SIZE * 2);
@@ -568,5 +568,5 @@
  * @param cnt Number of entries to invalidate.
  */
-void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt)
+void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
 {
 	int i;