Changeset 7f1c620 in mainline for arch/mips32/src

Timestamp:

2006-07-04T17:17:56Z (20 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

0ffa3ef5

Parents:

991779c5

Message:

Replace old u?? types with respective C99 variants (e.g. uint32_t, int64_t, uintptr_t etc.).

Location:

arch/mips32/src

Files:

• ddi/ddi.c (modified) (1 diff)
• debugger.c (modified) (10 diffs)
• drivers/arc.c (modified) (6 diffs)
• exception.c (modified) (2 diffs)
• interrupt.c (modified) (1 diff)
• mips32.c (modified) (5 diffs)
• mm/page.c (modified) (1 diff)
• mm/tlb.c (modified) (8 diffs)

arch/mips32/src/ddi/ddi.c

@@ -51 +51 @@
  * @return 0 on success or an error code from errno.h.
  */
-int ddi_iospace_enable_arch(task_t *task, __address ioaddr, size_t size)
+int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size)
 {
         return 0;

arch/mips32/src/debugger.c

@@ -92 +92 @@
 
 static struct {
-        __u32 andmask;
-        __u32 value;
+        uint32_t andmask;
+        uint32_t value;
 }jmpinstr[] = {
         {0xf3ff0000, 0x41000000}, /* BCzF */
@@ -126 +126 @@
  * @return true - it is jump instruction, false otherwise
  */
-static bool is_jump(__native instr)
+static bool is_jump(unative_t instr)
 {
         int i;
@@ -154 +154 @@
         /* Check, that the breakpoints do not conflict */
         for (i=0; i<BKPOINTS_MAX; i++) {
-                if (breakpoints[i].address == (__address)argv->intval) {
+                if (breakpoints[i].address == (uintptr_t)argv->intval) {
                         printf("Duplicate breakpoint %d.\n", i);
                         spinlock_unlock(&bkpoints_lock);
                         return 0;
-                } else if (breakpoints[i].address == (__address)argv->intval + sizeof(__native) || \
-                           breakpoints[i].address == (__address)argv->intval - sizeof(__native)) {
+                } else if (breakpoints[i].address == (uintptr_t)argv->intval + sizeof(unative_t) || \
+                           breakpoints[i].address == (uintptr_t)argv->intval - sizeof(unative_t)) {
                         printf("Adjacent breakpoints not supported, conflict with %d.\n", i);
                         spinlock_unlock(&bkpoints_lock);
@@ -178 +178 @@
                 return 0;
         }
-        cur->address = (__address) argv->intval;
+        cur->address = (uintptr_t) argv->intval;
         printf("Adding breakpoint on address: %p\n", argv->intval);
-        cur->instruction = ((__native *)cur->address)[0];
-        cur->nextinstruction = ((__native *)cur->address)[1];
+        cur->instruction = ((unative_t *)cur->address)[0];
+        cur->nextinstruction = ((unative_t *)cur->address)[1];
         if (argv == &add_argv) {
                 cur->flags = 0;
@@ -193 +193 @@
 
         /* Set breakpoint */
-        *((__native *)cur->address) = 0x0d;
+        *((unative_t *)cur->address) = 0x0d;
 
         spinlock_unlock(&bkpoint_lock);
@@ -229 +229 @@
                 return 0;
         }
-        ((__u32 *)cur->address)[0] = cur->instruction;
-        ((__u32 *)cur->address)[1] = cur->nextinstruction;
+        ((uint32_t *)cur->address)[0] = cur->instruction;
+        ((uint32_t *)cur->address)[1] = cur->nextinstruction;
 
         cur->address = NULL;
@@ -299 +299 @@
 {
         bpinfo_t *cur = NULL;
-        __address fireaddr = istate->epc;
+        uintptr_t fireaddr = istate->epc;
         int i;
 
@@ -316 +316 @@
                 /* Reinst only breakpoint */
                 if ((breakpoints[i].flags & BKPOINT_REINST) \
-                    && (fireaddr ==breakpoints[i].address+sizeof(__native))) {
+                    && (fireaddr ==breakpoints[i].address+sizeof(unative_t))) {
                         cur = &breakpoints[i];
                         break;
@@ -324 +324 @@
                 if (cur->flags & BKPOINT_REINST) {
                         /* Set breakpoint on first instruction */
-                        ((__u32 *)cur->address)[0] = 0x0d;
+                        ((uint32_t *)cur->address)[0] = 0x0d;
                         /* Return back the second */
-                        ((__u32 *)cur->address)[1] = cur->nextinstruction;
+                        ((uint32_t *)cur->address)[1] = cur->nextinstruction;
                         cur->flags &= ~BKPOINT_REINST;
                         spinlock_unlock(&bkpoint_lock);
@@ -339 +339 @@
 
                 /* Return first instruction back */
-                ((__u32 *)cur->address)[0] = cur->instruction;
+                ((uint32_t *)cur->address)[0] = cur->instruction;
 
                 if (! (cur->flags & BKPOINT_ONESHOT)) {
                         /* Set Breakpoint on next instruction */
-                        ((__u32 *)cur->address)[1] = 0x0d;
+                        ((uint32_t *)cur->address)[1] = 0x0d;
                         cur->flags |= BKPOINT_REINST;
                 } 

arch/mips32/src/drivers/arc.c

@@ -143 +143 @@
                 case CmResourceTypePort:
                         printf("Port: %p-size:%d ",
-                               (__address)configdata->descr[i].u.port.start,
+                               (uintptr_t)configdata->descr[i].u.port.start,
                                configdata->descr[i].u.port.length);
                         break;
@@ -153 +153 @@
                 case CmResourceTypeMemory:
                         printf("Memory: %p-size:%d ",
-                               (__address)configdata->descr[i].u.port.start,
+                               (uintptr_t)configdata->descr[i].u.port.start,
                                configdata->descr[i].u.port.length);
                         break;
@@ -237 +237 @@
 static void arc_putchar(char ch)
 {
-        __u32 cnt;
+        uint32_t cnt;
         ipl_t ipl;
 
@@ -294 +294 @@
 {
         char ch;
-        __u32 count;
+        uint32_t count;
         long result;
         
@@ -317 +317 @@
 {
         char ch;
-        __u32 count;
+        uint32_t count;
         long result;
 
@@ -381 +381 @@
         arc_memdescriptor_t *desc;
         int total = 0;
-        __address base;
+        uintptr_t base;
         size_t basesize;
 

arch/mips32/src/exception.c

@@ -96 +96 @@
 static void reserved_instr_exception(int n, istate_t *istate)
 {
-        if (*((__u32 *)istate->epc) == 0x7c03e83b) {
+        if (*((uint32_t *)istate->epc) == 0x7c03e83b) {
                 ASSERT(THREAD);
                 istate->epc += 4;
@@ -140 +140 @@
 static void interrupt_exception(int n, istate_t *istate)
 {
-        __u32 cause;
+        uint32_t cause;
         int i;
         

arch/mips32/src/interrupt.c

@@ -133 +133 @@
 
 /* Reregister irq to be IPC-ready */
-void irq_ipc_bind_arch(__native irq)
+void irq_ipc_bind_arch(unative_t irq)
 {
         /* Do not allow to redefine timer */

arch/mips32/src/mips32.c

@@ -72 +72 @@
  * when not in .text section ????????
  */
-__address supervisor_sp __attribute__ ((section (".text")));
+uintptr_t supervisor_sp __attribute__ ((section (".text")));
 /* Stack pointer saved when entering user mode */
 /* TODO: How do we do it on SMP system???? */
@@ -82 +82 @@
         init.cnt = bootinfo.cnt;
         
-        __u32 i;
+        uint32_t i;
         
         for (i = 0; i < bootinfo.cnt; i++) {
@@ -147 +147 @@
                                               cp0_status_um_bit |
                                               cp0_status_ie_enabled_bit));
-        cp0_epc_write((__address) kernel_uarg->uspace_entry);
-        userspace_asm(((__address) kernel_uarg->uspace_stack+PAGE_SIZE), 
-                      (__address) kernel_uarg->uspace_uarg,
-                      (__address) kernel_uarg->uspace_entry);
+        cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
+        userspace_asm(((uintptr_t) kernel_uarg->uspace_stack+PAGE_SIZE), 
+                      (uintptr_t) kernel_uarg->uspace_uarg,
+                      (uintptr_t) kernel_uarg->uspace_entry);
         while (1)
                 ;
@@ -163 +163 @@
 void before_thread_runs_arch(void)
 {
-        supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
+        supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
 }
 
@@ -175 +175 @@
  * possible to have it separately in the future.
  */
-__native sys_tls_set(__native addr)
+unative_t sys_tls_set(unative_t addr)
 {
         return 0;

arch/mips32/src/mm/page.c

@@ -46 +46 @@
  *   translate the physical address to uncached area
  */
-__address hw_map(__address physaddr, size_t size)
+uintptr_t hw_map(uintptr_t physaddr, size_t size)
 {
         return physaddr + 0xa0000000;

arch/mips32/src/mm/tlb.c

@@ -52 +52 @@
 static void tlb_modified_fail(istate_t *istate);
 
-static pte_t *find_mapping_and_check(__address badvaddr, int access, istate_t *istate, int *pfrc);
-
-static void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, __address pfn);
-static void prepare_entry_hi(entry_hi_t *hi, asid_t asid, __address addr);
+static pte_t *find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate, int *pfrc);
+
+static void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, uintptr_t pfn);
+static void prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr);
 
 /** Initialize TLB
@@ -97 +97 @@
         entry_hi_t hi;
         asid_t asid;
-        __address badvaddr;
+        uintptr_t badvaddr;
         pte_t *pte;
         int pfrc;
@@ -167 +167 @@
 {
         tlb_index_t index;
-        __address badvaddr;
+        uintptr_t badvaddr;
         entry_lo_t lo;
         entry_hi_t hi;
@@ -251 +251 @@
 {
         tlb_index_t index;
-        __address badvaddr;
+        uintptr_t badvaddr;
         entry_lo_t lo;
         entry_hi_t hi;
@@ -384 +384 @@
  * @return PTE on success, NULL otherwise.
  */
-pte_t *find_mapping_and_check(__address badvaddr, int access, istate_t *istate, int *pfrc)
+pte_t *find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate, int *pfrc)
 {
         entry_hi_t hi;
@@ -446 +446 @@
 }
 
-void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, __address pfn)
+void prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable, uintptr_t pfn)
 {
         lo->value = 0;
@@ -456 +456 @@
 }
 
-void prepare_entry_hi(entry_hi_t *hi, asid_t asid, __address addr)
+void prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr)
 {
         hi->value = ALIGN_DOWN(addr, PAGE_SIZE * 2);
@@ -568 +568 @@
  * @param cnt Number of entries to invalidate.
  */
-void tlb_invalidate_pages(asid_t asid, __address page, count_t cnt)
+void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
 {
         int i;