Index: kernel/arch/amd64/src/debugger.c
===================================================================
--- kernel/arch/amd64/src/debugger.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/amd64/src/debugger.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -230,14 +230,14 @@
 				return;
 			
-			printf("*** Found ZERO on address %" PRIp " (slot %d) ***\n",
-			    breakpoints[slot].address, slot);
+			printf("*** Found ZERO on address %p (slot %d) ***\n",
+			    (void *) breakpoints[slot].address, slot);
 		} else {
-			printf("Data watchpoint - new data: %" PRIp "\n",
+			printf("Data watchpoint - new data: %#" PRIxn "\n",
 			    *((unative_t *) breakpoints[slot].address));
 		}
 	}
 	
-	printf("Reached breakpoint %d:%" PRIp " (%s)\n", slot, getip(istate),
-	    symtab_fmt_name_lookup(getip(istate)));
+	printf("Reached breakpoint %d:%p (%s)\n", slot,
+	    (void *) getip(istate), symtab_fmt_name_lookup(getip(istate)));
 	
 #ifdef CONFIG_KCONSOLE
@@ -363,12 +363,12 @@
 			
 #ifdef __32_BITS__
-			printf("%-4u %7" PRIs " %p %s\n", i,
-			    breakpoints[i].counter, breakpoints[i].address,
+			printf("%-4u %7zu %p %s\n", i,
+			    breakpoints[i].counter, (void *) breakpoints[i].address,
 			    symbol);
 #endif
 			
 #ifdef __64_BITS__
-			printf("%-4u %7" PRIs " %p %s\n", i,
-			    breakpoints[i].counter, breakpoints[i].address,
+			printf("%-4u %7zu %p %s\n", i,
+			    breakpoints[i].counter, (void *) breakpoints[i].address,
 			    symbol);
 #endif
@@ -405,7 +405,8 @@
 		flags = BKPOINT_WRITE;
 	
-	printf("Adding breakpoint on address: %p\n", argv->intval);
-	
-	int id = breakpoint_add((void *)argv->intval, flags, -1);
+	printf("Adding breakpoint on address: %p\n",
+	    (void *) argv->intval);
+	
+	int id = breakpoint_add((void *) argv->intval, flags, -1);
 	if (id < 0)
 		printf("Add breakpoint failed.\n");
Index: kernel/arch/amd64/src/interrupt.c
===================================================================
--- kernel/arch/amd64/src/interrupt.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/amd64/src/interrupt.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -65,18 +65,28 @@
 void istate_decode(istate_t *istate)
 {
-	printf("cs =%p\trip=%p\trfl=%p\terr=%p\n",
-	    istate->cs, istate->rip, istate->rflags, istate->error_word);
-
+	printf("cs =%#0" PRIx64 "\trip=%p\t"
+	    "rfl=%#0" PRIx64 "\terr=%#0" PRIx64 "\n",
+	    istate->cs, (void *) istate->rip,
+	    istate->rflags, istate->error_word);
+	
 	if (istate_from_uspace(istate))
-		printf("ss =%p\n", istate->ss);
-	
-	printf("rax=%p\trbx=%p\trcx=%p\trdx=%p\n",
+		printf("ss =%#0" PRIx64 "\n", istate->ss);
+	
+	printf("rax=%#0" PRIx64 "\trbx=%#0" PRIx64 "\t"
+	    "rcx=%#0" PRIx64 "\trdx=%#0" PRIx64 "\n",
 	    istate->rax, istate->rbx, istate->rcx, istate->rdx);
+	
 	printf("rsi=%p\trdi=%p\trbp=%p\trsp=%p\n",
-	    istate->rsi, istate->rdi, istate->rbp,
-	    istate_from_uspace(istate) ? istate->rsp : (uintptr_t)&istate->rsp);
-	printf("r8 =%p\tr9 =%p\tr10=%p\tr11=%p\n",
+	    (void *) istate->rsi, (void *) istate->rdi,
+	    (void *) istate->rbp,
+	    istate_from_uspace(istate) ? ((void *) istate->rsp) :
+	    &istate->rsp);
+	
+	printf("r8 =%#0" PRIx64 "\tr9 =%#0" PRIx64 "\t"
+	    "r10=%#0" PRIx64 "\tr11=%#0" PRIx64 "\n",
 	    istate->r8, istate->r9, istate->r10, istate->r11);
-	printf("r12=%p\tr13=%p\tr14=%p\tr15=%p\n",
+	
+	printf("r12=%#0" PRIx64 "\tr13=%#0" PRIx64 "\t"
+	    "r14=%#0" PRIx64 "\tr15=%#0" PRIx64 "\n",
 	    istate->r12, istate->r13, istate->r14, istate->r15);
 }
Index: kernel/arch/amd64/src/mm/page.c
===================================================================
--- kernel/arch/amd64/src/mm/page.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/amd64/src/mm/page.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -89,5 +89,5 @@
 	
 	if (as_page_fault(page, access, istate) == AS_PF_FAULT) {
-		fault_if_from_uspace(istate, "Page fault: %#x.", page);
+		fault_if_from_uspace(istate, "Page fault: %p.", (void *) page);
 		panic_memtrap(istate, access, page, NULL);
 	}
@@ -97,6 +97,6 @@
 {
 	if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
-		panic("Unable to map physical memory %p (%" PRIs " bytes).", physaddr,
-		    size);
+		panic("Unable to map physical memory %p (%zu bytes).",
+		    (void *) physaddr, size);
 	
 	uintptr_t virtaddr = PA2KA(last_frame);
Index: kernel/arch/arm32/src/exception.c
===================================================================
--- kernel/arch/arm32/src/exception.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/arm32/src/exception.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -175,12 +175,17 @@
 void istate_decode(istate_t *istate)
 {
-	printf("r0 =%#0.8lx\tr1 =%#0.8lx\tr2 =%#0.8lx\tr3 =%#0.8lx\n",
+	printf("r0 =%#0" PRIx32 "\tr1 =%#0" PRIx32 "\t"
+	    "r2 =%#0" PRIx32 "\tr3 =%#0" PRIx32 "\n",
 	    istate->r0, istate->r1, istate->r2, istate->r3);
-	printf("r4 =%#0.8lx\tr5 =%#0.8lx\tr6 =%#0.8lx\tr7 =%#0.8lx\n",
+	printf("r4 =%#" PRIx32 "\tr5 =%#0" PRIx32 "\t"
+	    "r6 =%#0" PRIx32 "\tr7 =%#0" PRIx32 "\n",
 	    istate->r4, istate->r5, istate->r6, istate->r7);
-	printf("r8 =%#0.8lx\tr9 =%#0.8lx\tr10=%#0.8lx\tfp =%#0.8lx\n",
-	    istate->r8, istate->r9, istate->r10, istate->fp);
-	printf("r12=%#0.8lx\tsp =%#0.8lx\tlr =%#0.8lx\tspsr=%#0.8lx\n",
-	    istate->r12, istate->sp, istate->lr, istate->spsr);
+	printf("r8 =%#0" PRIx32 "\tr9 =%#0" PRIx32 "\t"
+	    "r10=%#0" PRIx32 "\tfp =%p\n",
+	    istate->r8, istate->r9, istate->r10,
+	    (void *) istate->fp);
+	printf("r12=%#0" PRIx32 "\tsp =%p\tlr =%p\tspsr=%p\n",
+	    istate->r12, (void *) istate->sp,
+	    (void *) istate->lr, (void *) istate->spsr);
 }
 
Index: kernel/arch/arm32/src/mm/page.c
===================================================================
--- kernel/arch/arm32/src/mm/page.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/arm32/src/mm/page.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -93,5 +93,5 @@
 	    KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH)) {
 		panic("Unable to map physical memory %p (%d bytes).",
-		    physaddr, size);
+		    (void *) physaddr, size);
 	}
 	
Index: kernel/arch/arm32/src/mm/page_fault.c
===================================================================
--- kernel/arch/arm32/src/mm/page_fault.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/arm32/src/mm/page_fault.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -141,5 +141,6 @@
 	if (instr.condition == 0xf) {
 		panic("page_fault - instruction does not access memory "
-		    "(instr_code: %x, badvaddr:%x).", instr, badvaddr);
+		    "(instr_code: %#0" PRIx32 ", badvaddr:%p).",
+		    instr_union.pc, (void *) badvaddr);
 		return PF_ACCESS_EXEC;
 	}
@@ -160,5 +161,6 @@
 
 	panic("page_fault - instruction doesn't access memory "
-	    "(instr_code: %x, badvaddr:%x).", instr, badvaddr);
+	    "(instr_code: %#0" PRIx32 ", badvaddr:%p).",
+	    instr_union.pc, (void *) badvaddr);
 
 	return PF_ACCESS_EXEC;
Index: kernel/arch/ia32/src/interrupt.c
===================================================================
--- kernel/arch/ia32/src/interrupt.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/ia32/src/interrupt.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -65,17 +65,25 @@
 void istate_decode(istate_t *istate)
 {
-	printf("cs =%p\teip=%p\tefl=%p\terr=%p\n",
-	    istate->cs, istate->eip, istate->eflags, istate->error_word);
-
-	printf("ds =%p\tes =%p\tfs =%p\tgs =%p\n",
+	printf("cs =%#0" PRIx32 "\teip=%p\t"
+	    "efl=%#0" PRIx32 "\terr=%#0" PRIx32 "\n",
+	    istate->cs, (void *) istate->eip,
+	    istate->eflags, istate->error_word);
+	
+	printf("ds =%#0" PRIx32 "\tes =%#0" PRIx32 "\t"
+	    "fs =%#0" PRIx32 "\tgs =%#0" PRIx32 "\n",
 	    istate->ds, istate->es, istate->fs, istate->gs);
+	
 	if (istate_from_uspace(istate))
-		printf("ss =%p\n", istate->ss);
-
-	printf("eax=%p\tebx=%p\tecx=%p\tedx=%p\n",
+		printf("ss =%#0" PRIx32 "\n", istate->ss);
+	
+	printf("eax=%#0" PRIx32 "\tebx=%#0" PRIx32 "\t"
+	    "ecx=%#0" PRIx32 "\tedx=%#0" PRIx32 "\n",
 	    istate->eax, istate->ebx, istate->ecx, istate->edx);
+	
 	printf("esi=%p\tedi=%p\tebp=%p\tesp=%p\n",
-	    istate->esi, istate->edi, istate->ebp,
-	    istate_from_uspace(istate) ? istate->esp : (uintptr_t)&istate->esp);
+	    (void *) istate->esi, (void *) istate->edi,
+	    (void *) istate->ebp,
+	    istate_from_uspace(istate) ? ((void *) istate->esp) :
+	    &istate->esp);
 }
 
@@ -139,7 +147,7 @@
 	);
 	
-	fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR=%#0.8x.",
-	    (unative_t) mxcsr);
-	panic_badtrap(istate, n, "SIMD FP exception, MXCSR=%#0.8x");
+	fault_if_from_uspace(istate, "SIMD FP exception(19), MXCSR=%#0" PRIx32 ".",
+	    mxcsr);
+	panic_badtrap(istate, n, "SIMD FP exception");
 }
 
Index: kernel/arch/ia32/src/mm/page.c
===================================================================
--- kernel/arch/ia32/src/mm/page.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/ia32/src/mm/page.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -82,5 +82,6 @@
 {
 	if (last_frame + ALIGN_UP(size, PAGE_SIZE) > KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
-		panic("Unable to map physical memory %p (%d bytes).", physaddr, size);
+		panic("Unable to map physical memory %p (%zu bytes).",
+		    (void *) physaddr, size);
 	
 	uintptr_t virtaddr = PA2KA(last_frame);
Index: kernel/arch/ia32/src/smp/apic.c
===================================================================
--- kernel/arch/ia32/src/smp/apic.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/ia32/src/smp/apic.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -477,5 +477,5 @@
 {
 #ifdef LAPIC_VERBOSE
-	printf("LVT on cpu%" PRIs ", LAPIC ID: %" PRIu8 "\n",
+	printf("LVT on cpu%u, LAPIC ID: %" PRIu8 "\n",
 	    CPU->id, l_apic_id());
 	
Index: kernel/arch/ia64/src/interrupt.c
===================================================================
--- kernel/arch/ia64/src/interrupt.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/ia64/src/interrupt.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -135,18 +135,19 @@
 void istate_decode(istate_t *istate)
 {
-	printf("ar.bsp=%p\tar.bspstore=%p\n", istate->ar_bsp,
-	    istate->ar_bspstore);
-	printf("ar.rnat=%#018llx\tar.rsc=%#018llx\n", istate->ar_rnat,
-	    istate->ar_rsc);
-	printf("ar.ifs=%#018llx\tar.pfs=%#018llx\n", istate->ar_ifs,
-	    istate->ar_pfs);
-	printf("cr.isr=%#018llx\tcr.ipsr=%#018llx\t\n", istate->cr_isr.value,
-	    istate->cr_ipsr);
-	
-	printf("cr.iip=%#018llx, #%d\t(%s)\n", istate->cr_iip, istate->cr_isr.ei,
+	printf("ar.bsp=%p\tar.bspstore=%p\n",
+	    (void *) istate->ar_bsp, (void *) istate->ar_bspstore);
+	printf("ar.rnat=%#0" PRIx64 "\tar.rsc=%#0" PRIx64 "\n",
+	    istate->ar_rnat, istate->ar_rsc);
+	printf("ar.ifs=%#0" PRIx64 "\tar.pfs=%#0" PRIx64 "\n",
+	    istate->ar_ifs, istate->ar_pfs);
+	printf("cr.isr=%#0" PRIx64 "\tcr.ipsr=%#0" PRIx64 "\n",
+	    istate->cr_isr.value, istate->cr_ipsr.value);
+	
+	printf("cr.iip=%#0" PRIx64 ", #%u\t(%s)\n",
+	    istate->cr_iip, istate->cr_isr.ei,
 	    symtab_fmt_name_lookup(istate->cr_iip));
-	printf("cr.iipa=%#018llx\t(%s)\n", istate->cr_iipa,
+	printf("cr.iipa=%#0" PRIx64 "\t(%s)\n", istate->cr_iipa,
 	    symtab_fmt_name_lookup(istate->cr_iipa));
-	printf("cr.ifa=%#018llx\t(%s)\n", istate->cr_ifa,
+	printf("cr.ifa=%#0" PRIx64 "\t(%s)\n", istate->cr_ifa,
 	    symtab_fmt_name_lookup(istate->cr_ifa));
 }
Index: kernel/arch/ia64/src/mm/tlb.c
===================================================================
--- kernel/arch/ia64/src/mm/tlb.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/ia64/src/mm/tlb.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -499,5 +499,6 @@
 		page_table_unlock(AS, true);
 		if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) {
-			fault_if_from_uspace(istate, "Page fault at %p.", va);
+			fault_if_from_uspace(istate, "Page fault at %p.",
+			    (void *) va);
 			panic_memtrap(istate, PF_ACCESS_EXEC, va, NULL);
 		}
@@ -556,5 +557,5 @@
 			} else {
 				fault_if_from_uspace(istate,
-				    "IO access fault at %p.", va);
+				    "IO access fault at %p.", (void *) va);
 			}
 		}
@@ -620,5 +621,6 @@
 		 */
 		if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
-			fault_if_from_uspace(istate, "Page fault at %p.", va);
+			fault_if_from_uspace(istate, "Page fault at %p.",
+			    (void *) va);
 			panic_memtrap(istate, PF_ACCESS_UNKNOWN, va, NULL);
 		}
@@ -668,5 +670,6 @@
 	} else {
 		if (as_page_fault(va, PF_ACCESS_WRITE, istate) == AS_PF_FAULT) {
-			fault_if_from_uspace(istate, "Page fault at %p.", va);
+			fault_if_from_uspace(istate, "Page fault at %p.",
+			    (void *) va);
 			panic_memtrap(istate, PF_ACCESS_WRITE, va, NULL);
 		}
@@ -704,5 +707,6 @@
 	} else {
 		if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) {
-			fault_if_from_uspace(istate, "Page fault at %p.", va);
+			fault_if_from_uspace(istate, "Page fault at %p.",
+			    (void *) va);
 			panic_memtrap(istate, PF_ACCESS_EXEC, va, NULL);
 		}
@@ -740,5 +744,6 @@
 	} else {
 		if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
-			fault_if_from_uspace(istate, "Page fault at %p.", va);
+			fault_if_from_uspace(istate, "Page fault at %p.",
+			    (void *) va);
 			panic_memtrap(istate, PF_ACCESS_UNKNOWN, va, NULL);
 		}
@@ -772,5 +777,6 @@
 	ASSERT(!t->w);
 	if (as_page_fault(va, PF_ACCESS_WRITE, istate) == AS_PF_FAULT) {
-		fault_if_from_uspace(istate, "Page fault at %p.", va);
+		fault_if_from_uspace(istate, "Page fault at %p.",
+		    (void *) va);
 		panic_memtrap(istate, PF_ACCESS_WRITE, va, NULL);
 	}
@@ -812,5 +818,6 @@
 		page_table_unlock(AS, true);
 		if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) {
-			fault_if_from_uspace(istate, "Page fault at %p.", va);
+			fault_if_from_uspace(istate, "Page fault at %p.",
+			    (void *) va);
 			panic_memtrap(istate, PF_ACCESS_UNKNOWN, va, NULL);
 		}
Index: kernel/arch/mips32/src/cache.c
===================================================================
--- kernel/arch/mips32/src/cache.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/mips32/src/cache.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -39,5 +39,5 @@
 void cache_error(istate_t *istate)
 {
-	panic("cache_error exception (epc=%p).", istate->epc);
+	panic("cache_error exception (epc=%p).", (void *) istate->epc);
 }
 
Index: kernel/arch/mips32/src/debugger.c
===================================================================
--- kernel/arch/mips32/src/debugger.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/mips32/src/debugger.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -191,5 +191,5 @@
 	}
 	
-	printf("Adding breakpoint on address %p\n", argv->intval);
+	printf("Adding breakpoint on address %p\n", (void *) argv->intval);
 	
 	cur->address = (uintptr_t) argv->intval;
@@ -267,6 +267,6 @@
 			    breakpoints[i].address);
 			
-			printf("%-4u %7" PRIs " %p %-8s %-9s %-10s %s\n", i,
-			    breakpoints[i].counter, breakpoints[i].address,
+			printf("%-4u %7zu %p %-8s %-9s %-10s %s\n", i,
+			    breakpoints[i].counter, (void *) breakpoints[i].address,
 			    ((breakpoints[i].flags & BKPOINT_INPROG) ? "true" :
 			    "false"), ((breakpoints[i].flags & BKPOINT_ONESHOT)
@@ -366,5 +366,6 @@
 		
 		if (!(cur->flags & BKPOINT_FUNCCALL)) {
-			printf("***Breakpoint %u: %p in %s.\n", i, fireaddr,
+			printf("***Breakpoint %u: %p in %s.\n", i,
+			    (void *) fireaddr,
 			    symtab_fmt_name_lookup(fireaddr));
 		}
@@ -381,5 +382,6 @@
 		cur->flags |= BKPOINT_INPROG;
 	} else {
-		printf("***Breakpoint %d: %p in %s.\n", i, fireaddr,
+		printf("***Breakpoint %d: %p in %s.\n", i,
+		    (void *) fireaddr,
 		    symtab_fmt_name_lookup(fireaddr));
 		
Index: kernel/arch/mips32/src/exception.c
===================================================================
--- kernel/arch/mips32/src/exception.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/mips32/src/exception.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -74,22 +74,40 @@
 void istate_decode(istate_t *istate)
 {
-	printf("epc=%p\tsta=%p\tlo =%p\thi =%p\n",
-	    istate->epc, istate->status, istate->lo, istate->hi);
-	printf("a0 =%p\ta1 =%p\ta2 =%p\ta3 =%p\n",
+	printf("epc=%p\tsta=%#0" PRIx32 "\t"
+	    "lo =%#0" PRIx32 "\thi =%#0" PRIx32 "\n",
+	    (void *) istate->epc, istate->status,
+	    istate->lo, istate->hi);
+	
+	printf("a0 =%#0" PRIx32 "\ta1 =%#0" PRIx32 "\t"
+	    "a2 =%#0" PRIx32 "\ta3 =%#0" PRIx32 "\n",
 	    istate->a0, istate->a1, istate->a2, istate->a3);
-	printf("t0 =%p\tt1 =%p\tt2 =%p\tt3 =%p\n",
+	
+	printf("t0 =%#0" PRIx32 "\tt1 =%#0" PRIx32 "\t"
+	    "t2 =%#0" PRIx32 "\tt3 =%#0" PRIx32 "\n",
 	    istate->t0, istate->t1, istate->t2, istate->t3);
-	printf("t4 =%p\tt5 =%p\tt6 =%p\tt7 =%p\n",
+	
+	printf("t4 =%#0" PRIx32 "\tt5 =%#0" PRIx32 "\t"
+	    "t6 =%#0" PRIx32 "\tt7 =%#0" PRIx32 "\n",
 	    istate->t4, istate->t5, istate->t6, istate->t7);
-	printf("t8 =%p\tt9 =%p\tv0 =%p\tv1 =%p\n",
+	
+	printf("t8 =%#0" PRIx32 "\tt9 =%#0" PRIx32 "\t"
+	    "v0 =%#0" PRIx32 "\tv1 =%#0" PRIx32 "\n",
 	    istate->t8, istate->t9, istate->v0, istate->v1);
-	printf("s0 =%p\ts1 =%p\ts2 =%p\ts3 =%p\n",
+	
+	printf("s0 =%#0" PRIx32 "\ts1 =%#0" PRIx32 "\t"
+	    "s2 =%#0" PRIx32 "\ts3 =%#0" PRIx32 "\n",
 	    istate->s0, istate->s1, istate->s2, istate->s3);
-	printf("s4 =%p\ts5 =%p\ts6 =%p\ts7 =%p\n",
+	
+	printf("s4 =%#0" PRIx32 "\ts5 =%#0" PRIx32 "\t"
+	    "s6 =%#0" PRIx32 "\ts7 =%#0" PRIx32 "\n",
 	    istate->s4, istate->s5, istate->s6, istate->s7);
-	printf("s8 =%p\tat =%p\tkt0=%p\tkt1=%p\n",
+	
+	printf("s8 =%#0" PRIx32 "\tat =%#0" PRIx32 "\t"
+	    "kt0=%#0" PRIx32 "\tkt1=%#0" PRIx32 "\n",
 	    istate->s8, istate->at, istate->kt0, istate->kt1);
+	
 	printf("sp =%p\tra =%p\tgp =%p\n",
-	    istate->sp, istate->ra, istate->gp);
+	    (void *) istate->sp, (void *) istate->ra,
+	    (void *) istate->gp);
 }
 
Index: kernel/arch/mips32/src/mm/tlb.c
===================================================================
--- kernel/arch/mips32/src/mm/tlb.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/mips32/src/mm/tlb.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -323,5 +323,6 @@
 	uintptr_t va = cp0_badvaddr_read();
 	
-	fault_if_from_uspace(istate, "TLB Refill Exception on %p.", va);
+	fault_if_from_uspace(istate, "TLB Refill Exception on %p.",
+	    (void *) va);
 	panic_memtrap(istate, PF_ACCESS_UNKNOWN, va, "TLB Refill Exception.");
 }
@@ -332,5 +333,6 @@
 	uintptr_t va = cp0_badvaddr_read();
 	
-	fault_if_from_uspace(istate, "TLB Invalid Exception on %p.", va);
+	fault_if_from_uspace(istate, "TLB Invalid Exception on %p.",
+	    (void *) va);
 	panic_memtrap(istate, PF_ACCESS_UNKNOWN, va, "TLB Invalid Exception.");
 }
@@ -340,5 +342,6 @@
 	uintptr_t va = cp0_badvaddr_read();
 	
-	fault_if_from_uspace(istate, "TLB Modified Exception on %p.", va);
+	fault_if_from_uspace(istate, "TLB Modified Exception on %p.",
+	    (void *) va);
 	panic_memtrap(istate, PF_ACCESS_WRITE, va, "TLB Modified Exception.");
 }
Index: kernel/arch/ppc32/src/cpu/cpu.c
===================================================================
--- kernel/arch/ppc32/src/cpu/cpu.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/ppc32/src/cpu/cpu.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -68,5 +68,5 @@
 	}
 	
-	printf("cpu%" PRIs ": version=%" PRIu16" (%s), revision=%" PRIu16 "\n", cpu->id,
+	printf("cpu%u: version=%" PRIu16" (%s), revision=%" PRIu16 "\n", cpu->id,
 	    cpu->arch.version, name, cpu->arch.revision);
 }
Index: kernel/arch/ppc32/src/interrupt.c
===================================================================
--- kernel/arch/ppc32/src/interrupt.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/ppc32/src/interrupt.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -54,26 +54,44 @@
 void istate_decode(istate_t *istate)
 {
-	printf("r0 =%p\tr1 =%p\tr2 =%p\n", istate->r0, istate->sp, istate->r2);
-	printf("r3 =%p\tr4 =%p\tr5 =%p\n", istate->r3, istate->r4, istate->r5);
-	printf("r6 =%p\tr7 =%p\tr8 =%p\n", istate->r6, istate->r7, istate->r8);
-	printf("r9 =%p\tr10=%p\tr11=%p\n",
+	printf("r0 =%#0" PRIx32 "\tr1 =%p\tr2 =%#0" PRIx32 "\n",
+	    istate->r0, (void *) istate->sp, istate->r2);
+	
+	printf("r3 =%#0" PRIx32 "\tr4 =%#0" PRIx32 "\tr5 =%#0" PRIx32 "\n",
+	    istate->r3, istate->r4, istate->r5);
+	
+	printf("r6 =%#0" PRIx32 "\tr7 =%#0" PRIx32 "\tr8 =%#0" PRIx32 "\n",
+	    istate->r6, istate->r7, istate->r8);
+	
+	printf("r9 =%#0" PRIx32 "\tr10=%#0" PRIx32 "\tr11=%#0" PRIx32 "\n",
 	    istate->r9, istate->r10, istate->r11);
-	printf("r12=%p\tr13=%p\tr14=%p\n",
+	
+	printf("r12=%#0" PRIx32 "\tr13=%#0" PRIx32 "\tr14=%#0" PRIx32 "\n",
 	    istate->r12, istate->r13, istate->r14);
-	printf("r15=%p\tr16=%p\tr17=%p\n",
+	
+	printf("r15=%#0" PRIx32 "\tr16=%#0" PRIx32 "\tr17=%#0" PRIx32 "\n",
 	    istate->r15, istate->r16, istate->r17);
-	printf("r18=%p\tr19=%p\tr20=%p\n",
+	
+	printf("r18=%#0" PRIx32 "\tr19=%#0" PRIx32 "\tr20=%#0" PRIx32 "\n",
 	    istate->r18, istate->r19, istate->r20);
-	printf("r21=%p\tr22=%p\tr23=%p\n",
+	
+	printf("r21=%#0" PRIx32 "\tr22=%#0" PRIx32 "\tr23=%#0" PRIx32 "\n",
 	    istate->r21, istate->r22, istate->r23);
-	printf("r24=%p\tr25=%p\tr26=%p\n",
+	
+	printf("r24=%#0" PRIx32 "\tr25=%#0" PRIx32 "\tr26=%#0" PRIx32 "\n",
 	    istate->r24, istate->r25, istate->r26);
-	printf("r27=%p\tr28=%p\tr29=%p\n",
+	
+	printf("r27=%#0" PRIx32 "\tr28=%#0" PRIx32 "\tr29=%#0" PRIx32 "\n",
 	    istate->r27, istate->r28, istate->r29);
-	printf("r30=%p\tr31=%p\n", istate->r30, istate->r31);
-	printf("cr =%p\tpc =%p\tlr =%p\n", istate->cr, istate->pc, istate->lr);
-	printf("ctr=%p\txer=%p\tdar=%p\n",
+	
+	printf("r30=%#0" PRIx32 "\tr31=%#0" PRIx32 "\n",
+	    istate->r30, istate->r31);
+	
+	printf("cr =%#0" PRIx32 "\tpc =%p\tlr =%p\n",
+	    istate->cr, (void *) istate->pc, (void *) istate->lr);
+	
+	printf("ctr=%#0" PRIx32 "\txer=%#0" PRIx32 "\tdar=%#0" PRIx32 "\n",
 	    istate->ctr, istate->xer, istate->dar);
-	printf("srr1=%p\n", istate->srr1);
+	
+	printf("srr1=%p\n", (void *) istate->srr1);
 }
 
@@ -111,5 +129,5 @@
 			 */
 #ifdef CONFIG_DEBUG
-			printf("cpu%" PRIs ": spurious interrupt (inum=%" PRIu8 ")\n",
+			printf("cpu%u: spurious interrupt (inum=%" PRIu8 ")\n",
 			    CPU->id, inum);
 #endif
Index: kernel/arch/ppc32/src/mm/frame.c
===================================================================
--- kernel/arch/ppc32/src/mm/frame.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/ppc32/src/mm/frame.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -49,5 +49,5 @@
 	size_t i;
 	for (i = 0; i < memmap.cnt; i++) {
-		printf("%#10x %#10x\n", memmap.zones[i].start,
+		printf("%p %#0zx\n", memmap.zones[i].start,
 		    memmap.zones[i].size);
 	}
Index: kernel/arch/ppc32/src/mm/page.c
===================================================================
--- kernel/arch/ppc32/src/mm/page.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/ppc32/src/mm/page.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -49,6 +49,6 @@
 	if (last_frame + ALIGN_UP(size, PAGE_SIZE) >
 	    KA2PA(KERNEL_ADDRESS_SPACE_END_ARCH))
-		panic("Unable to map physical memory %p (%" PRIs " bytes).",
-		    physaddr, size);
+		panic("Unable to map physical memory %p (%zu bytes).",
+		    (void *) physaddr, size);
 	
 	uintptr_t virtaddr = PA2KA(last_frame);
Index: kernel/arch/ppc32/src/mm/tlb.c
===================================================================
--- kernel/arch/ppc32/src/mm/tlb.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/ppc32/src/mm/tlb.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -111,5 +111,6 @@
 static void pht_refill_fail(uintptr_t badvaddr, istate_t *istate)
 {
-	fault_if_from_uspace(istate, "PHT Refill Exception on %p.", badvaddr);
+	fault_if_from_uspace(istate, "PHT Refill Exception on %p.",
+	    (void *) badvaddr);
 	panic_memtrap(istate, PF_ACCESS_UNKNOWN, badvaddr,
 	    "PHT Refill Exception.");
@@ -459,11 +460,11 @@
 		length = 0; \
 	\
-	printf(name ": page=%.*p frame=%.*p length=%d KB (mask=%#x)%s%s\n", \
-	    sizeof(upper) * 2, upper & 0xffff0000, sizeof(lower) * 2, \
-	    lower & 0xffff0000, length, mask, \
+	printf(name ": page=%#0" PRIx32 " frame=%#0" PRIx32 \
+	    " length=%#0" PRIx32 " KB (mask=%#0" PRIx32 ")%s%s\n", \
+	    upper & UINT32_C(0xffff0000), lower & UINT32_C(0xffff0000), \
+	    length, mask, \
 	    ((upper >> 1) & 1) ? " supervisor" : "", \
 	    (upper & 1) ? " user" : "");
 
-
 void tlb_print(void)
 {
@@ -473,6 +474,7 @@
 		uint32_t vsid = sr_get(sr << 28);
 		
-		printf("sr[%02u]: vsid=%.*p (asid=%u)%s%s\n", sr,
-		    sizeof(vsid) * 2, vsid & 0xffffff, (vsid & 0xffffff) >> 4,
+		printf("sr[%02" PRIu32 "]: vsid=%#0" PRIx32 " (asid=%" PRIu32 ")"
+		    "%s%s\n", sr, vsid & UINT32_C(0x00ffffff),
+		    (vsid & UINT32_C(0x00ffffff)) >> 4,
 		    ((vsid >> 30) & 1) ? " supervisor" : "",
 		    ((vsid >> 29) & 1) ? " user" : "");
Index: kernel/arch/sparc64/src/console.c
===================================================================
--- kernel/arch/sparc64/src/console.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/sparc64/src/console.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -70,5 +70,5 @@
 	ofw_tree_node_t *screen = ofw_tree_lookup(prop_scr->value);
 	if (!screen)
-		panic("Cannot find %s.", prop_scr->value);
+		panic("Cannot find %s.", (char *) prop_scr->value);
 	
 	scr_init(screen);
@@ -83,5 +83,5 @@
 	ofw_tree_node_t *keyboard = ofw_tree_lookup(prop_kbd->value);
 	if (!keyboard)
-		panic("Cannot find %s.", prop_kbd->value);
+		panic("Cannot find %s.", (char *) prop_kbd->value);
 	
 	kbd_init(keyboard);
Index: kernel/arch/sparc64/src/drivers/pci.c
===================================================================
--- kernel/arch/sparc64/src/drivers/pci.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/sparc64/src/drivers/pci.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -211,5 +211,6 @@
 		 * Unsupported model.
 		 */
-		printf("Unsupported PCI controller model (%s).\n", prop->value);
+		printf("Unsupported PCI controller model (%s).\n",
+		    (char *) prop->value);
 	}
 
Index: kernel/arch/sparc64/src/mm/sun4u/tlb.c
===================================================================
--- kernel/arch/sparc64/src/mm/sun4u/tlb.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/sparc64/src/mm/sun4u/tlb.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -360,7 +360,7 @@
 static void print_tlb_entry(int i, tlb_tag_read_reg_t t, tlb_data_t d)
 {
-	printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, "
-	    "ie=%d, soft2=%#x, pfn=%#x, soft=%#x, l=%d, "
-	    "cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn,
+	printf("%u: vpn=%#" PRIx64 ", context=%u, v=%u, size=%u, nfo=%u, "
+	    "ie=%u, soft2=%#x, pfn=%#x, soft=%#x, l=%u, "
+	    "cp=%u, cv=%u, e=%u, p=%u, w=%u, g=%u\n", i, (uint64_t) t.vpn,
 	    t.context, d.v, d.size, d.nfo, d.ie, d.soft2,
 	    d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g);
@@ -441,5 +441,5 @@
     uintptr_t va, const char *str)
 {
-	fault_if_from_uspace(istate, "%s, Address=%p.", str, va);
+	fault_if_from_uspace(istate, "%s, address=%p.", str, (void *) va);
 	panic_memtrap(istate, PF_ACCESS_EXEC, va, str);
 }
@@ -451,6 +451,6 @@
 
 	va = tag.vpn << MMU_PAGE_WIDTH;
-	fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d).", str, va,
-	    tag.context);
+	fault_if_from_uspace(istate, "%s, page=%p (asid=%u).", str,
+	    (void *) va, tag.context);
 	panic_memtrap(istate, PF_ACCESS_UNKNOWN, va, str);
 }
@@ -462,6 +462,6 @@
 
 	va = tag.vpn << MMU_PAGE_WIDTH;
-	fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d).", str, va,
-	    tag.context);
+	fault_if_from_uspace(istate, "%s, page=%p (asid=%u).", str,
+	    (void *) va, tag.context);
 	panic_memtrap(istate, PF_ACCESS_WRITE, va, str);
 }
@@ -484,6 +484,6 @@
 	    sfsr.e, sfsr.ct, sfsr.pr, sfsr.w, sfsr.ow, sfsr.fv);
 #endif
-	    
-	printf("DTLB SFAR: address=%p\n", sfar);
+	
+	printf("DTLB SFAR: address=%p\n", (void *) sfar);
 	
 	dtlb_sfsr_write(0);
@@ -508,5 +508,5 @@
 #endif
 	    
-	printf("DTLB SFAR: address=%p\n", sfar);
+	printf("DTLB SFAR: address=%p\n", (void *) sfar);
 	
 	dtlb_sfsr_write(0);
Index: kernel/arch/sparc64/src/mm/sun4v/tlb.c
===================================================================
--- kernel/arch/sparc64/src/mm/sun4v/tlb.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/sparc64/src/mm/sun4v/tlb.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -358,5 +358,6 @@
     const char *str)
 {
-	fault_if_from_uspace(istate, "%s, Address=%p.", str, va);
+	fault_if_from_uspace(istate, "%s, address=%p.", str,
+	    (void *) va);
 	panic_memtrap(istate, PF_ACCESS_EXEC, va, str);
 }
@@ -365,6 +366,6 @@
     uint64_t page_and_ctx, const char *str)
 {
-	fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d).", str,
-	    DMISS_ADDRESS(page_and_ctx), DMISS_CONTEXT(page_and_ctx));
+	fault_if_from_uspace(istate, "%s, page=%p (asid=%" PRId64 ").", str,
+	    (void *) DMISS_ADDRESS(page_and_ctx), DMISS_CONTEXT(page_and_ctx));
 	panic_memtrap(istate, PF_ACCESS_UNKNOWN, DMISS_ADDRESS(page_and_ctx),
 	    str);
@@ -374,6 +375,6 @@
     uint64_t page_and_ctx, const char *str)
 {
-	fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d).", str,
-	    DMISS_ADDRESS(page_and_ctx), DMISS_CONTEXT(page_and_ctx));
+	fault_if_from_uspace(istate, "%s, page=%p (asid=%" PRId64 ").", str,
+	    (void *) DMISS_ADDRESS(page_and_ctx), DMISS_CONTEXT(page_and_ctx));
 	panic_memtrap(istate, PF_ACCESS_WRITE, DMISS_ADDRESS(page_and_ctx),
 	    str);
@@ -399,7 +400,6 @@
 	uint64_t errno =  __hypercall_fast3(MMU_DEMAP_ALL, 0, 0,
 		MMU_FLAG_DTLB | MMU_FLAG_ITLB);
-	if (errno != HV_EOK) {
-		panic("Error code = %d.\n", errno);
-	}
+	if (errno != HV_EOK)
+		panic("Error code = %" PRIu64 ".\n", errno);
 }
 
Index: kernel/arch/sparc64/src/sun4v/md.c
===================================================================
--- kernel/arch/sparc64/src/sun4v/md.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/sparc64/src/sun4v/md.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -310,6 +310,6 @@
 	retval = retval;
 	if (retval != HV_EOK) {
-		printf("Could not retrieve machine description, error = %d.\n",
-		    retval);
+		printf("Could not retrieve machine description, "
+		    "error=%" PRIu64 ".\n", retval);
 	}
 }
Index: kernel/arch/sparc64/src/trap/sun4v/interrupt.c
===================================================================
--- kernel/arch/sparc64/src/trap/sun4v/interrupt.c	(revision 5587cf734004dfd2d781ebd8e5af563d93e1bf23)
+++ kernel/arch/sparc64/src/trap/sun4v/interrupt.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -87,5 +87,5 @@
 		KA2PA(cpu_mondo_queues[CPU->id]),
 		CPU_MONDO_NENTRIES) != HV_EOK)
-			panic("Initializing mondo queue failed on CPU %d.\n",
+			panic("Initializing mondo queue failed on CPU %" PRIu64 ".\n",
 			    CPU->arch.id);
 }
