Index: kernel/arch/mips32/src/cache.c
===================================================================
--- kernel/arch/mips32/src/cache.c	(revision 0b4a67a31961a80515a7b28d5b2e27fbb8f7249d)
+++ kernel/arch/mips32/src/cache.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -39,5 +39,5 @@
 void cache_error(istate_t *istate)
 {
-	panic("cache_error exception (epc=%p).", istate->epc);
+	panic("cache_error exception (epc=%p).", (void *) istate->epc);
 }
 
Index: kernel/arch/mips32/src/debugger.c
===================================================================
--- kernel/arch/mips32/src/debugger.c	(revision 0b4a67a31961a80515a7b28d5b2e27fbb8f7249d)
+++ kernel/arch/mips32/src/debugger.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -191,5 +191,5 @@
 	}
 	
-	printf("Adding breakpoint on address %p\n", argv->intval);
+	printf("Adding breakpoint on address %p\n", (void *) argv->intval);
 	
 	cur->address = (uintptr_t) argv->intval;
@@ -267,6 +267,6 @@
 			    breakpoints[i].address);
 			
-			printf("%-4u %7" PRIs " %p %-8s %-9s %-10s %s\n", i,
-			    breakpoints[i].counter, breakpoints[i].address,
+			printf("%-4u %7zu %p %-8s %-9s %-10s %s\n", i,
+			    breakpoints[i].counter, (void *) breakpoints[i].address,
 			    ((breakpoints[i].flags & BKPOINT_INPROG) ? "true" :
 			    "false"), ((breakpoints[i].flags & BKPOINT_ONESHOT)
@@ -366,5 +366,6 @@
 		
 		if (!(cur->flags & BKPOINT_FUNCCALL)) {
-			printf("***Breakpoint %u: %p in %s.\n", i, fireaddr,
+			printf("***Breakpoint %u: %p in %s.\n", i,
+			    (void *) fireaddr,
 			    symtab_fmt_name_lookup(fireaddr));
 		}
@@ -381,5 +382,6 @@
 		cur->flags |= BKPOINT_INPROG;
 	} else {
-		printf("***Breakpoint %d: %p in %s.\n", i, fireaddr,
+		printf("***Breakpoint %d: %p in %s.\n", i,
+		    (void *) fireaddr,
 		    symtab_fmt_name_lookup(fireaddr));
 		
Index: kernel/arch/mips32/src/exception.c
===================================================================
--- kernel/arch/mips32/src/exception.c	(revision 0b4a67a31961a80515a7b28d5b2e27fbb8f7249d)
+++ kernel/arch/mips32/src/exception.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -74,22 +74,40 @@
 void istate_decode(istate_t *istate)
 {
-	printf("epc=%p\tsta=%p\tlo =%p\thi =%p\n",
-	    istate->epc, istate->status, istate->lo, istate->hi);
-	printf("a0 =%p\ta1 =%p\ta2 =%p\ta3 =%p\n",
+	printf("epc=%p\tsta=%#0" PRIx32 "\t"
+	    "lo =%#0" PRIx32 "\thi =%#0" PRIx32 "\n",
+	    (void *) istate->epc, istate->status,
+	    istate->lo, istate->hi);
+	
+	printf("a0 =%#0" PRIx32 "\ta1 =%#0" PRIx32 "\t"
+	    "a2 =%#0" PRIx32 "\ta3 =%#0" PRIx32 "\n",
 	    istate->a0, istate->a1, istate->a2, istate->a3);
-	printf("t0 =%p\tt1 =%p\tt2 =%p\tt3 =%p\n",
+	
+	printf("t0 =%#0" PRIx32 "\tt1 =%#0" PRIx32 "\t"
+	    "t2 =%#0" PRIx32 "\tt3 =%#0" PRIx32 "\n",
 	    istate->t0, istate->t1, istate->t2, istate->t3);
-	printf("t4 =%p\tt5 =%p\tt6 =%p\tt7 =%p\n",
+	
+	printf("t4 =%#0" PRIx32 "\tt5 =%#0" PRIx32 "\t"
+	    "t6 =%#0" PRIx32 "\tt7 =%#0" PRIx32 "\n",
 	    istate->t4, istate->t5, istate->t6, istate->t7);
-	printf("t8 =%p\tt9 =%p\tv0 =%p\tv1 =%p\n",
+	
+	printf("t8 =%#0" PRIx32 "\tt9 =%#0" PRIx32 "\t"
+	    "v0 =%#0" PRIx32 "\tv1 =%#0" PRIx32 "\n",
 	    istate->t8, istate->t9, istate->v0, istate->v1);
-	printf("s0 =%p\ts1 =%p\ts2 =%p\ts3 =%p\n",
+	
+	printf("s0 =%#0" PRIx32 "\ts1 =%#0" PRIx32 "\t"
+	    "s2 =%#0" PRIx32 "\ts3 =%#0" PRIx32 "\n",
 	    istate->s0, istate->s1, istate->s2, istate->s3);
-	printf("s4 =%p\ts5 =%p\ts6 =%p\ts7 =%p\n",
+	
+	printf("s4 =%#0" PRIx32 "\ts5 =%#0" PRIx32 "\t"
+	    "s6 =%#0" PRIx32 "\ts7 =%#0" PRIx32 "\n",
 	    istate->s4, istate->s5, istate->s6, istate->s7);
-	printf("s8 =%p\tat =%p\tkt0=%p\tkt1=%p\n",
+	
+	printf("s8 =%#0" PRIx32 "\tat =%#0" PRIx32 "\t"
+	    "kt0=%#0" PRIx32 "\tkt1=%#0" PRIx32 "\n",
 	    istate->s8, istate->at, istate->kt0, istate->kt1);
+	
 	printf("sp =%p\tra =%p\tgp =%p\n",
-	    istate->sp, istate->ra, istate->gp);
+	    (void *) istate->sp, (void *) istate->ra,
+	    (void *) istate->gp);
 }
 
Index: kernel/arch/mips32/src/mm/tlb.c
===================================================================
--- kernel/arch/mips32/src/mm/tlb.c	(revision 0b4a67a31961a80515a7b28d5b2e27fbb8f7249d)
+++ kernel/arch/mips32/src/mm/tlb.c	(revision 7e752b2a0d66c871748e5fa9e8bbe3a27c70a202)
@@ -323,5 +323,6 @@
 	uintptr_t va = cp0_badvaddr_read();
 	
-	fault_if_from_uspace(istate, "TLB Refill Exception on %p.", va);
+	fault_if_from_uspace(istate, "TLB Refill Exception on %p.",
+	    (void *) va);
 	panic_memtrap(istate, PF_ACCESS_UNKNOWN, va, "TLB Refill Exception.");
 }
@@ -332,5 +333,6 @@
 	uintptr_t va = cp0_badvaddr_read();
 	
-	fault_if_from_uspace(istate, "TLB Invalid Exception on %p.", va);
+	fault_if_from_uspace(istate, "TLB Invalid Exception on %p.",
+	    (void *) va);
 	panic_memtrap(istate, PF_ACCESS_UNKNOWN, va, "TLB Invalid Exception.");
 }
@@ -340,5 +342,6 @@
 	uintptr_t va = cp0_badvaddr_read();
 	
-	fault_if_from_uspace(istate, "TLB Modified Exception on %p.", va);
+	fault_if_from_uspace(istate, "TLB Modified Exception on %p.",
+	    (void *) va);
 	panic_memtrap(istate, PF_ACCESS_WRITE, va, "TLB Modified Exception.");
 }