Index: kernel/arch/xen32/include/asm.h
===================================================================
--- kernel/arch/xen32/include/asm.h	(revision 3e5cc686bc184b3b53bb88837ae6a2bdc9ab72ce)
+++ kernel/arch/xen32/include/asm.h	(revision 7d3d641a8c852bac56e8c9ace15cfffbdf4b0173)
@@ -273,13 +273,4 @@
 }
 
-/** Load IDTR register from memory.
- *
- * @param idtr_reg Address of memory from where to load IDTR.
- */
-static inline void idtr_load(ptr_16_32_t *idtr_reg)
-{
-	__asm__ volatile ("lidtl %0\n" : : "m" (*idtr_reg));
-}
-
 /** Load TR from descriptor table.
  *
Index: kernel/arch/xen32/include/boot/boot.h
===================================================================
--- kernel/arch/xen32/include/boot/boot.h	(revision 3e5cc686bc184b3b53bb88837ae6a2bdc9ab72ce)
+++ kernel/arch/xen32/include/boot/boot.h	(revision 7d3d641a8c852bac56e8c9ace15cfffbdf4b0173)
@@ -41,7 +41,8 @@
 
 #define BOOT_OFFSET		0x0000
+#define TEMP_STACK_SIZE 0x1000
+
 #define XEN_VIRT_START	0xFC000000
-
-#define TEMP_STACK_SIZE 0x1000
+#define XEN_CS			0xe019
 
 #ifndef __ASM__
Index: kernel/arch/xen32/include/hypercall.h
===================================================================
--- kernel/arch/xen32/include/hypercall.h	(revision 3e5cc686bc184b3b53bb88837ae6a2bdc9ab72ce)
+++ kernel/arch/xen32/include/hypercall.h	(revision 7d3d641a8c852bac56e8c9ace15cfffbdf4b0173)
@@ -37,5 +37,15 @@
 
 
+typedef struct {
+	uint8_t vector;     /**< Exception vector */
+	uint8_t flags;      /**< 0-3: privilege level; 4: clear event enable */
+	uint16_t cs;        /**< Code selector */
+	uintptr_t address;  /**< Code offset */
+} trap_info_t;
+
+
+#define XEN_SET_TRAP_TABLE		0
 #define XEN_MMU_UPDATE			1
+#define XEN_SET_CALLBACKS		4
 #define XEN_UPDATE_VA_MAPPING	14
 #define XEN_CONSOLE_IO			18
@@ -199,3 +209,13 @@
 }
 
+static inline int xen_set_callbacks(const unsigned int event_selector, const void *event_address, const	unsigned int failsafe_selector, void *failsafe_address)
+{
+	return hypercall4(XEN_SET_CALLBACKS, event_selector, event_address, failsafe_selector, failsafe_address);
+}
+
+static inline int xen_set_trap_table(const trap_info_t *table)
+{
+	return hypercall1(XEN_SET_TRAP_TABLE, table);
+}
+
 #endif
Index: kernel/arch/xen32/include/pm.h
===================================================================
--- kernel/arch/xen32/include/pm.h	(revision 3e5cc686bc184b3b53bb88837ae6a2bdc9ab72ce)
+++ kernel/arch/xen32/include/pm.h	(revision 7d3d641a8c852bac56e8c9ace15cfffbdf4b0173)
@@ -93,13 +93,4 @@
 typedef struct descriptor  descriptor_t;
 
-struct idescriptor {
-	unsigned offset_0_15: 16;
-	unsigned selector: 16;
-	unsigned unused: 8;
-	unsigned access: 8;
-	unsigned offset_16_31: 16;
-} __attribute__ ((packed));
-typedef struct idescriptor idescriptor_t;
-
 struct tss {
 	uint16_t link;
@@ -157,6 +148,5 @@
 extern void gdt_setlimit(descriptor_t *d, uint32_t limit);
 
-extern void idt_init(void);
-extern void idt_setoffset(idescriptor_t *d, uintptr_t offset);
+extern void traps_init(void);
 
 extern void tss_initialize(tss_t *t);
Index: kernel/arch/xen32/src/asm.S
===================================================================
--- kernel/arch/xen32/src/asm.S	(revision 3e5cc686bc184b3b53bb88837ae6a2bdc9ab72ce)
+++ kernel/arch/xen32/src/asm.S	(revision 7d3d641a8c852bac56e8c9ace15cfffbdf4b0173)
@@ -35,4 +35,6 @@
 .text
 
+.global xen_callback
+.global xen_failsafe_callback
 .global enable_l_apic_in_msr
 .global interrupt_handlers
@@ -42,4 +44,11 @@
 .global memcpy_to_uspace
 .global memcpy_to_uspace_failover_address
+
+
+xen_callback:
+	iret
+
+xen_failsafe_callback:
+	iret
 
 
Index: kernel/arch/xen32/src/pm.c
===================================================================
--- kernel/arch/xen32/src/pm.c	(revision 3e5cc686bc184b3b53bb88837ae6a2bdc9ab72ce)
+++ kernel/arch/xen32/src/pm.c	(revision 7d3d641a8c852bac56e8c9ace15cfffbdf4b0173)
@@ -76,5 +76,5 @@
 };
 
-static idescriptor_t idt[IDT_ITEMS];
+static trap_info_t traps[IDT_ITEMS + 1];
 
 static tss_t tss;
@@ -99,13 +99,4 @@
 }
 
-void idt_setoffset(idescriptor_t *d, uintptr_t offset)
-{
-	/*
-	 * Offset is a linear address.
-	 */
-	d->offset_0_15 = offset & 0xffff;
-	d->offset_16_31 = offset >> 16;
-}
-
 void tss_initialize(tss_t *t)
 {
@@ -113,30 +104,25 @@
 }
 
-/*
- * This function takes care of proper setup of IDT and IDTR.
- */
-void idt_init(void)
-{
-	idescriptor_t *d;
-	int i;
-
+void traps_init(void)
+{
+	index_t i;
+	
 	for (i = 0; i < IDT_ITEMS; i++) {
-		d = &idt[i];
-
-		d->unused = 0;
-		d->selector = selector(KTEXT_DES);
-
-		d->access = AR_PRESENT | AR_INTERRUPT;	/* masking interrupt */
-
-		if (i == VECTOR_SYSCALL) {
-			/*
-			 * The syscall interrupt gate must be calleable from userland.
-			 */
-			d->access |= DPL_USER;
-		}
+		traps[i].vector = i;
 		
-		idt_setoffset(d, ((uintptr_t) interrupt_handlers) + i*interrupt_handler_size);
+		if (i == VECTOR_SYSCALL)
+			traps[i].flags = 3;
+		else
+			traps[i].flags = 0;
+		
+		traps[i].cs = XEN_CS;
+		traps[i].address = ((uintptr_t) interrupt_handlers) + i * interrupt_handler_size;
 		exc_register(i, "undef", (iroutine) null_interrupt);
 	}
+	traps[IDT_ITEMS].vector = 0;
+	traps[IDT_ITEMS].flags = 0;
+	traps[IDT_ITEMS].cs = 0;
+	traps[IDT_ITEMS].address = NULL;
+	
 	exc_register(13, "gp_fault", (iroutine) gp_fault);
 	exc_register( 7, "nm_fault", (iroutine) nm_fault);
@@ -173,32 +159,20 @@
 {
 	descriptor_t *gdt_p = (descriptor_t *) gdtr.base;
-	ptr_16_32_t idtr;
-
-	/*
-	 * Update addresses in GDT and IDT to their virtual counterparts.
-	 */
-	idtr.limit = sizeof(idt);
-	idtr.base = (uintptr_t) idt;
+
 //	gdtr_load(&gdtr);
-//	idtr_load(&idtr);
-	
-	/*
-	 * Each CPU has its private GDT and TSS.
-	 * All CPUs share one IDT.
-	 */
-
-//	if (config.cpu_active == 1) {
-//		idt_init();
-//		/*
-//		 * NOTE: bootstrap CPU has statically allocated TSS, because
-//		 * the heap hasn't been initialized so far.
-//		 */
+	
+	if (config.cpu_active == 1) {
+		traps_init();
+		xen_set_trap_table(traps);
+		/*
+		 * NOTE: bootstrap CPU has statically allocated TSS, because
+		 * the heap hasn't been initialized so far.
+		 */
 		tss_p = &tss;
-//	}
-//	else {
-//		tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
-//		if (!tss_p)
-//			panic("could not allocate TSS\n");
-//	}
+	} else {
+		tss_p = (tss_t *) malloc(sizeof(tss_t), FRAME_ATOMIC);
+		if (!tss_p)
+			panic("could not allocate TSS\n");
+	}
 
 //	tss_initialize(tss_p);
Index: kernel/arch/xen32/src/proc/scheduler.c
===================================================================
--- kernel/arch/xen32/src/proc/scheduler.c	(revision 3e5cc686bc184b3b53bb88837ae6a2bdc9ab72ce)
+++ kernel/arch/xen32/src/proc/scheduler.c	(revision 7d3d641a8c852bac56e8c9ace15cfffbdf4b0173)
@@ -27,5 +27,5 @@
  */
 
- /** @addtogroup ia32proc
+/** @addtogroup xen32proc
  * @{
  */
@@ -78,5 +78,4 @@
 }
 
- /** @}
+/** @}
  */
-
Index: kernel/arch/xen32/src/proc/task.c
===================================================================
--- kernel/arch/xen32/src/proc/task.c	(revision 3e5cc686bc184b3b53bb88837ae6a2bdc9ab72ce)
+++ kernel/arch/xen32/src/proc/task.c	(revision 7d3d641a8c852bac56e8c9ace15cfffbdf4b0173)
@@ -27,5 +27,5 @@
  */
 
- /** @addtogroup ia32proc
+/** @addtogroup xen32proc
  * @{
  */
@@ -58,5 +58,4 @@
 }
 
- /** @}
+/** @}
  */
-
Index: kernel/arch/xen32/src/proc/thread.c
===================================================================
--- kernel/arch/xen32/src/proc/thread.c	(revision 3e5cc686bc184b3b53bb88837ae6a2bdc9ab72ce)
+++ kernel/arch/xen32/src/proc/thread.c	(revision 7d3d641a8c852bac56e8c9ace15cfffbdf4b0173)
@@ -27,5 +27,5 @@
  */
 
- /** @addtogroup ia32proc
+/** @addtogroup xen32proc
  * @{
  */
@@ -35,5 +35,5 @@
 #include <proc/thread.h>
 
-/** Perform ia32 specific thread initialization.
+/** Perform xen32 specific thread initialization.
  *
  * @param t Thread to be initialized.
@@ -44,5 +44,4 @@
 }
 
- /** @}
+/** @}
  */
-
Index: kernel/arch/xen32/src/xen32.c
===================================================================
--- kernel/arch/xen32/src/xen32.c	(revision 3e5cc686bc184b3b53bb88837ae6a2bdc9ab72ce)
+++ kernel/arch/xen32/src/xen32.c	(revision 7d3d641a8c852bac56e8c9ace15cfffbdf4b0173)
@@ -65,4 +65,7 @@
 memzone_t meminfo;
 
+extern void xen_callback(void);
+extern void xen_failsafe_callback(void);
+
 void arch_pre_main(void)
 {
@@ -76,4 +79,6 @@
 	pte.frame_address = ADDR2PFN((uintptr_t) start_info.shared_info);
 	xen_update_va_mapping(&shared_info, pte, UVMF_INVLPG);
+	
+	xen_set_callbacks(XEN_CS, xen_callback, XEN_CS, xen_failsafe_callback);
 	
 	/* Create identity mapping */
@@ -117,9 +122,9 @@
 //		bios_init();
 		
-//		exc_register(VECTOR_SYSCALL, "syscall", (iroutine) syscall);
+		exc_register(VECTOR_SYSCALL, "syscall", (iroutine) syscall);
 		
 		#ifdef CONFIG_SMP
-//		exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
-//			     (iroutine) tlb_shootdown_ipi);
+		exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
+			     (iroutine) tlb_shootdown_ipi);
 		#endif /* CONFIG_SMP */
 	}