Changeset 7cd15b9 in mainline


Ignore:
Timestamp:
2014-04-18T19:04:14Z (10 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
6d5da743
Parents:
83b01c2
Message:

Flush cachelines holding the initial arm32 boot page table.
(Thx Jano Vesely)

Files:
2 edited

Legend:

Unmodified
Added
Removed

  • boot/arch/arm32/src/main.c

    r83b01c2 r7cd15b9  
    129129       
    130130        printf(".\n");
     131
     132        /* Flush PT too. We need this if we disable caches later */
     133        clean_dcache_poc(boot_pt, PTL0_ENTRIES * PTL0_ENTRY_SIZE);
    131134       
    132135        printf("Booting the kernel...\n");

  • kernel/arch/arm32/include/arch/mm/page_armv6.h

    r83b01c2 r7cd15b9  
    258258        if (flags & PAGE_CACHEABLE) {
    259259                /*
    260                  * Write-through, no write-allocate memory, see ch. B3.8.2
     260                 * Write-through, write-allocate memory, see ch. B3.8.2
    261261                 * (p. B3-1358) of ARM Architecture reference manual.
    262262                 * Make sure the memory type is correct, and in sync with:
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