Index: kernel/arch/abs32le/include/asm.h =================================================================== --- kernel/arch/abs32le/include/asm.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ kernel/arch/abs32le/include/asm.h (revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3) @@ -164,4 +164,11 @@ } +static inline bool interrupts_disabled(void) +{ + /* On real hardware the return value is true iff interrupts are + disabled. */ + return false; +} + static inline uintptr_t get_stack_base(void) { Index: kernel/arch/abs32le/include/debug.h =================================================================== --- kernel/arch/abs32le/include/debug.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32ledebug - * @{ - */ -/** @file - */ - -#ifndef KERN_abs32le_DEBUG_H_ -#define KERN_abs32le_DEBUG_H_ - -#include - -#define HERE get_ip() - -#endif - -/** @} - */ Index: kernel/arch/amd64/include/asm.h =================================================================== --- kernel/arch/amd64/include/asm.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ kernel/arch/amd64/include/asm.h (revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3) @@ -38,4 +38,5 @@ #include #include +#include extern void asm_delay_loop(uint32_t t); @@ -269,4 +270,23 @@ return v; } + +/** Check interrupts state. + * + * @return True if interrupts are disabled. + * + */ +static inline bool interrupts_disabled(void) +{ + ipl_t v; + + asm volatile ( + "pushfq\n" + "popq %[v]\n" + : [v] "=r" (v) + ); + + return ((v & RFLAGS_IF) == 0); +} + /** Write to MSR */ Index: kernel/arch/amd64/include/debug.h =================================================================== --- kernel/arch/amd64/include/debug.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ (revision ) @@ -1,1 +1,0 @@ -../../ia32/include/debug.h Index: kernel/arch/arm32/include/debug.h =================================================================== --- kernel/arch/arm32/include/debug.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ (revision ) @@ -1,42 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32debug - * @{ - */ -/** @file - * @brief Empty. - */ - -#ifndef KERN_arm32_DEBUG_H_ -#define KERN_arm32_DEBUG_H_ - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/interrupt.h =================================================================== --- kernel/arch/arm32/include/interrupt.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ kernel/arch/arm32/include/interrupt.h (revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3) @@ -52,4 +52,5 @@ extern void interrupts_restore(ipl_t ipl); extern ipl_t interrupts_read(void); +extern bool interrupts_disabled(void); Index: kernel/arch/arm32/src/interrupt.c =================================================================== --- kernel/arch/arm32/src/interrupt.c (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ kernel/arch/arm32/src/interrupt.c (revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3) @@ -97,4 +97,14 @@ } +/** Check interrupts state. + * + * @return True if interrupts are disabled. + * + */ +bool interrupts_disabled(void) +{ + return current_status_reg_read() & STATUS_REG_IRQ_DISABLED_BIT; +} + /** Initialize basic tables for exception dispatching * and starts the timer. Index: kernel/arch/ia32/include/asm.h =================================================================== --- kernel/arch/ia32/include/asm.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ kernel/arch/ia32/include/asm.h (revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3) @@ -38,4 +38,5 @@ #include +#include #include #include @@ -299,4 +300,22 @@ } +/** Check interrupts state. + * + * @return True if interrupts are disabled. + * + */ +static inline bool interrupts_disabled(void) +{ + ipl_t v; + + asm volatile ( + "pushf\n" + "popl %[v]\n" + : [v] "=r" (v) + ); + + return ((v & EFLAGS_IF) == 0); +} + /** Write to MSR */ static inline void write_msr(uint32_t msr, uint64_t value) Index: kernel/arch/ia32/include/debug.h =================================================================== --- kernel/arch/ia32/include/debug.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup amd64debug - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_DEBUG_H_ -#define KERN_ia32_DEBUG_H_ - -#include - -#define HERE get_ip() - -#endif - -/** @} - */ Index: kernel/arch/ia32/src/mm/frame.c =================================================================== --- kernel/arch/ia32/src/mm/frame.c (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ kernel/arch/ia32/src/mm/frame.c (revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3) @@ -55,4 +55,5 @@ { unsigned int i; + for (i = 0; i < e820counter; i++) { uint64_t base = e820table[i].base_address; @@ -60,5 +61,4 @@ #ifdef __32_BITS__ - /* Ignore physical memory above 4 GB */ if ((base >> 32) != 0) @@ -68,6 +68,6 @@ if (((base + size) >> 32) != 0) size = 0xffffffff - base; - #endif + pfn_t pfn; size_t count; @@ -118,5 +118,4 @@ }; - void physmem_print(void) { @@ -134,5 +133,5 @@ printf("%#18llx %#18llx %s\n", e820table[i].base_address, - e820table[i].size, name); + e820table[i].size, name); } } @@ -148,7 +147,8 @@ #ifdef CONFIG_SMP minconf = max(minconf, - ADDR2PFN(AP_BOOT_OFFSET + hardcoded_unmapped_ktext_size + - hardcoded_unmapped_kdata_size)); + ADDR2PFN(AP_BOOT_OFFSET + hardcoded_unmapped_ktext_size + + hardcoded_unmapped_kdata_size)); #endif + init_e820_memory(minconf); @@ -159,6 +159,6 @@ /* Reserve AP real mode bootstrap memory */ frame_mark_unavailable(AP_BOOT_OFFSET >> FRAME_WIDTH, - (hardcoded_unmapped_ktext_size + - hardcoded_unmapped_kdata_size) >> FRAME_WIDTH); + (hardcoded_unmapped_ktext_size + + hardcoded_unmapped_kdata_size) >> FRAME_WIDTH); #endif } Index: kernel/arch/ia32/src/smp/apic.c =================================================================== --- kernel/arch/ia32/src/smp/apic.c (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ kernel/arch/ia32/src/smp/apic.c (revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3) @@ -426,5 +426,5 @@ /* Program Logical Destination Register. */ - ASSERT(CPU->id < 8) + ASSERT(CPU->id < 8); ldr.value = l_apic[LDR]; ldr.id = (uint8_t) (1 << CPU->id); Index: kernel/arch/ia64/include/asm.h =================================================================== --- kernel/arch/ia64/include/asm.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ kernel/arch/ia64/include/asm.h (revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3) @@ -417,4 +417,14 @@ } +/** Check interrupts state. + * + * @return True if interrupts are disabled. + * + */ +static inline bool interrupts_disabled(void) +{ + return !(psr_read() & PSR_I_MASK); +} + /** Disable protection key checking. */ static inline void pk_disable(void) Index: kernel/arch/ia64/include/debug.h =================================================================== --- kernel/arch/ia64/include/debug.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ (revision ) @@ -1,42 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia64debug ia64 - * @ingroup debug - * @{ - */ -/** @file - */ - -#ifndef KERN_ia64_DEBUG_H_ -#define KERN_ia64_DEBUG_H_ - -#endif - -/** @} - */ Index: kernel/arch/mips32/include/asm.h =================================================================== --- kernel/arch/mips32/include/asm.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ kernel/arch/mips32/include/asm.h (revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3) @@ -74,5 +74,5 @@ extern void interrupts_restore(ipl_t ipl); extern ipl_t interrupts_read(void); -extern void asm_delay_loop(uint32_t t); +extern bool interrupts_disabled(void); static inline void pio_write_8(ioport8_t *port, uint8_t v) Index: kernel/arch/mips32/src/interrupt.c =================================================================== --- kernel/arch/mips32/src/interrupt.c (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ kernel/arch/mips32/src/interrupt.c (revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3) @@ -89,4 +89,14 @@ } +/** Check interrupts state. + * + * @return True if interrupts are disabled. + * + */ +bool interrupts_disabled(void) +{ + return !(cp0_status_read() & cp0_status_ie_enabled_bit); +} + /* TODO: This is SMP unsafe!!! */ uint32_t count_hi = 0; Index: kernel/arch/ppc32/include/asm.h =================================================================== --- kernel/arch/ppc32/include/asm.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ kernel/arch/ppc32/include/asm.h (revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3) @@ -38,4 +38,25 @@ #include #include +#include + +static inline uint32_t msr_read(void) +{ + uint32_t msr; + + asm volatile ( + "mfmsr %[msr]\n" + : [msr] "=r" (msr) + ); + + return msr; +} + +static inline void msr_write(uint32_t msr) +{ + asm volatile ( + "mtmsr %[msr]\n" + :: [msr] "r" (msr) + ); +} /** Enable interrupts. @@ -45,18 +66,11 @@ * * @return Old interrupt priority level. + * */ static inline ipl_t interrupts_enable(void) { - ipl_t v; - ipl_t tmp; - - asm volatile ( - "mfmsr %0\n" - "mfmsr %1\n" - "ori %1, %1, 1 << 15\n" - "mtmsr %1\n" - : "=r" (v), "=r" (tmp) - ); - return v; + ipl_t ipl = msr_read(); + msr_write(ipl | MSR_EE); + return ipl; } @@ -67,18 +81,11 @@ * * @return Old interrupt priority level. + * */ static inline ipl_t interrupts_disable(void) { - ipl_t v; - ipl_t tmp; - - asm volatile ( - "mfmsr %0\n" - "mfmsr %1\n" - "rlwinm %1, %1, 0, 17, 15\n" - "mtmsr %1\n" - : "=r" (v), "=r" (tmp) - ); - return v; + ipl_t ipl = msr_read(); + msr_write(ipl & (~MSR_EE)); + return ipl; } @@ -88,20 +95,9 @@ * * @param ipl Saved interrupt priority level. + * */ static inline void interrupts_restore(ipl_t ipl) { - ipl_t tmp; - - asm volatile ( - "mfmsr %1\n" - "rlwimi %0, %1, 0, 17, 15\n" - "cmpw 0, %0, %1\n" - "beq 0f\n" - "mtmsr %0\n" - "0:\n" - : "=r" (ipl), "=r" (tmp) - : "0" (ipl) - : "cr0" - ); + msr_write((msr_read() & (~MSR_EE)) | (ipl & MSR_EE)); } @@ -111,14 +107,19 @@ * * @return Current interrupt priority level. + * */ static inline ipl_t interrupts_read(void) { - ipl_t v; - - asm volatile ( - "mfmsr %0\n" - : "=r" (v) - ); - return v; + return msr_read(); +} + +/** Check whether interrupts are disabled. + * + * @return True if interrupts are disabled. + * + */ +static inline bool interrupts_disabled(void) +{ + return ((msr_read() & MSR_EE) == 0); } @@ -128,15 +129,17 @@ * The stack is assumed to be STACK_SIZE bytes long. * The stack must start on page boundary. + * */ static inline uintptr_t get_stack_base(void) { - uintptr_t v; + uintptr_t base; asm volatile ( - "and %0, %%sp, %1\n" - : "=r" (v) - : "r" (~(STACK_SIZE - 1)) + "and %[base], %%sp, %[mask]\n" + : [base] "=r" (base) + : [mask] "r" (~(STACK_SIZE - 1)) ); - return v; + + return base; } Index: kernel/arch/ppc32/include/cpu.h =================================================================== --- kernel/arch/ppc32/include/cpu.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ kernel/arch/ppc32/include/cpu.h (revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3) @@ -36,11 +36,36 @@ #define KERN_ppc32_CPU_H_ -#include +/* MSR bits */ +#define MSR_DR (1 << 4) +#define MSR_IR (1 << 5) +#define MSR_PR (1 << 14) +#define MSR_EE (1 << 15) + +/* HID0 bits */ +#define HID0_STEN (1 << 24) +#define HID0_ICE (1 << 15) +#define HID0_DCE (1 << 14) +#define HID0_ICFI (1 << 11) +#define HID0_DCI (1 << 10) + +#ifndef __ASM__ + +#include typedef struct { - int version; - int revision; -} cpu_arch_t; - + uint16_t version; + uint16_t revision; +} __attribute__ ((packed)) cpu_arch_t; + +static inline void cpu_version(cpu_arch_t *info) +{ + asm volatile ( + "mfpvr %[cpu_info]\n" + : [cpu_info] "=r" (*info) + ); +} + +#endif /* __ASM__ */ + #endif Index: kernel/arch/ppc32/include/cpuid.h =================================================================== --- kernel/arch/ppc32/include/cpuid.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ (revision ) @@ -1,56 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_CPUID_H_ -#define KERN_ppc32_CPUID_H_ - -#include - -typedef struct { - uint16_t version; - uint16_t revision; -} __attribute__ ((packed)) cpu_info_t; - -static inline void cpu_version(cpu_info_t *info) -{ - asm volatile ( - "mfpvr %0\n" - : "=r" (*info) - ); -} - -#endif - -/** @} - */ Index: kernel/arch/ppc32/include/debug.h =================================================================== --- kernel/arch/ppc32/include/debug.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ (revision ) @@ -1,41 +1,0 @@ -/* - * Copyright (c) 2005 - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ppc32debug - * @{ - */ -/** @file - */ - -#ifndef KERN_ppc32_DEBUG_H_ -#define KERN_ppc32_DEBUG_H_ - -#endif - -/** @} - */ Index: kernel/arch/ppc32/src/cpu/cpu.c =================================================================== --- kernel/arch/ppc32/src/cpu/cpu.c (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ kernel/arch/ppc32/src/cpu/cpu.c (revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3) @@ -34,5 +34,4 @@ #include -#include #include #include @@ -45,33 +44,30 @@ void cpu_identify(void) { - cpu_info_t info; - - cpu_version(&info); - CPU->arch.version = info.version; - CPU->arch.revision = info.revision; + cpu_version(&CPU->arch); } -void cpu_print_report(cpu_t *m) +void cpu_print_report(cpu_t *cpu) { const char *name; - switch (m->arch.version) { + switch (cpu->arch.version) { case 8: - name = " (PowerPC 750)"; + name = "PowerPC 750"; break; case 9: - name = " (PowerPC 604e)"; + name = "PowerPC 604e"; break; case 0x81: - name = " (PowerPC 8260)"; + name = "PowerPC 8260"; break; case 0x8081: - name = " (PowerPC 826xA)"; + name = "PowerPC 826xA"; break; default: - name = ""; + name = "unknown"; } - printf("cpu%d: version=%d%s, revision=%d\n", m->id, m->arch.version, name, m->arch.revision); + printf("cpu%" PRIs ": version=%" PRIu16" (%s), revision=%" PRIu16 "\n", cpu->id, + cpu->arch.version, name, cpu->arch.revision); } Index: kernel/arch/ppc32/src/debug/stacktrace.c =================================================================== --- kernel/arch/ppc32/src/debug/stacktrace.c (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ kernel/arch/ppc32/src/debug/stacktrace.c (revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3) @@ -37,22 +37,29 @@ #include +#define FRAME_OFFSET_FP_PREV 0 +#define FRAME_OFFSET_RA 1 + bool kernel_frame_pointer_validate(uintptr_t fp) { - return false; + return fp != 0; } bool kernel_frame_pointer_prev(uintptr_t fp, uintptr_t *prev) { - return false; + uint32_t *stack = (void *) fp; + *prev = stack[FRAME_OFFSET_FP_PREV]; + return true; } bool kernel_return_address_get(uintptr_t fp, uintptr_t *ra) { - return false; + uint32_t *stack = (void *) fp; + *ra = stack[FRAME_OFFSET_RA]; + return true; } bool uspace_frame_pointer_validate(uintptr_t fp) { - return false; + return fp != 0; } Index: kernel/arch/ppc32/src/debug/stacktrace_asm.S =================================================================== --- kernel/arch/ppc32/src/debug/stacktrace_asm.S (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ kernel/arch/ppc32/src/debug/stacktrace_asm.S (revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3) @@ -27,4 +27,6 @@ # +#include + .text @@ -33,6 +35,8 @@ frame_pointer_get: + mr r3, sp blr program_counter_get: + mflr r3 blr Index: kernel/arch/sparc64/include/asm.h =================================================================== --- kernel/arch/sparc64/include/asm.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ kernel/arch/sparc64/include/asm.h (revision 7c8e1e1f95d81f043e697b7dd7e6644e996009a3) @@ -308,4 +308,17 @@ } +/** Check interrupts state. + * + * @return True if interrupts are disabled. + * + */ +static inline bool interrupts_disabled(void) +{ + pstate_reg_t pstate; + + pstate.value = pstate_read(); + return !pstate.ie; +} + /** Return base address of current stack. * Index: kernel/arch/sparc64/include/debug.h =================================================================== --- kernel/arch/sparc64/include/debug.h (revision 0242621db9dbfb5d1b8b7311deb452c6f64280dc) +++ (revision ) @@ -1,41 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup sparc64debug - * @{ - */ -/** @file - */ - -#ifndef KERN_sparc64_DEBUG_H_ -#define KERN_sparc64_DEBUG_H_ - -#endif - -/** @} - */