Index: kernel/arch/arm32/include/arch/context_struct.h
===================================================================
--- kernel/arch/arm32/include/arch/context_struct.h	(revision d2f75eb31efa7109d60f52eb578fddc21c8d1e2d)
+++ kernel/arch/arm32/include/arch/context_struct.h	(revision 7c3fb9bd77e4d2f6c10517a052e567f176fa91ee)
@@ -34,5 +34,6 @@
 // XXX: This struct must match assembly code in src/context.S
 
-/* Thread context containing registers that must be preserved across
+/*
+ * Thread context containing registers that must be preserved across
  * function calls.
  */
Index: kernel/arch/arm32/include/arch/fpu_context.h
===================================================================
--- kernel/arch/arm32/include/arch/fpu_context.h	(revision d2f75eb31efa7109d60f52eb578fddc21c8d1e2d)
+++ kernel/arch/arm32/include/arch/fpu_context.h	(revision 7c3fb9bd77e4d2f6c10517a052e567f176fa91ee)
@@ -42,5 +42,6 @@
 #define FPU_CONTEXT_ALIGN    8
 
-/* ARM Architecture reference manual, p B-1529.
+/*
+ * ARM Architecture reference manual, p B-1529.
  */
 typedef struct {
Index: kernel/arch/arm32/include/arch/mm/page_armv4.h
===================================================================
--- kernel/arch/arm32/include/arch/mm/page_armv4.h	(revision d2f75eb31efa7109d60f52eb578fddc21c8d1e2d)
+++ kernel/arch/arm32/include/arch/mm/page_armv4.h	(revision 7c3fb9bd77e4d2f6c10517a052e567f176fa91ee)
@@ -64,5 +64,6 @@
 	unsigned should_be_zero : 1;
 
-	/* Pointer to the coarse 2nd level page table (holding entries for small
+	/*
+	 * Pointer to the coarse 2nd level page table (holding entries for small
 	 * (4KB) or large (64KB) pages. ARM also supports fine 2nd level page
 	 * tables that may hold even tiny pages (1KB) but they are bigger (4KB
@@ -80,6 +81,8 @@
 	unsigned cacheable : 1;
 
-	/* access permissions for each of 4 subparts of a page
-	 * (for each 1KB when small pages used */
+	/*
+	 * access permissions for each of 4 subparts of a page
+	 * (for each 1KB when small pages used
+	 */
 	unsigned access_permission_0 : 2;
 	unsigned access_permission_1 : 2;
Index: kernel/arch/arm32/include/arch/mm/page_armv6.h
===================================================================
--- kernel/arch/arm32/include/arch/mm/page_armv6.h	(revision d2f75eb31efa7109d60f52eb578fddc21c8d1e2d)
+++ kernel/arch/arm32/include/arch/mm/page_armv6.h	(revision 7c3fb9bd77e4d2f6c10517a052e567f176fa91ee)
@@ -66,5 +66,6 @@
 	unsigned should_be_zero_1 : 1;
 
-	/* Pointer to the coarse 2nd level page table (holding entries for small
+	/*
+	 * Pointer to the coarse 2nd level page table (holding entries for small
 	 * (4KB) or large (64KB) pages. ARM also supports fine 2nd level page
 	 * tables that may hold even tiny pages (1KB) but they are bigger (4KB
@@ -279,6 +280,8 @@
 	}
 
-	/* Shareable is ignored for devices (non-cacheable),
-	 * turn it off for normal memory. */
+	/*
+	 * Shareable is ignored for devices (non-cacheable),
+	 * turn it off for normal memory.
+	 */
 	p->shareable = 0;
 
