Index: kernel/arch/sparc64/src/asm.S
===================================================================
--- kernel/arch/sparc64/src/asm.S	(revision 208fa65660addbbf3528a9906e20dfdbf552bc78)
+++ kernel/arch/sparc64/src/asm.S	(revision 7bb6b065122bb8af8404a0355703e35ee8e56a37)
@@ -228,21 +228,15 @@
 
 .macro WRITE_ALTERNATE_REGISTER reg, bit
-	save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
-	rdpr %pstate, %l0
-	wrpr %l0, \bit, %pstate
-	mov %i0, \reg
-	wrpr %l0, 0, %pstate
-	ret
-	restore
+	wrpr %g0, (\bit | PSTATE_PRIV_BIT), %pstate
+	mov %o0, \reg
+	retl
+	wrpr %g0, PSTATE_PRIV_BIT, %pstate
 .endm
 
 .macro READ_ALTERNATE_REGISTER reg, bit
-	save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
-	rdpr %pstate, %l0
-	wrpr %l0, \bit, %pstate
-	mov \reg, %i0
-	wrpr %l0, 0, %pstate
-	ret
-	restore
+	wrpr %g0, (\bit | PSTATE_PRIV_BIT), %pstate
+	mov \reg, %o0
+	retl
+	wrpr %g0, PSTATE_PRIV_BIT, %pstate
 .endm
 
@@ -306,2 +300,3 @@
 	
 	done				! jump to userspace
+
Index: kernel/arch/sparc64/src/console.c
===================================================================
--- kernel/arch/sparc64/src/console.c	(revision 208fa65660addbbf3528a9906e20dfdbf552bc78)
+++ kernel/arch/sparc64/src/console.c	(revision 7bb6b065122bb8af8404a0355703e35ee8e56a37)
@@ -54,4 +54,5 @@
 #include <arch/mm/tlb.h>
 #include <arch/boot/boot.h>
+#include <arch.h>
 
 #define KEYBOARD_POLL_PAUSE	50000	/* 50ms */
@@ -80,4 +81,6 @@
 void kkbdpoll(void *arg)
 {
+	thread_detach(THREAD);
+
 	if (!bootinfo.keyboard.addr)
 		return;
Index: kernel/arch/sparc64/src/mm/tlb.c
===================================================================
--- kernel/arch/sparc64/src/mm/tlb.c	(revision 208fa65660addbbf3528a9906e20dfdbf552bc78)
+++ kernel/arch/sparc64/src/mm/tlb.c	(revision 7bb6b065122bb8af8404a0355703e35ee8e56a37)
@@ -48,7 +48,7 @@
 #include <config.h>
 #include <arch/trap/trap.h>
+#include <arch/trap/exception.h>
 #include <panic.h>
 #include <arch/asm.h>
-#include <symtab.h>
 
 static void dtlb_pte_copy(pte_t *t, bool ro);
@@ -308,8 +308,6 @@
 void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char *str)
 {
-	char *tpc_str = get_symtab_entry(istate->tpc);
-
 	fault_if_from_uspace(istate, "%s\n", str);
-	printf("TPC=%p, (%s)\n", istate->tpc, tpc_str);
+	dump_istate(istate);
 	panic("%s\n", str);
 }
@@ -318,5 +316,16 @@
 {
 	uintptr_t va;
-	char *tpc_str = get_symtab_entry(istate->tpc);
+
+	va = tag.vpn << PAGE_WIDTH;
+
+	fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context);
+	dump_istate(istate);
+	printf("Faulting page: %p, ASID=%d\n", va, tag.context);
+	panic("%s\n", str);
+}
+
+void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str)
+{
+	uintptr_t va;
 
 	va = tag.vpn << PAGE_WIDTH;
@@ -324,18 +333,5 @@
 	fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context);
 	printf("Faulting page: %p, ASID=%d\n", va, tag.context);
-	printf("TPC=%p, (%s)\n", istate->tpc, tpc_str);
-	panic("%s\n", str);
-}
-
-void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str)
-{
-	uintptr_t va;
-	char *tpc_str = get_symtab_entry(istate->tpc);
-
-	va = tag.vpn << PAGE_WIDTH;
-
-	fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context);
-	printf("Faulting page: %p, ASID=%d\n", va, tag.context);
-	printf("TPC=%p, (%s)\n", istate->tpc, tpc_str);
+	dump_istate(istate);
 	panic("%s\n", str);
 }
Index: kernel/arch/sparc64/src/start.S
===================================================================
--- kernel/arch/sparc64/src/start.S	(revision 208fa65660addbbf3528a9906e20dfdbf552bc78)
+++ kernel/arch/sparc64/src/start.S	(revision 7bb6b065122bb8af8404a0355703e35ee8e56a37)
@@ -77,13 +77,13 @@
 	mov %o1, %o2
 	mov %o0, %o1
-	set bootinfo, %o0
+	sethi %hi(bootinfo), %o0
 	call memcpy
-	nop
+	or %o0, %lo(bootinfo), %o0
 
 	/*
 	 * Switch to kernel trap table.
 	 */
-	set trap_table, %g1
-	wrpr %g1, 0, %tba
+	sethi %hi(trap_table), %g1
+	wrpr %g1, %lo(trap_table), %tba
 
 	/* 
@@ -121,5 +121,5 @@
 	sllx %r2, TTE_SIZE_SHIFT, %r2; \
 	or %r1, %r2, %r1; \
-	set 1, %r2; \
+	mov 1, %r2; \
 	sllx %r2, TTE_V_SHIFT, %r2; \
 	or %r1, %r2, %r1;
@@ -173,5 +173,5 @@
 	! write ITLB tag of context 1
 	SET_TLB_TAG(g1, MEM_CONTEXT_TEMP)
-	set VA_DMMU_TAG_ACCESS, %g2
+	mov VA_DMMU_TAG_ACCESS, %g2
 	stxa %g1, [%g2] ASI_IMMU
 	flush %g5
@@ -183,5 +183,5 @@
 	
 	! switch to context 1
-	set MEM_CONTEXT_TEMP, %g1
+	mov MEM_CONTEXT_TEMP, %g1
 	stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi	! ASI_DMMU is correct here !!!
 	flush %g5
@@ -194,5 +194,5 @@
 	! write ITLB tag of context 0
 	SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL)
-	set VA_DMMU_TAG_ACCESS, %g2
+	mov VA_DMMU_TAG_ACCESS, %g2
 	stxa %g1, [%g2] ASI_IMMU
 	flush %g5
@@ -211,5 +211,5 @@
 
 	! set context 1 in the primary context register
-	set MEM_CONTEXT_TEMP, %g1
+	mov MEM_CONTEXT_TEMP, %g1
 	stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi	! ASI_DMMU is correct here !!!
 	flush %g5
Index: kernel/arch/sparc64/src/trap/exception.c
===================================================================
--- kernel/arch/sparc64/src/trap/exception.c	(revision 208fa65660addbbf3528a9906e20dfdbf552bc78)
+++ kernel/arch/sparc64/src/trap/exception.c	(revision 7bb6b065122bb8af8404a0355703e35ee8e56a37)
@@ -40,4 +40,13 @@
 #include <debug.h>
 #include <typedefs.h>
+#include <symtab.h>
+#include <print.h>
+
+void dump_istate(istate_t *istate)
+{
+	printf("TSTATE=%#llx\n", istate->tstate);
+	printf("TPC=%#llx (%s)\n", istate->tpc, get_symtab_entry(istate->tpc));
+	printf("TNPC=%#llx (%s)\n", istate->tnpc, get_symtab_entry(istate->tnpc));
+}
 
 /** Handle instruction_access_exception. (0x8) */
@@ -45,5 +54,6 @@
 {
 	fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
-	panic("%s at %p.\n", __FUNCTION__, istate->tpc);
+	dump_istate(istate);
+	panic("%s\n", __FUNCTION__);
 }
 
@@ -52,5 +62,6 @@
 {
 	fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
-	panic("%s at %p.\n", __FUNCTION__, istate->tpc);
+	dump_istate(istate);
+	panic("%s\n", __FUNCTION__);
 }
 
@@ -59,5 +70,6 @@
 {
 	fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
-	panic("%s at %p.\n", __FUNCTION__, istate->tpc);
+	dump_istate(istate);
+	panic("%s\n", __FUNCTION__);
 }
 
@@ -66,5 +78,6 @@
 {
 	fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
-	panic("%s at %p.\n", __FUNCTION__, istate->tpc);
+	dump_istate(istate);
+	panic("%s\n", __FUNCTION__);
 }
 
@@ -73,5 +86,6 @@
 {
 	fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
-	panic("%s at %p.\n", __FUNCTION__, istate->tpc);
+	dump_istate(istate);
+	panic("%s\n", __FUNCTION__);
 }
 
@@ -80,5 +94,6 @@
 {
 	fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
-	panic("%s from %p.\n", __FUNCTION__, istate->tpc);
+	dump_istate(istate);
+	panic("%s\n", __FUNCTION__);
 }
 
@@ -87,5 +102,6 @@
 {
 	fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
-	panic("%s from %p.\n", __FUNCTION__, istate->tpc);
+	dump_istate(istate);
+	panic("%s\n", __FUNCTION__);
 }
 
@@ -94,5 +110,6 @@
 {
 	fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
-	panic("%s from %p.\n", __FUNCTION__, istate->tpc);
+	dump_istate(istate);
+	panic("%s\n", __FUNCTION__);
 }
 
@@ -101,5 +118,6 @@
 {
 	fault_if_from_uspace(istate, "%s\n", __FUNCTION__);
-	panic("%s at %p.\n", __FUNCTION__, istate->tpc);
+	dump_istate(istate);
+	panic("%s\n", __FUNCTION__);
 }
 
Index: kernel/arch/sparc64/src/trap/trap_table.S
===================================================================
--- kernel/arch/sparc64/src/trap/trap_table.S	(revision 208fa65660addbbf3528a9906e20dfdbf552bc78)
+++ kernel/arch/sparc64/src/trap/trap_table.S	(revision 7bb6b065122bb8af8404a0355703e35ee8e56a37)
@@ -651,5 +651,4 @@
 	ba 1f
 	nop
-
 0:
 	save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp
@@ -782,5 +781,5 @@
 	/*
 	 * OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case.
-	 * The CWP has already been restored to the value it had prior to the SAVE
+	 * The CWP has already been restored to the value it had after the SAVE
 	 * at the beginning of this function.
 	 */
