Changes in kernel/arch/mips32/include/atomic.h [88d653c:7a0359b] in mainline

File:

• kernel/arch/mips32/include/atomic.h (modified) (7 diffs)

kernel/arch/mips32/include/atomic.h

@@ -27 +27 @@
  */
 
-/** @addtogroup mips32  
+/** @addtogroup mips32
  * @{
  */
@@ -35 +35 @@
 #ifndef KERN_mips32_ATOMIC_H_
 #define KERN_mips32_ATOMIC_H_
+
+#include <trace.h>
 
 #define atomic_inc(x)  ((void) atomic_add(x, 1))
@@ -51 +53 @@
  *
  * @return Value after addition.
+ *
  */
-static inline long atomic_add(atomic_t *val, int i)
+NO_TRACE static inline atomic_count_t atomic_add(atomic_t *val,
+    atomic_count_t i)
 {
-        long tmp, v;
+        atomic_count_t tmp;
+        atomic_count_t v;
         
         asm volatile (
@@ -64 +69 @@
                 "       beq %0, %4, 1b\n"   /* if the atomic operation failed, try again */
                 "       nop\n"
-                : "=&r" (tmp), "+m" (val->count), "=&r" (v)
-                : "r" (i), "i" (0)
+                : "=&r" (tmp),
+                  "+m" (val->count),
+                  "=&r" (v)
+                : "r" (i),
+                  "i" (0)
         );
         
@@ -71 +79 @@
 }
 
-static inline uint32_t test_and_set(atomic_t *val) {
-        uint32_t tmp, v;
+NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val)
+{
+        atomic_count_t tmp;
+        atomic_count_t v;
         
         asm volatile (
@@ -82 +92 @@
                 "       beqz %0, 1b\n"
                 "2:\n"
-                : "=&r" (tmp), "+m" (val->count), "=&r" (v)
+                : "=&r" (tmp),
+                  "+m" (val->count),
+                  "=&r" (v)
                 : "i" (1)
         );
@@ -89 +101 @@
 }
 
-static inline void atomic_lock_arch(atomic_t *val) {
+NO_TRACE static inline void atomic_lock_arch(atomic_t *val)
+{
         do {
-                while (val->count)
-                        ;
+                while (val->count);
         } while (test_and_set(val));
 }