Index: arch/amd64/src/asm_utils.S
===================================================================
--- arch/amd64/src/asm_utils.S	(revision ffc277e3c054a3016b2cfa2ea3b7a295fd2a54c3)
+++ arch/amd64/src/asm_utils.S	(revision 788ccb04ef1c6bc05ec259d42eef9e65de5d33e3)
@@ -59,9 +59,4 @@
 .global utext
 utext:
-	xor %ax,%ax;
-	mov %ax,%ds;
-	mov %ax,%es;
-	mov %ax,%fs;
-	mov %ax,%gs;
 0:
 	int $48
@@ -178,9 +173,8 @@
 	push_all_gpr
 
-	# trap_dispatcher(i, stack)
 	movq $(\i),%rdi   # %rdi - first parameter
 	movq %rbp, %rsi
 	addq $8, %rsi     # %rsi - second parameter - original stack
-	call trap_dispatcher
+	call trap_dispatcher 	# trap_dispatcher(i, stack)
 
 # Test if this is interrupt with error word or not
@@ -217,7 +211,4 @@
 h_start:
 	handler 0 IDT_ITEMS
-#	handler 64 128	
-#	handler 128 192
-#	handler 192 256
 h_end:
 	
Index: arch/amd64/src/fpu_context.c
===================================================================
--- arch/amd64/src/fpu_context.c	(revision ffc277e3c054a3016b2cfa2ea3b7a295fd2a54c3)
+++ arch/amd64/src/fpu_context.c	(revision 788ccb04ef1c6bc05ec259d42eef9e65de5d33e3)
@@ -32,4 +32,5 @@
 #include <cpu.h>
 
+/** Save FPU (mmx, sse) context using fxsave instruction */
 void fpu_context_save(fpu_context_t *fctx)
 {
@@ -44,4 +45,5 @@
 }
 
+/** Restore FPU (mmx,sse) context using fxrstor instruction */
 void fpu_context_restore(fpu_context_t *fctx)
 {
Index: arch/amd64/src/pm.c
===================================================================
--- arch/amd64/src/pm.c	(revision ffc277e3c054a3016b2cfa2ea3b7a295fd2a54c3)
+++ arch/amd64/src/pm.c	(revision 788ccb04ef1c6bc05ec259d42eef9e65de5d33e3)
@@ -92,5 +92,5 @@
 	  .granularity = 1, 
 	  .base_24_31  = 0 },
-	/* KTEXT 32-bit protected */
+	/* KTEXT 32-bit protected, for protected mode before long mode */
 	{ .limit_0_15  = 0xffff, 
 	  .base_0_15   = 0,