Changeset 77f65df in mainline
- Timestamp:
- 2009-12-06T19:20:31Z (15 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 58d5803d
- Parents:
- 5e53e02
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/sparc64/src/mm/sun4v/tlb.c
r5e53e02 r77f65df 34 34 */ 35 35 36 #include <arch/mm/tlb.h>37 36 #include <mm/tlb.h> 38 37 #include <mm/as.h> … … 60 59 #endif 61 60 62 void dtlb_pte_copy(pte_t *t, bool ro);63 61 static void itlb_pte_copy(pte_t *); 62 static void dtlb_pte_copy(pte_t *, bool); 64 63 static void do_fast_instruction_access_mmu_miss_fault(istate_t *, const char *); 65 void do_fast_data_access_mmu_miss_fault(istate_t *istate,66 uint64_t page_and_ctx, const char *str);64 static void do_fast_data_access_mmu_miss_fault(istate_t *, uint64_t, 65 const char *); 67 66 static void do_fast_data_access_protection_fault(istate_t *, 68 67 uint64_t, const char *); … … 83 82 #define DMISS_CONTEXT(page_and_ctx) ((page_and_ctx) & 0x1fff) 84 83 85 char *context_encoding[] = { 86 "Primary", 87 "Secondary", 88 "Nucleus", 89 "Reserved" 90 }; 91 92 /** Invalidate all unlocked ITLB and DTLB entries. */ 93 void tlb_invalidate_all(void) 94 { 95 uint64_t errno = __hypercall_fast3(MMU_DEMAP_ALL, 0, 0, 96 MMU_FLAG_DTLB | MMU_FLAG_ITLB); 97 if (errno != EOK) { 98 panic("Error code = %d.\n", errno); 99 } 100 } 101 84 /** 85 * Descriptions of fault types from the MMU Fault status area. 86 * 87 * fault_type[i] contains description of error for which the IFT or DFT 88 * field of the MMU fault status area is i. 89 */ 90 char *fault_types[] = { 91 "unknown", 92 "fast miss", 93 "fast protection", 94 "MMU miss", 95 "invalid RA", 96 "privileged violation", 97 "protection violation", 98 "NFO access", 99 "so page/NFO side effect", 100 "invalid VA", 101 "invalid ASI", 102 "nc atomic", 103 "privileged action", 104 "unknown", 105 "unaligned access", 106 "invalid page size" 107 }; 108 109 110 /** Array of MMU fault status areas. */ 111 extern mmu_fault_status_area_t mmu_fsas[MAX_NUM_STRANDS]; 112 113 /* 114 * Invalidate all non-locked DTLB and ITLB entries. 115 */ 102 116 void tlb_arch_init(void) 103 117 { … … 116 130 bool locked, bool cacheable) 117 131 { 118 #if 0 119 tlb_tag_access_reg_t tag; 120 tlb_data_t data; 121 page_address_t pg; 122 frame_address_t fr; 123 124 pg.address = page; 125 fr.address = frame; 126 127 tag.context = ASID_KERNEL; 128 tag.vpn = pg.vpn; 129 130 dtlb_tag_access_write(tag.value); 131 132 tte_data_t data; 133 132 134 data.value = 0; 133 135 data.v = true; 134 data.size = pagesize; 135 data.pfn = fr.pfn; 136 data.l = locked; 136 data.nfo = false; 137 data.ra = frame >> FRAME_WIDTH; 138 data.ie = false; 139 data.e = false; 137 140 data.cp = cacheable; 138 141 #ifdef CONFIG_VIRT_IDX_DCACHE 139 142 data.cv = cacheable; 140 #endif /* CONFIG_VIRT_IDX_DCACHE */143 #endif 141 144 data.p = true; 145 data.x = false; 142 146 data.w = true; 143 data.g = false; 144 145 dtlb_data_in_write(data.value); 146 #endif 147 data.size = pagesize; 148 149 if (locked) { 150 __hypercall_fast4( 151 MMU_MAP_PERM_ADDR, page, 0, data.value, MMU_FLAG_DTLB); 152 } else { 153 __hypercall_hyperfast( 154 page, ASID_KERNEL, data.value, MMU_FLAG_DTLB, 0, 155 MMU_MAP_ADDR); 156 } 147 157 } 148 158 … … 175 185 t->page, t->as->asid, data.value, MMU_FLAG_DTLB, 0, MMU_MAP_ADDR); 176 186 } 177 178 187 179 188 /** Copy PTE to ITLB. … … 288 297 } 289 298 } 290 asm volatile ("sethi 0x41941, %g0");291 299 } 292 300 … … 336 344 } 337 345 338 339 /** Print TLB entry (for debugging purposes). 340 * 341 * The diag field has been left out in order to make this function more generic 342 * (there is no diag field in US3 architeture). 343 * 344 * @param i TLB entry number 345 * @param t TLB entry tag 346 * @param d TLB entry data 346 /* 347 * On Niagara this function does not work, as supervisor software is isolated 348 * from the TLB by the hypervisor and has no chance to investigate the TLB 349 * entries. 347 350 */ 348 351 void tlb_print(void) … … 388 391 void describe_dmmu_fault(void) 389 392 { 390 #if 0391 393 uint64_t myid; 392 394 __hypercall_fast_ret1(0, 0, 0, 0, 0, CPU_MYID, &myid); … … 406 408 panic("Error code = %d.\n", errno); 407 409 } 408 #endif409 410 } 410 411 … … 418 419 /* switch to nucleus because we are mapped by the primary context */ 419 420 nucleus_enter(); 421 420 422 __hypercall_fast4(MMU_DEMAP_CTX, 0, 0, asid, 421 423 MMU_FLAG_ITLB | MMU_FLAG_DTLB);
Note:
See TracChangeset
for help on using the changeset viewer.