Index: kernel/arch/ia32/include/interrupt.h
===================================================================
--- kernel/arch/ia32/include/interrupt.h	(revision 22c3444da12c77181be739f433e57e2eb2ec3b70)
+++ kernel/arch/ia32/include/interrupt.h	(revision 77385fe1ae64aa8f1bab1b5c3600ce05cd3f15b7)
@@ -72,11 +72,16 @@
 
 typedef struct istate {
+	/*
+	 * The strange order of the GPRs is given by the requirement to use the
+	 * istate structure for both regular interrupts and exceptions as well
+	 * as for syscall handler which use this order as an optimization.
+	 */
+	uint32_t edx;
+	uint32_t ecx;
+	uint32_t ebx;
+	uint32_t esi;
+	uint32_t edi;
+	uint32_t ebp;
 	uint32_t eax;
-	uint32_t ebx;
-	uint32_t ecx;
-	uint32_t edx;
-	uint32_t edi;
-	uint32_t esi;
-	uint32_t ebp;
 	
 	uint32_t ebp_frame;  /* imitation of frame pointer linkage */
Index: kernel/arch/ia32/src/asm.S
===================================================================
--- kernel/arch/ia32/src/asm.S	(revision 22c3444da12c77181be739f433e57e2eb2ec3b70)
+++ kernel/arch/ia32/src/asm.S	(revision 77385fe1ae64aa8f1bab1b5c3600ce05cd3f15b7)
@@ -205,11 +205,11 @@
 	sysexit   /* return to userspace */
 
-#define ISTATE_OFFSET_EAX         0
-#define ISTATE_OFFSET_EBX         4
-#define ISTATE_OFFSET_ECX         8
-#define ISTATE_OFFSET_EDX         12
-#define ISTATE_OFFSET_EDI         16
-#define ISTATE_OFFSET_ESI         20
-#define ISTATE_OFFSET_EBP         24
+#define ISTATE_OFFSET_EDX         0
+#define ISTATE_OFFSET_ECX         4
+#define ISTATE_OFFSET_EBX         8
+#define ISTATE_OFFSET_ESI         12
+#define ISTATE_OFFSET_EDI         16 
+#define ISTATE_OFFSET_EBP         20
+#define ISTATE_OFFSET_EAX         24
 #define ISTATE_OFFSET_EBP_FRAME   28
 #define ISTATE_OFFSET_EIP_FRAME   32