Index: boot/genarch/ofw.c =================================================================== --- boot/genarch/ofw.c (revision 1ecdbb0a73519ade1b15b6c908b07dfce755b6cc) +++ boot/genarch/ofw.c (revision 771cd22b02d9fec4d7d601d12b2979a07abb50db) @@ -234,5 +234,10 @@ } - +/** Save OpenFirmware physical memory map. + * + * @param map Memory map structure where the map will be saved. + * + * @return Zero on failure, non-zero on success. + */ int ofw_memmap(memmap_t *map) { @@ -240,5 +245,5 @@ unsigned int sc = ofw_get_size_cells(ofw_memory); - uint32_t buf[((ac+sc)*MEMMAP_MAX_RECORDS)]; + uint32_t buf[((ac + sc) * MEMMAP_MAX_RECORDS)]; int ret = ofw_get_property(ofw_memory, "reg", buf, sizeof(buf)); if (ret <= 0) /* ret is the number of written bytes */ @@ -248,5 +253,6 @@ map->total = 0; map->count = 0; - for (pos = 0; (pos < ret / sizeof(uint32_t)) && (map->count < MEMMAP_MAX_RECORDS); pos += ac + sc) { + for (pos = 0; (pos < ret / sizeof(uint32_t)) && (map->count < + MEMMAP_MAX_RECORDS); pos += ac + sc) { void * start = (void *) ((uintptr_t) buf[pos + ac - 1]); unsigned int size = buf[pos + ac + sc - 1]; Index: kernel/arch/sparc64/include/mm/page.h =================================================================== --- kernel/arch/sparc64/include/mm/page.h (revision 1ecdbb0a73519ade1b15b6c908b07dfce755b6cc) +++ kernel/arch/sparc64/include/mm/page.h (revision 771cd22b02d9fec4d7d601d12b2979a07abb50db) @@ -41,5 +41,5 @@ #define PAGE_SIZE FRAME_SIZE -#define PAGE_COLOR_BITS 1 /**< 14 - 13; 2^14 == 16K == alias boundary. */ +#define PAGE_COLOR_BITS 1 /**< 14 - 13; 2^14 == 16K == alias boundary. */ #ifdef KERNEL Index: kernel/arch/sparc64/include/mm/tsb.h =================================================================== --- kernel/arch/sparc64/include/mm/tsb.h (revision 1ecdbb0a73519ade1b15b6c908b07dfce755b6cc) +++ kernel/arch/sparc64/include/mm/tsb.h (revision 771cd22b02d9fec4d7d601d12b2979a07abb50db) @@ -43,7 +43,8 @@ * in TLBs - only one TLB entry will do. */ -#define TSB_SIZE 2 /* when changing this, change as.c as well */ -#define ITSB_ENTRY_COUNT (512*(1<>FRAME_WIDTH); + int order = fnzb32(((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) * + sizeof(tsb_entry_t)) >> FRAME_WIDTH); uintptr_t tsb = (uintptr_t) frame_alloc(order, flags | FRAME_KA); @@ -69,6 +70,8 @@ as->arch.itsb = (tsb_entry_t *) tsb; - as->arch.dtsb = (tsb_entry_t *) (tsb + ITSB_ENTRY_COUNT * sizeof(tsb_entry_t)); - memsetb((uintptr_t) as->arch.itsb, (ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t), 0); + as->arch.dtsb = (tsb_entry_t *) (tsb + ITSB_ENTRY_COUNT * + sizeof(tsb_entry_t)); + memsetb((uintptr_t) as->arch.itsb, (ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) + * sizeof(tsb_entry_t), 0); #endif return 0; @@ -78,5 +81,6 @@ { #ifdef CONFIG_TSB - count_t cnt = ((ITSB_ENTRY_COUNT+DTSB_ENTRY_COUNT)*sizeof(tsb_entry_t))>>FRAME_WIDTH; + count_t cnt = ((ITSB_ENTRY_COUNT + DTSB_ENTRY_COUNT) * + sizeof(tsb_entry_t)) >> FRAME_WIDTH; frame_free(KA2PA((uintptr_t) as->arch.itsb)); return cnt; @@ -100,5 +104,6 @@ } -/** Perform sparc64-specific tasks when an address space becomes active on the processor. +/** Perform sparc64-specific tasks when an address space becomes active on the + * processor. * * Install ASID and map TSBs. @@ -135,5 +140,5 @@ uintptr_t tsb = (uintptr_t) as->arch.itsb; - if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) { + if (!overlaps(tsb, 8 * PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) { /* * TSBs were allocated from memory not covered @@ -161,5 +166,6 @@ } -/** Perform sparc64-specific tasks when an address space is removed from the processor. +/** Perform sparc64-specific tasks when an address space is removed from the + * processor. * * Demap TSBs. @@ -184,5 +190,5 @@ uintptr_t tsb = (uintptr_t) as->arch.itsb; - if (!overlaps(tsb, 8*PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) { + if (!overlaps(tsb, 8 * PAGE_SIZE, base, 1 << KERNEL_PAGE_WIDTH)) { /* * TSBs were allocated from memory not covered Index: kernel/arch/sparc64/src/mm/frame.c =================================================================== --- kernel/arch/sparc64/src/mm/frame.c (revision 1ecdbb0a73519ade1b15b6c908b07dfce755b6cc) +++ kernel/arch/sparc64/src/mm/frame.c (revision 771cd22b02d9fec4d7d601d12b2979a07abb50db) @@ -65,6 +65,9 @@ if (confdata == ADDR2PFN(KA2PA(PFN2ADDR(0)))) confdata = ADDR2PFN(KA2PA(PFN2ADDR(2))); - zone_create(ADDR2PFN(start), SIZE2FRAMES(ALIGN_DOWN(size, FRAME_SIZE)), confdata, 0); - last_frame = max(last_frame, start + ALIGN_UP(size, FRAME_SIZE)); + zone_create(ADDR2PFN(start), + SIZE2FRAMES(ALIGN_DOWN(size, FRAME_SIZE)), + confdata, 0); + last_frame = max(last_frame, start + ALIGN_UP(size, + FRAME_SIZE)); } @@ -72,6 +75,6 @@ * On sparc64, physical memory can start on a non-zero address. * The generic frame_init() only marks PFN 0 as not free, so we - * must mark the physically first frame not free explicitly here, - * no matter what is its address. + * must mark the physically first frame not free explicitly + * here, no matter what is its address. */ frame_mark_unavailable(ADDR2PFN(KA2PA(PFN2ADDR(0))), 1); Index: kernel/arch/sparc64/src/mm/page.c =================================================================== --- kernel/arch/sparc64/src/mm/page.c (revision 1ecdbb0a73519ade1b15b6c908b07dfce755b6cc) +++ kernel/arch/sparc64/src/mm/page.c (revision 771cd22b02d9fec4d7d601d12b2979a07abb50db) @@ -46,6 +46,6 @@ /** Entries locked in DTLB of BSP. * - * Application processors need to have the same locked entries - * in their DTLBs as the bootstrap processor. + * Application processors need to have the same locked entries in their DTLBs as + * the bootstrap processor. */ static struct { @@ -85,17 +85,14 @@ /** Map memory-mapped device into virtual memory. * - * So far, only DTLB is used to map devices into memory. - * Chances are that there will be only a limited amount of - * devices that the kernel itself needs to lock in DTLB. + * So far, only DTLB is used to map devices into memory. Chances are that there + * will be only a limited amount of devices that the kernel itself needs to + * lock in DTLB. * - * @param physaddr Physical address of the page where the - * device is located. Must be at least - * page-aligned. - * @param size Size of the device's registers. Must not - * exceed 4M and must include extra space - * caused by the alignment. + * @param physaddr Physical address of the page where the device is located. + * Must be at least page-aligned. + * @param size Size of the device's registers. Must not exceed 4M and must + * include extra space caused by the alignment. * - * @return Virtual address of the page where the device is - * mapped. + * @return Virtual address of the page where the device is mapped. */ uintptr_t hw_map(uintptr_t physaddr, size_t size) @@ -115,15 +112,15 @@ { PAGESIZE_8K, PAGE_SIZE, 4 }, /* 32K */ { PAGESIZE_64K, 0, 1}, /* 64K */ - { PAGESIZE_64K, 8*PAGE_SIZE, 2 }, /* 128K */ - { PAGESIZE_64K, 8*PAGE_SIZE, 4 }, /* 256K */ + { PAGESIZE_64K, 8 * PAGE_SIZE, 2 }, /* 128K */ + { PAGESIZE_64K, 8 * PAGE_SIZE, 4 }, /* 256K */ { PAGESIZE_512K, 0, 1 }, /* 512K */ - { PAGESIZE_512K, 64*PAGE_SIZE, 2 }, /* 1M */ - { PAGESIZE_512K, 64*PAGE_SIZE, 4 }, /* 2M */ + { PAGESIZE_512K, 64 * PAGE_SIZE, 2 }, /* 1M */ + { PAGESIZE_512K, 64 * PAGE_SIZE, 4 }, /* 2M */ { PAGESIZE_4M, 0, 1 }, /* 4M */ - { PAGESIZE_4M, 512*PAGE_SIZE, 2 } /* 8M */ + { PAGESIZE_4M, 512 * PAGE_SIZE, 2 } /* 8M */ }; ASSERT(ALIGN_UP(physaddr, PAGE_SIZE) == physaddr); - ASSERT(size <= 8*1024*1024); + ASSERT(size <= 8 * 1024 * 1024); if (size <= FRAME_SIZE) @@ -145,7 +142,7 @@ * First, insert the mapping into DTLB. */ - dtlb_insert_mapping(virtaddr + i*sizemap[order].increment, - physaddr + i*sizemap[order].increment, - sizemap[order].pagesize_code, true, false); + dtlb_insert_mapping(virtaddr + i * sizemap[order].increment, + physaddr + i * sizemap[order].increment, + sizemap[order].pagesize_code, true, false); #ifdef CONFIG_SMP @@ -154,7 +151,7 @@ */ bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].virt_page = - virtaddr + i*sizemap[order].increment; + virtaddr + i * sizemap[order].increment; bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].phys_page = - physaddr + i*sizemap[order].increment; + physaddr + i * sizemap[order].increment; bsp_locked_dtlb_entry[bsp_locked_dtlb_entries].pagesize_code = sizemap[order].pagesize_code; Index: kernel/arch/sparc64/src/mm/tlb.c =================================================================== --- kernel/arch/sparc64/src/mm/tlb.c (revision 1ecdbb0a73519ade1b15b6c908b07dfce755b6cc) +++ kernel/arch/sparc64/src/mm/tlb.c (revision 771cd22b02d9fec4d7d601d12b2979a07abb50db) @@ -58,7 +58,10 @@ static void dtlb_pte_copy(pte_t *t, bool ro); static void itlb_pte_copy(pte_t *t); -static void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char *str); -static void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str); -static void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str); +static void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const + char *str); +static void do_fast_data_access_mmu_miss_fault(istate_t *istate, + tlb_tag_access_reg_t tag, const char *str); +static void do_fast_data_access_protection_fault(istate_t *istate, + tlb_tag_access_reg_t tag, const char *str); char *context_encoding[] = { @@ -91,5 +94,6 @@ * @param cacheable True if the mapping is cacheable, false otherwise. */ -void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool locked, bool cacheable) +void dtlb_insert_mapping(uintptr_t page, uintptr_t frame, int pagesize, bool + locked, bool cacheable) { tlb_tag_access_reg_t tag; @@ -125,5 +129,6 @@ * * @param t Page Table Entry to be copied. - * @param ro If true, the entry will be created read-only, regardless of its w field. + * @param ro If true, the entry will be created read-only, regardless of its w + * field. */ void dtlb_pte_copy(pte_t *t, bool ro) @@ -213,9 +218,11 @@ } else { /* - * Forward the page fault to the address space page fault handler. + * Forward the page fault to the address space page fault + * handler. */ page_table_unlock(AS, true); if (as_page_fault(va, PF_ACCESS_EXEC, istate) == AS_PF_FAULT) { - do_fast_instruction_access_mmu_miss_fault(istate, __FUNCTION__); + do_fast_instruction_access_mmu_miss_fault(istate, + __FUNCTION__); } } @@ -224,7 +231,6 @@ /** DTLB miss handler. * - * Note that some faults (e.g. kernel faults) were already resolved - * by the low-level, assembly language part of the fast_data_access_mmu_miss - * handler. + * Note that some faults (e.g. kernel faults) were already resolved by the + * low-level, assembly language part of the fast_data_access_mmu_miss handler. */ void fast_data_access_mmu_miss(int n, istate_t *istate) @@ -240,7 +246,9 @@ if (!tag.vpn) { /* NULL access in kernel */ - do_fast_data_access_mmu_miss_fault(istate, tag, __FUNCTION__); - } - do_fast_data_access_mmu_miss_fault(istate, tag, "Unexpected kernel page fault."); + do_fast_data_access_mmu_miss_fault(istate, tag, + __FUNCTION__); + } + do_fast_data_access_mmu_miss_fault(istate, tag, "Unexpected " + "kernel page fault."); } @@ -264,5 +272,6 @@ page_table_unlock(AS, true); if (as_page_fault(va, PF_ACCESS_READ, istate) == AS_PF_FAULT) { - do_fast_data_access_mmu_miss_fault(istate, tag, __FUNCTION__); + do_fast_data_access_mmu_miss_fault(istate, tag, + __FUNCTION__); } } @@ -283,6 +292,7 @@ if (t && PTE_WRITABLE(t)) { /* - * The mapping was found in the software page hash table and is writable. - * Demap the old mapping and insert an updated mapping into DTLB. + * The mapping was found in the software page hash table and is + * writable. Demap the old mapping and insert an updated mapping + * into DTLB. */ t->a = true; @@ -296,9 +306,11 @@ } else { /* - * Forward the page fault to the address space page fault handler. + * Forward the page fault to the address space page fault + * handler. */ page_table_unlock(AS, true); if (as_page_fault(va, PF_ACCESS_WRITE, istate) == AS_PF_FAULT) { - do_fast_data_access_protection_fault(istate, tag, __FUNCTION__); + do_fast_data_access_protection_fault(istate, tag, + __FUNCTION__); } } @@ -317,6 +329,9 @@ t.value = itlb_tag_read_read(i); - printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", - i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); + printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, " + "ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, " + "cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn, + t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, + d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); } @@ -326,11 +341,15 @@ t.value = dtlb_tag_read_read(i); - printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", - i, t.vpn, t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); - } - -} - -void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char *str) + printf("%d: vpn=%#llx, context=%d, v=%d, size=%d, nfo=%d, " + "ie=%d, soft2=%#x, diag=%#x, pfn=%#x, soft=%#x, l=%d, " + "cp=%d, cv=%d, e=%d, p=%d, w=%d, g=%d\n", i, t.vpn, + t.context, d.v, d.size, d.nfo, d.ie, d.soft2, d.diag, + d.pfn, d.soft, d.l, d.cp, d.cv, d.e, d.p, d.w, d.g); + } + +} + +void do_fast_instruction_access_mmu_miss_fault(istate_t *istate, const char + *str) { fault_if_from_uspace(istate, "%s\n", str); @@ -339,5 +358,6 @@ } -void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str) +void do_fast_data_access_mmu_miss_fault(istate_t *istate, tlb_tag_access_reg_t + tag, const char *str) { uintptr_t va; @@ -345,5 +365,6 @@ va = tag.vpn << PAGE_WIDTH; - fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context); + fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, + tag.context); dump_istate(istate); printf("Faulting page: %p, ASID=%d\n", va, tag.context); @@ -351,5 +372,6 @@ } -void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t tag, const char *str) +void do_fast_data_access_protection_fault(istate_t *istate, tlb_tag_access_reg_t + tag, const char *str) { uintptr_t va; @@ -357,5 +379,6 @@ va = tag.vpn << PAGE_WIDTH; - fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, tag.context); + fault_if_from_uspace(istate, "%s, Page=%p (ASID=%d)\n", str, va, + tag.context); printf("Faulting page: %p, ASID=%d\n", va, tag.context); dump_istate(istate); @@ -371,6 +394,7 @@ sfar = dtlb_sfar_read(); - printf("DTLB SFSR: asi=%#x, ft=%#x, e=%d, ct=%d, pr=%d, w=%d, ow=%d, fv=%d\n", - sfsr.asi, sfsr.ft, sfsr.e, sfsr.ct, sfsr.pr, sfsr.w, sfsr.ow, sfsr.fv); + printf("DTLB SFSR: asi=%#x, ft=%#x, e=%d, ct=%d, pr=%d, w=%d, ow=%d, " + "fv=%d\n", sfsr.asi, sfsr.ft, sfsr.e, sfsr.ct, sfsr.pr, sfsr.w, + sfsr.ow, sfsr.fv); printf("DTLB SFAR: address=%p\n", sfar); @@ -407,5 +431,6 @@ } -/** Invalidate all ITLB and DTLB entries that belong to specified ASID (Context). +/** Invalidate all ITLB and DTLB entries that belong to specified ASID + * (Context). * * @param asid Address Space ID. @@ -430,5 +455,6 @@ } -/** Invalidate all ITLB and DTLB entries for specified page range in specified address space. +/** Invalidate all ITLB and DTLB entries for specified page range in specified + * address space. * * @param asid Address Space ID. @@ -449,6 +475,8 @@ for (i = 0; i < cnt; i++) { - itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i * PAGE_SIZE); - dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i * PAGE_SIZE); + itlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i * + PAGE_SIZE); + dtlb_demap(TLB_DEMAP_PAGE, TLB_DEMAP_PRIMARY, page + i * + PAGE_SIZE); } Index: kernel/arch/sparc64/src/mm/tsb.c =================================================================== --- kernel/arch/sparc64/src/mm/tsb.c (revision 1ecdbb0a73519ade1b15b6c908b07dfce755b6cc) +++ kernel/arch/sparc64/src/mm/tsb.c (revision 771cd22b02d9fec4d7d601d12b2979a07abb50db) @@ -42,16 +42,15 @@ #include -#define TSB_INDEX_MASK ((1<<(21+1+TSB_SIZE-PAGE_WIDTH))-1) +#define TSB_INDEX_MASK ((1 << (21 + 1 + TSB_SIZE - PAGE_WIDTH)) - 1) /** Invalidate portion of TSB. * - * We assume that the address space is already locked. - * Note that respective portions of both TSBs - * are invalidated at a time. + * We assume that the address space is already locked. Note that respective + * portions of both TSBs are invalidated at a time. * * @param as Address space. * @param page First page to invalidate in TSB. - * @param pages Number of pages to invalidate. - * Value of (count_t) -1 means the whole TSB. + * @param pages Number of pages to invalidate. Value of (count_t) -1 means the + * whole TSB. */ void tsb_invalidate(as_t *as, uintptr_t page, count_t pages) @@ -66,6 +65,8 @@ for (i = 0; i < cnt; i++) { - as->arch.itsb[(i0 + i) & (ITSB_ENTRY_COUNT-1)].tag.invalid = true; - as->arch.dtsb[(i0 + i) & (DTSB_ENTRY_COUNT-1)].tag.invalid = true; + as->arch.itsb[(i0 + i) & (ITSB_ENTRY_COUNT - 1)].tag.invalid = + true; + as->arch.dtsb[(i0 + i) & (DTSB_ENTRY_COUNT - 1)].tag.invalid = + true; } } Index: kernel/arch/sparc64/src/smp/ipi.c =================================================================== --- kernel/arch/sparc64/src/smp/ipi.c (revision 1ecdbb0a73519ade1b15b6c908b07dfce755b6cc) +++ kernel/arch/sparc64/src/smp/ipi.c (revision 771cd22b02d9fec4d7d601d12b2979a07abb50db) @@ -62,5 +62,5 @@ /* - * This functin might enable interrupts for a while. + * This function might enable interrupts for a while. * In order to prevent migration to another processor, * we explicitly disable preemption. Index: kernel/arch/sparc64/src/sparc64.c =================================================================== --- kernel/arch/sparc64/src/sparc64.c (revision 1ecdbb0a73519ade1b15b6c908b07dfce755b6cc) +++ kernel/arch/sparc64/src/sparc64.c (revision 771cd22b02d9fec4d7d601d12b2979a07abb50db) @@ -51,4 +51,5 @@ bootinfo_t bootinfo; +/** Perform sparc64 specific initialization before main_bsp() is called. */ void arch_pre_main(void) { @@ -70,4 +71,5 @@ } +/** Perform sparc64 specific initialization before mm is initialized. */ void arch_pre_mm_init(void) { @@ -76,8 +78,14 @@ } +/** Perform sparc64 specific initialization afterr mm is initialized. */ void arch_post_mm_init(void) { if (config.cpu_active == 1) { - irq_init(1<<11, 128); + /* + * We have 2^11 different interrupt vectors. + * But we only create 128 buckets. + */ + irq_init(1 << 11, 128); + standalone_sparc64_console_init(); } Index: kernel/generic/include/macros.h =================================================================== --- kernel/generic/include/macros.h (revision 1ecdbb0a73519ade1b15b6c908b07dfce755b6cc) +++ kernel/generic/include/macros.h (revision 771cd22b02d9fec4d7d601d12b2979a07abb50db) @@ -39,10 +39,11 @@ #include -#define is_digit(d) (((d) >= '0') && ((d) <= '9')) -#define is_lower(c) (((c) >= 'a') && ((c) <= 'z')) -#define is_upper(c) (((c) >= 'A') && ((c) <= 'Z')) -#define is_alpha(c) (is_lower(c) || is_upper(c)) -#define is_alphanum(c) (is_alpha(c) || is_digit(c)) -#define is_white(c) (((c) == ' ') || ((c) == '\t') || ((c) == '\n') || ((c) == '\r')) +#define is_digit(d) (((d) >= '0') && ((d) <= '9')) +#define is_lower(c) (((c) >= 'a') && ((c) <= 'z')) +#define is_upper(c) (((c) >= 'A') && ((c) <= 'Z')) +#define is_alpha(c) (is_lower(c) || is_upper(c)) +#define is_alphanum(c) (is_alpha(c) || is_digit(c)) +#define is_white(c) (((c) == ' ') || ((c) == '\t') || ((c) == '\n') || \ + ((c) == '\r')) #define min(a,b) ((a) < (b) ? (a) : (b)) Index: kernel/generic/src/main/main.c =================================================================== --- kernel/generic/src/main/main.c (revision 1ecdbb0a73519ade1b15b6c908b07dfce755b6cc) +++ kernel/generic/src/main/main.c (revision 771cd22b02d9fec4d7d601d12b2979a07abb50db) @@ -127,5 +127,5 @@ #endif -#define CONFIG_STACK_SIZE ((1<count, ((zone->count) * FRAME_SIZE) >> 10); printf("Allocated space: %zd frames (%zdK)\n", zone->busy_count, (zone->busy_count * FRAME_SIZE) >> 10); - printf("Available space: %zd (%zdK)\n", zone->free_count, (zone->free_count * FRAME_SIZE) >> 10); + printf("Available space: %zd frames (%zdK)\n", zone->free_count, (zone->free_count * FRAME_SIZE) >> 10); buddy_system_structure_print(zone->buddy_system, FRAME_SIZE); Index: kernel/generic/src/proc/task.c =================================================================== --- kernel/generic/src/proc/task.c (revision 1ecdbb0a73519ade1b15b6c908b07dfce755b6cc) +++ kernel/generic/src/proc/task.c (revision 771cd22b02d9fec4d7d601d12b2979a07abb50db) @@ -269,5 +269,5 @@ /** Get accounting data of given task. * - * Note that task_lock on @t must be already held and + * Note that task lock of 't' must be already held and * interrupts must be already disabled. *