Index: uspace/drv/char/pl050/pl050.c =================================================================== --- uspace/drv/char/pl050/pl050.c (revision a4666a90e38ea07492ac4719916a100afae65c16) +++ uspace/drv/char/pl050/pl050.c (revision 75fe97b8311c155507b6ade3784b25bdbace2f5e) @@ -32,4 +32,5 @@ #include +#include #include #include @@ -39,11 +40,9 @@ #include #include +#include + +#include "pl050_hw.h" #define NAME "pl050" - -#define PL050_STAT 4 -#define PL050_DATA 8 - -#define PL050_STAT_RXFULL (1 << 4) enum { @@ -77,4 +76,5 @@ async_sess_t *parent_sess; ddf_dev_t *dev; + char *name; ddf_fun_t *fun_a; @@ -83,4 +83,5 @@ uintptr_t iobase; size_t iosize; + kmi_regs_t *regs; uint8_t buffer[buffer_size]; size_t buf_rp; @@ -105,5 +106,5 @@ { .cmd = CMD_AND, - .value = PL050_STAT_RXFULL, + .value = BIT_V(uint8_t, kmi_stat_rxfull), .srcarg = 1, .dstarg = 3 @@ -159,4 +160,5 @@ { hw_res_list_parsed_t res; + void *regs; int rc; @@ -190,6 +192,7 @@ pl050_irq_code.ranges[0].base = pl050->iobase; - pl050_irq_code.cmds[0].addr = (void *) pl050->iobase + PL050_STAT; - pl050_irq_code.cmds[3].addr = (void *) pl050->iobase + PL050_DATA; + kmi_regs_t *regsphys = (kmi_regs_t *) pl050->iobase; + pl050_irq_code.cmds[0].addr = ®sphys->stat; + pl050_irq_code.cmds[3].addr = ®sphys->data; if (res.irqs.count != 1) { @@ -202,4 +205,12 @@ res.irqs.irqs[0]); + rc = pio_enable((void *)pl050->iobase, sizeof(kmi_regs_t), ®s); + if (rc != EOK) { + ddf_msg(LVL_ERROR, "Error enabling PIO"); + goto error; + } + + pl050->regs = regs; + rc = register_interrupt_handler(pl050->dev, res.irqs.irqs[0], pl050_interrupt, &pl050_irq_code); @@ -209,4 +220,14 @@ goto error; } + + rc = irc_enable_interrupt(res.irqs.irqs[0]); + if (rc != EOK) { + ddf_msg(LVL_ERROR, "Failed enabling interrupt. (%d)", rc); + goto error; + } + + pio_write_8(&pl050->regs->cr, + BIT_V(uint8_t, kmi_cr_enable) | + BIT_V(uint8_t, kmi_cr_rxintr)); return EOK; @@ -220,4 +241,5 @@ uint8_t *bp = buffer; size_t left; + fibril_mutex_lock(&pl050->buf_lock); @@ -238,4 +260,20 @@ static int pl050_write(chardev_srv_t *srv, const void *data, size_t size) { + pl050_t *pl050 = (pl050_t *)srv->srvs->sarg; + uint8_t *dp = (uint8_t *)data; + uint8_t status; + size_t i; + + ddf_msg(LVL_NOTE, "%s/pl050_write(%zu bytes)", pl050->name, size); + for (i = 0; i < size; i++) { + while (true) { + status = pio_read_8(&pl050->regs->stat); + if ((status & BIT_V(uint8_t, kmi_stat_txempty)) != 0) + break; + } + pio_write_8(&pl050->regs->data, dp[i]); + } + ddf_msg(LVL_NOTE, "%s/pl050_write() success", pl050->name); + return size; } @@ -252,5 +290,6 @@ { ddf_fun_t *fun_a; - pl050_t *pl050; + pl050_t *pl050 = NULL; + const char *mname; int rc; @@ -264,4 +303,10 @@ } + pl050->name = (char *)ddf_dev_get_name(dev); + if (pl050->name == NULL) { + rc = ENOMEM; + goto error; + } + fun_a = ddf_fun_create(dev, fun_inner, "a"); if (fun_a == NULL) { @@ -278,5 +323,10 @@ goto error; - rc = ddf_fun_add_match_id(fun_a, "char/xtkbd", 10); + if (str_cmp(pl050->name, "kbd") == 0) + mname = "char/xtkbd"; + else + mname = "char/ps2mouse"; + + rc = ddf_fun_add_match_id(fun_a, mname, 10); if (rc != EOK) { ddf_msg(LVL_ERROR, "Failed adding match IDs to function %s", @@ -284,5 +334,4 @@ goto error; } - chardev_srvs_init(&pl050->cds); @@ -302,4 +351,6 @@ return EOK; error: + if (pl050 != NULL) + free(pl050->name); return rc; } Index: uspace/drv/char/pl050/pl050_hw.h =================================================================== --- uspace/drv/char/pl050/pl050_hw.h (revision 75fe97b8311c155507b6ade3784b25bdbace2f5e) +++ uspace/drv/char/pl050/pl050_hw.h (revision 75fe97b8311c155507b6ade3784b25bdbace2f5e) @@ -0,0 +1,92 @@ +/* + * Copyright (c) 2009 Vineeth Pillai + * Copyright (c) 2014 Jiri Svoboda + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup pl050 + * @{ + */ +/** @file ARM PrimeCell PS2 Keyboard/Mouse Interface (PL050) registers + */ + +#ifndef PL050_HW_H +#define PL050_HW_H + +#include + +typedef struct { + /** Control register */ + uint8_t cr; + /** Padding */ + uint8_t pad1[3]; + /** Status register */ + uint8_t stat; + /** Padding */ + uint8_t pad5[3]; + /** Received data */ + uint8_t data; + /** Padding */ + uint8_t pad9[3]; + /** Clock divisor */ + uint8_t clkdiv; + /** Padding */ + uint8_t pad13[3]; + /** Interrupt status register */ + uint8_t ir; + /** Padding */ + uint8_t pad17[3]; +} kmi_regs_t; + +typedef enum { + /** 0 = PS2 mode, 1 = No line control bit mode */ + kmi_cr_type = 5, + /** Enable receiver interrupt */ + kmi_cr_rxintr = 4, + /** Enable transmitter interrupt */ + kmi_cr_txintr = 3, + /** Enable PrimeCell KMI */ + kmi_cr_enable = 2, + /** Force KMI data LOW */ + kmi_cr_forcedata = 1, + /** Force KMI clock LOW */ + kmi_cr_forceclock = 0 +} kmi_cr_bits_t; + +typedef enum { + kmi_stat_txempty = 6, + kmi_stat_txbusy = 5, + kmi_stat_rxfull = 4, + kmi_stat_rxbusy = 3, + kmi_stat_rxparity = 2, + kmi_stat_clkin = 1, + kmi_stat_datain = 0 +} kmi_stat_bits_t; + +#endif + +/** @} + */ Index: uspace/drv/platform/icp/icp.c =================================================================== --- uspace/drv/platform/icp/icp.c (revision a4666a90e38ea07492ac4719916a100afae65c16) +++ uspace/drv/platform/icp/icp.c (revision 75fe97b8311c155507b6ade3784b25bdbace2f5e) @@ -51,5 +51,7 @@ enum { icp_kbd_base = 0x18000000, - icp_kbd_irq = 3 + icp_kbd_irq = 3, + icp_mouse_base = 0x19000000, + icp_mouse_irq = 4 }; @@ -69,5 +71,5 @@ }; -static hw_resource_t icp_pl050_res[] = { +static hw_resource_t icp_kbd_res[] = { { .type = MEM_RANGE, @@ -87,4 +89,22 @@ }; +static hw_resource_t icp_mouse_res[] = { + { + .type = MEM_RANGE, + .res.mem_range = { + .address = icp_mouse_base, + .size = 9, + .relative = false, + .endianness = LITTLE_ENDIAN + } + }, + { + .type = INTERRUPT, + .res.interrupt = { + .irq = icp_mouse_irq + } + } +}; + static pio_window_t icp_pio_window = { .mem = { @@ -94,8 +114,15 @@ }; -static icp_fun_t icp_pl050_fun_proto = { +static icp_fun_t icp_kbd_fun_proto = { .hw_resources = { - sizeof(icp_pl050_res) / sizeof(icp_pl050_res[0]), - icp_pl050_res + sizeof(icp_kbd_res) / sizeof(icp_kbd_res[0]), + icp_kbd_res + }, +}; + +static icp_fun_t icp_mouse_fun_proto = { + .hw_resources = { + sizeof(icp_mouse_res) / sizeof(icp_mouse_res[0]), + icp_mouse_res }, }; @@ -188,5 +215,15 @@ static int icp_add_functions(ddf_dev_t *dev) { - return icp_add_fun(dev, "pl050", "arm/pl050", &icp_pl050_fun_proto); + int rc; + + rc = icp_add_fun(dev, "kbd", "arm/pl050", &icp_kbd_fun_proto); + if (rc != EOK) + return rc; + + rc = icp_add_fun(dev, "mouse", "arm/pl050", &icp_mouse_fun_proto); + if (rc != EOK) + return rc; + + return EOK; }