Changeset 75e1db0 in mainline for arch/sparc64/src


Ignore:
Timestamp:
2005-12-19T22:41:07Z (20 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
d6e8529
Parents:
031e264
Message:

sparc64 work.
Implement interrupt_disable(), interrupt_enable(), interrupt_restore() and interrupt_read() functions.
Fix context save/restore to save/restore register %i7.

Location:
arch/sparc64/src
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • arch/sparc64/src/context.S

    r031e264 r75e1db0  
    5252        stx %sp, [\r + OFFSET_SP]
    5353        stx %fp, [\r + OFFSET_FP]
     54        stx %i7, [\r + OFFSET_I7]
    5455.endm
    5556
    … …  
    6364        ldx [\r + OFFSET_SP], %sp
    6465        ldx [\r + OFFSET_FP], %fp
     66        ldx [\r + OFFSET_I7], %i7
    6567.endm
    6668

  • arch/sparc64/src/dummy.s

    r031e264 r75e1db0  
    5959userspace:
    6060
    61 
    6261dummy:
    63 0:
    6462        retl
    6563        nop
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