Index: kernel/arch/ia32xen/include/asm.h
===================================================================
--- kernel/arch/ia32xen/include/asm.h	(revision df4ed852a2d1b242f9bdce0a873009a2cb77cec7)
+++ kernel/arch/ia32xen/include/asm.h	(revision 726e1043bcec8878ef81123f08f4dd7dc7d8e58f)
@@ -60,5 +60,5 @@
     { \
 	unative_t res; \
-	__asm__ volatile ("movl %%" #reg ", %0" : "=r" (res) ); \
+	asm volatile ("movl %%" #reg ", %0" : "=r" (res) ); \
 	return res; \
     }
@@ -66,5 +66,5 @@
 #define GEN_WRITE_REG(reg) static inline void write_ ##reg (unative_t regn) \
     { \
-	__asm__ volatile ("movl %0, %%" #reg : : "r" (regn)); \
+	asm volatile ("movl %0, %%" #reg : : "r" (regn)); \
     }
 
@@ -93,5 +93,5 @@
  * @param val Value to write
  */
-static inline void outb(uint16_t port, uint8_t val) { __asm__ volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }
+static inline void outb(uint16_t port, uint8_t val) { asm volatile ("outb %b0, %w1\n" : : "a" (val), "d" (port) ); }
 
 /** Word to port
@@ -102,5 +102,5 @@
  * @param val Value to write
  */
-static inline void outw(uint16_t port, uint16_t val) { __asm__ volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) ); }
+static inline void outw(uint16_t port, uint16_t val) { asm volatile ("outw %w0, %w1\n" : : "a" (val), "d" (port) ); }
 
 /** Double word to port
@@ -111,5 +111,5 @@
  * @param val Value to write
  */
-static inline void outl(uint16_t port, uint32_t val) { __asm__ volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) ); }
+static inline void outl(uint16_t port, uint32_t val) { asm volatile ("outl %l0, %w1\n" : : "a" (val), "d" (port) ); }
 
 /** Byte from port
@@ -120,5 +120,5 @@
  * @return Value read
  */
-static inline uint8_t inb(uint16_t port) { uint8_t val; __asm__ volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) ); return val; }
+static inline uint8_t inb(uint16_t port) { uint8_t val; asm volatile ("inb %w1, %b0 \n" : "=a" (val) : "d" (port) ); return val; }
 
 /** Word from port
@@ -129,5 +129,5 @@
  * @return Value read
  */
-static inline uint16_t inw(uint16_t port) { uint16_t val; __asm__ volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port) ); return val; }
+static inline uint16_t inw(uint16_t port) { uint16_t val; asm volatile ("inw %w1, %w0 \n" : "=a" (val) : "d" (port) ); return val; }
 
 /** Double word from port
@@ -138,5 +138,5 @@
  * @return Value read
  */
-static inline uint32_t inl(uint16_t port) { uint32_t val; __asm__ volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) ); return val; }
+static inline uint32_t inl(uint16_t port) { uint32_t val; asm volatile ("inl %w1, %l0 \n" : "=a" (val) : "d" (port) ); return val; }
 
 /** Enable interrupts.
@@ -214,5 +214,5 @@
 	uintptr_t v;
 	
-	__asm__ volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
+	asm volatile ("andl %%esp, %0\n" : "=r" (v) : "0" (~(STACK_SIZE-1)));
 	
 	return v;
@@ -224,5 +224,5 @@
 	uintptr_t *ip;
 
-	__asm__ volatile (
+	asm volatile (
 		"mov %%eip, %0"
 		: "=r" (ip)
@@ -237,5 +237,5 @@
 static inline void invlpg(uintptr_t addr)
 {
-	__asm__ volatile ("invlpg %0\n" :: "m" (*(unative_t *)addr));
+	asm volatile ("invlpg %0\n" :: "m" (*(unative_t *)addr));
 }
 
@@ -246,5 +246,5 @@
 static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
 {
-	__asm__ volatile ("lgdtl %0\n" : : "m" (*gdtr_reg));
+	asm volatile ("lgdtl %0\n" : : "m" (*gdtr_reg));
 }
 
@@ -255,5 +255,5 @@
 static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
 {
-	__asm__ volatile ("sgdtl %0\n" : : "m" (*gdtr_reg));
+	asm volatile ("sgdtl %0\n" : : "m" (*gdtr_reg));
 }
 
@@ -264,5 +264,5 @@
 static inline void tr_load(uint16_t sel)
 {
-	__asm__ volatile ("ltr %0" : : "r" (sel));
+	asm volatile ("ltr %0" : : "r" (sel));
 }