Index: boot/arch/arm32/src/mm.c
===================================================================
--- boot/arch/arm32/src/mm.c	(revision 4d025952fba86b075c33aabe0c38a66d3bc62206)
+++ boot/arch/arm32/src/mm.c	(revision 708ec6055caafd4c69e064032b4399f562dc07b3)
@@ -105,11 +105,29 @@
 		/* Behave as a client of domains */
 		"ldr r0, =0x55555555\n"
-		"mcr p15, 0, r0, c3, c0, 0\n" 
+		"mcr p15, 0, r0, c3, c0, 0\n"
 		
+#ifdef PROCESSOR_armv7
+		/* Clean L2 cache */
+		"mov r12, #0x1\n"   //set up to invalidate L2
+		"smc #0\n"  //Call SMI monitor
+		
+		/* Read Auxiliary control register */
+		"mrc p15, 0, r0, c1, c0, 1\n"
+		/* Mask to enable L2 cache */
+		"ldr r1, =0x00000002\n"
+		"orr r0, r0, r1\n"
+		/* Store Auxiliary control register */
+		"mrc p15, 0, r0, c1, c0, 1\n"
+#endif
 		/* Current settings */
 		"mrc p15, 0, r0, c1, c0, 0\n"
 		
+#ifdef PROCESSOR_armv7
 		/* Mask to enable paging, alignment and caching */
 		"ldr r1, =0x00000007\n"
+#else
+		/* Mask to enable paging */
+		"ldr r1, =0x00000001\n"
+#endif
 		"orr r0, r0, r1\n"