Index: kernel/arch/arm32/include/arch.h =================================================================== --- kernel/arch/arm32/include/arch.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,62 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Empty. - */ - -#ifndef KERN_arm32_ARCH_H_ -#define KERN_arm32_ARCH_H_ - -#define TASKMAP_MAX_RECORDS 32 -#define CPUMAP_MAX_RECORDS 32 - -#define BOOTINFO_TASK_NAME_BUFLEN 32 - -#include - -typedef struct { - void *addr; - size_t size; - char name[BOOTINFO_TASK_NAME_BUFLEN]; -} utask_t; - -typedef struct { - size_t cnt; - utask_t tasks[TASKMAP_MAX_RECORDS]; -} bootinfo_t; - -extern void arch_pre_main(void *entry, bootinfo_t *bootinfo); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/arch/arch.h =================================================================== --- kernel/arch/arm32/include/arch/arch.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/arch.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Empty. + */ + +#ifndef KERN_arm32_ARCH_H_ +#define KERN_arm32_ARCH_H_ + +#define TASKMAP_MAX_RECORDS 32 +#define CPUMAP_MAX_RECORDS 32 + +#define BOOTINFO_TASK_NAME_BUFLEN 32 + +#include + +typedef struct { + void *addr; + size_t size; + char name[BOOTINFO_TASK_NAME_BUFLEN]; +} utask_t; + +typedef struct { + size_t cnt; + utask_t tasks[TASKMAP_MAX_RECORDS]; +} bootinfo_t; + +extern void arch_pre_main(void *entry, bootinfo_t *bootinfo); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/asm.h =================================================================== --- kernel/arch/arm32/include/arch/asm.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/asm.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,108 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Declarations of functions implemented in assembly. + */ + +#ifndef KERN_arm32_ASM_H_ +#define KERN_arm32_ASM_H_ + +#include +#include +#include +#include +#include + +/** No such instruction on ARM to sleep CPU. */ +NO_TRACE static inline void cpu_sleep(void) +{ +} + +NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) +{ + *port = v; +} + +NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) +{ + *port = v; +} + +NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) +{ + *port = v; +} + +NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) +{ + return *port; +} + +NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) +{ + return *port; +} + +NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) +{ + return *port; +} + +/** Return base address of current stack. + * + * Return the base address of the current stack. + * The stack is assumed to be STACK_SIZE bytes long. + * The stack must start on page boundary. + * + */ +NO_TRACE static inline uintptr_t get_stack_base(void) +{ + uintptr_t v; + + asm volatile ( + "and %[v], sp, %[size]\n" + : [v] "=r" (v) + : [size] "r" (~(STACK_SIZE - 1)) + ); + + return v; +} + +extern void cpu_halt(void) __attribute__((noreturn)); +extern void asm_delay_loop(uint32_t t); +extern void userspace_asm(uintptr_t ustack, uintptr_t uspace_uarg, + uintptr_t entry); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/asm/boot.h =================================================================== --- kernel/arch/arm32/include/arch/asm/boot.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/asm/boot.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Initial kernel start. + */ + +#ifndef KERN_arm32_ASM_BOOT_H_ +#define KERN_arm32_ASM_BOOT_H_ + +/** Size of a temporary stack used for initial kernel start. */ +#define TEMP_STACK_SIZE 0x100 + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/atomic.h =================================================================== --- kernel/arch/arm32/include/arch/atomic.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/atomic.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,131 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Atomic operations. + */ + +#ifndef KERN_arm32_ATOMIC_H_ +#define KERN_arm32_ATOMIC_H_ + +#include +#include + +/** Atomic addition. + * + * @param val Where to add. + * @param i Value to be added. + * + * @return Value after addition. + * + */ +NO_TRACE static inline atomic_count_t atomic_add(atomic_t *val, + atomic_count_t i) +{ + /* + * This implementation is for UP pre-ARMv6 systems where we do not have + * the LDREX and STREX instructions. + */ + ipl_t ipl = interrupts_disable(); + val->count += i; + atomic_count_t ret = val->count; + interrupts_restore(ipl); + + return ret; +} + +/** Atomic increment. + * + * @param val Variable to be incremented. + * + */ +NO_TRACE static inline void atomic_inc(atomic_t *val) +{ + atomic_add(val, 1); +} + +/** Atomic decrement. + * + * @param val Variable to be decremented. + * + */ +NO_TRACE static inline void atomic_dec(atomic_t *val) { + atomic_add(val, -1); +} + +/** Atomic pre-increment. + * + * @param val Variable to be incremented. + * @return Value after incrementation. + * + */ +NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val) +{ + return atomic_add(val, 1); +} + +/** Atomic pre-decrement. + * + * @param val Variable to be decremented. + * @return Value after decrementation. + * + */ +NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val) +{ + return atomic_add(val, -1); +} + +/** Atomic post-increment. + * + * @param val Variable to be incremented. + * @return Value before incrementation. + * + */ +NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) +{ + return atomic_add(val, 1) - 1; +} + +/** Atomic post-decrement. + * + * @param val Variable to be decremented. + * @return Value before decrementation. + * + */ +NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) +{ + return atomic_add(val, -1) + 1; +} + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/barrier.h =================================================================== --- kernel/arch/arm32/include/arch/barrier.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/barrier.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Memory barriers. + */ + +#ifndef KERN_arm32_BARRIER_H_ +#define KERN_arm32_BARRIER_H_ + +/* + * TODO: implement true ARM memory barriers for macros below. + */ +#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") +#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") + +#define memory_barrier() asm volatile ("" ::: "memory") +#define read_barrier() asm volatile ("" ::: "memory") +#define write_barrier() asm volatile ("" ::: "memory") + +#define smc_coherence(a) +#define smc_coherence_block(a, l) + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/context.h =================================================================== --- kernel/arch/arm32/include/arch/context.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/context.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,82 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Thread context. + */ + +#ifndef KERN_arm32_CONTEXT_H_ +#define KERN_arm32_CONTEXT_H_ + +#include +#include + +/* Put one item onto the stack to support get_stack_base() and align it up. */ +#define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) + +#define context_set(c, _pc, stack, size) \ + do { \ + (c)->pc = (uintptr_t) (_pc); \ + (c)->sp = ((uintptr_t) (stack)) + (size) - SP_DELTA; \ + (c)->fp = 0; \ + } while (0) + +#ifndef __ASM__ + +#include + +/** Thread context containing registers that must be preserved across function + * calls. + */ +typedef struct { + uint32_t cpu_mode; + uintptr_t sp; + uintptr_t pc; + + uint32_t r4; + uint32_t r5; + uint32_t r6; + uint32_t r7; + uint32_t r8; + uint32_t r9; + uint32_t r10; + uint32_t fp; /* r11 */ + + ipl_t ipl; +} context_t; + + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/cpu.h =================================================================== --- kernel/arch/arm32/include/arch/cpu.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/cpu.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief CPU identification. + */ + +#ifndef KERN_arm32_CPU_H_ +#define KERN_arm32_CPU_H_ + +#include +#include + + +/** Struct representing ARM CPU identifiaction. */ +typedef struct { + /** Implementator (vendor) number. */ + uint32_t imp_num; + + /** Variant number. */ + uint32_t variant_num; + + /** Architecture number. */ + uint32_t arch_num; + + /** Primary part number. */ + uint32_t prim_part_num; + + /** Revision number. */ + uint32_t rev_num; +} cpu_arch_t; + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/cycle.h =================================================================== --- kernel/arch/arm32/include/arch/cycle.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/cycle.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,56 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Count of CPU cycles. + */ + +#ifndef KERN_arm32_CYCLE_H_ +#define KERN_arm32_CYCLE_H_ + +#include + +/** Return count of CPU cycles. + * + * No such instruction on ARM to get count of cycles. + * + * @return Count of CPU cycles. + * + */ +NO_TRACE static inline uint64_t get_cycle(void) +{ + return 0; +} + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/elf.h =================================================================== --- kernel/arch/arm32/include/arch/elf.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/elf.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,52 @@ +/* + * Copyright (c) 2006 Sergey Bondari + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief ARM ELF constants. + */ + +#ifndef KERN_arm32_ELF_H_ +#define KERN_arm32_ELF_H_ + +#define ELF_MACHINE EM_ARM + +#ifdef __BE__ + #define ELF_DATA_ENCODING ELFDATA2MSB +#else + #define ELF_DATA_ENCODING ELFDATA2LSB +#endif + +#define ELF_CLASS ELFCLASS32 + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/exception.h =================================================================== --- kernel/arch/arm32/include/arch/exception.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/exception.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,99 @@ +/* + * Copyright (c) 2007 Michal Kebrt, Petr Stepan + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Exception declarations. + */ + +#ifndef KERN_arm32_EXCEPTION_H_ +#define KERN_arm32_EXCEPTION_H_ + +#include +#include + +/** If defined, forces using of high exception vectors. */ +#define HIGH_EXCEPTION_VECTORS + +#ifdef HIGH_EXCEPTION_VECTORS + #define EXC_BASE_ADDRESS 0xffff0000 +#else + #define EXC_BASE_ADDRESS 0x0 +#endif + +/* Exception Vectors */ +#define EXC_RESET_VEC (EXC_BASE_ADDRESS + 0x0) +#define EXC_UNDEF_INSTR_VEC (EXC_BASE_ADDRESS + 0x4) +#define EXC_SWI_VEC (EXC_BASE_ADDRESS + 0x8) +#define EXC_PREFETCH_ABORT_VEC (EXC_BASE_ADDRESS + 0xc) +#define EXC_DATA_ABORT_VEC (EXC_BASE_ADDRESS + 0x10) +#define EXC_IRQ_VEC (EXC_BASE_ADDRESS + 0x18) +#define EXC_FIQ_VEC (EXC_BASE_ADDRESS + 0x1c) + +/* Exception numbers */ +#define EXC_RESET 0 +#define EXC_UNDEF_INSTR 1 +#define EXC_SWI 2 +#define EXC_PREFETCH_ABORT 3 +#define EXC_DATA_ABORT 4 +#define EXC_IRQ 5 +#define EXC_FIQ 6 + +/** Kernel stack pointer. + * + * It is set when thread switches to user mode, + * and then used for exception handling. + * + */ +extern uintptr_t supervisor_sp; + +/** Temporary exception stack pointer. + * + * Temporary stack is used in exceptions handling routines + * before switching to thread's kernel stack. + * + */ +extern uintptr_t exc_stack; + +extern void install_exception_handlers(void); +extern void exception_init(void); +extern void reset_exception_entry(void); +extern void irq_exception_entry(void); +extern void fiq_exception_entry(void); +extern void undef_instr_exception_entry(void); +extern void prefetch_abort_exception_entry(void); +extern void data_abort_exception_entry(void); +extern void swi_exception_entry(void); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/faddr.h =================================================================== --- kernel/arch/arm32/include/arch/faddr.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/faddr.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Function address conversion. + */ + +#ifndef KERN_arm32_FADDR_H_ +#define KERN_arm32_FADDR_H_ + +#include + +/** Calculate absolute address of function referenced by fptr pointer. + * + * @param fptr Function pointer. + * + */ +#define FADDR(fptr) ((uintptr_t) (fptr)) + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/fpu_context.h =================================================================== --- kernel/arch/arm32/include/arch/fpu_context.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/fpu_context.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief FPU context (not implemented). + * + * GXemul doesn't support FPU on its ARM CPU. + */ + +#ifndef KERN_arm32_FPU_CONTEXT_H_ +#define KERN_arm32_FPU_CONTEXT_H_ + +#include + +#define FPU_CONTEXT_ALIGN 0 + +typedef struct { +} fpu_context_t; + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/interrupt.h =================================================================== --- kernel/arch/arm32/include/arch/interrupt.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/interrupt.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32interrupt + * @{ + */ +/** @file + * @brief Declarations of interrupt controlling routines. + */ + +#ifndef KERN_arm32_INTERRUPT_H_ +#define KERN_arm32_INTERRUPT_H_ + +#include +#include + +/** Initial size of exception dispatch table. */ +#define IVT_ITEMS 6 + +/** Index of the first item in exception dispatch table. */ +#define IVT_FIRST 0 + +extern void interrupt_init(void); +extern ipl_t interrupts_disable(void); +extern ipl_t interrupts_enable(void); +extern void interrupts_restore(ipl_t ipl); +extern ipl_t interrupts_read(void); +extern bool interrupts_disabled(void); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/istate.h =================================================================== --- kernel/arch/arm32/include/arch/istate.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/istate.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,105 @@ +/* + * Copyright (c) 2007 Michal Kebrt, Petr Stepan + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32interrupt + * @{ + */ + +#ifndef KERN_arm32_ISTATE_H_ +#define KERN_arm32_ISTATE_H_ + +#include + +#ifdef KERNEL + +#include + +#else /* KERNEL */ + +#include + +#endif /* KERNEL */ + +/** Struct representing CPU state saved when an exception occurs. */ +typedef struct istate { + uint32_t dummy; + uint32_t spsr; + uint32_t sp; + uint32_t lr; + + uint32_t r0; + uint32_t r1; + uint32_t r2; + uint32_t r3; + uint32_t r4; + uint32_t r5; + uint32_t r6; + uint32_t r7; + uint32_t r8; + uint32_t r9; + uint32_t r10; + uint32_t fp; + uint32_t r12; + + uint32_t pc; +} istate_t; + +/** Set Program Counter member of given istate structure. + * + * @param istate istate structure + * @param retaddr new value of istate's PC member + * + */ +NO_TRACE static inline void istate_set_retaddr(istate_t *istate, + uintptr_t retaddr) +{ + istate->pc = retaddr; +} + +/** Return true if exception happened while in userspace. */ +NO_TRACE static inline int istate_from_uspace(istate_t *istate) +{ + return (istate->spsr & STATUS_REG_MODE_MASK) == USER_MODE; +} + +/** Return Program Counter member of given istate structure. */ +NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) +{ + return istate->pc; +} + +NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) +{ + return istate->fp; +} + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mach/gta02/gta02.h =================================================================== --- kernel/arch/arm32/include/arch/mach/gta02/gta02.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/mach/gta02/gta02.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2010 Jiri Svoboda + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32gta02 GTA02 + * @brief Openmoko GTA02 platform. + * @ingroup arm32 + * @{ + */ +/** @file + * @brief Openmoko GTA02 platform driver. + */ + +#ifndef KERN_arm32_gta02_H_ +#define KERN_arm32_gta02_H_ + +#include + +extern struct arm_machine_ops gta02_machine_ops; + +/** Size of GTA02 IRQ number range (starting from 0) */ +#define GTA02_IRQ_COUNT 32 + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mach/integratorcp/integratorcp.h =================================================================== --- kernel/arch/arm32/include/arch/mach/integratorcp/integratorcp.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/mach/integratorcp/integratorcp.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,118 @@ +/* + * Copyright (c) 2009 Vineeth Pillai + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32integratorcp + * @brief Integratorcp machine specific parts. + * @ingroup arm32 + * @{ + */ +/** @file + * @brief Integratorcp peripheries drivers declarations. + */ + +#ifndef KERN_arm32_icp_H_ +#define KERN_arm32_icp_H_ + +#include + +/** Last interrupt number (beginning from 0) whose status is probed + * from interrupt controller + */ +#define ICP_IRQC_MAX_IRQ 8 +#define ICP_KBD_IRQ 3 +#define ICP_TIMER_IRQ 6 + +/** Timer frequency */ +#define ICP_TIMER_FREQ 10000 + +#define ICP_UART 0x16000000 +#define ICP_KBD 0x18000000 +#define ICP_KBD_STAT 0x04 +#define ICP_KBD_DATA 0x08 +#define ICP_KBD_INTR_STAT 0x10 +#define ICP_RTC 0x13000000 +#define ICP_RTC1_LOAD_OFFSET 0x100 +#define ICP_RTC1_READ_OFFSET 0x104 +#define ICP_RTC1_CTL_OFFSET 0x108 +#define ICP_RTC1_INTRCLR_OFFSET 0x10C +#define ICP_RTC1_INTRSTAT_OFFSET 0x114 +#define ICP_RTC1_BGLOAD_OFFSET 0x118 +#define ICP_RTC_CTL_VALUE 0x00E2 +#define ICP_IRQC 0x14000000 +#define ICP_IRQC_MASK_OFFSET 0xC +#define ICP_IRQC_UNMASK_OFFSET 0x8 +#define ICP_FB 0x00800000 +#define ICP_FB_FRAME (ICP_FB >> 12) +#define ICP_FB_NUM_FRAME 512 +#define ICP_VGA 0xC0000000 +#define ICP_CMCR 0x10000000 +#define ICP_SDRAM_MASK 0x1C +#define ICP_SDRAMCR_OFFSET 0x20 + +typedef struct { + uintptr_t uart; + uintptr_t kbd_ctrl; + uintptr_t kbd_stat; + uintptr_t kbd_data; + uintptr_t kbd_intstat; + uintptr_t rtc; + uintptr_t rtc1_load; + uintptr_t rtc1_read; + uintptr_t rtc1_ctl; + uintptr_t rtc1_intrclr; + uintptr_t rtc1_intrstat; + uintptr_t rtc1_bgload; + uintptr_t irqc; + uintptr_t irqc_mask; + uintptr_t irqc_unmask; + uintptr_t vga; + uintptr_t cmcr; + uintptr_t sdramcr; +} icp_hw_map_t; + + +extern void icp_init(void); +extern void icp_output_init(void); +extern void icp_input_init(void); +extern void icp_timer_irq_start(void); +extern void icp_cpu_halt(void); +extern void icp_irq_exception(unsigned int, istate_t *); +extern void icp_get_memory_extents(uintptr_t *, size_t *); +extern void icp_frame_init(void); +extern size_t icp_get_irq_count(void); +extern const char *icp_get_platform_name(void); + +extern struct arm_machine_ops icp_machine_ops; + +/** Size of IntegratorCP IRQ number range (starting from 0) */ +#define ICP_IRQ_COUNT 8 + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mach/testarm/testarm.h =================================================================== --- kernel/arch/arm32/include/arch/mach/testarm/testarm.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/mach/testarm/testarm.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,83 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * Copyright (c) 2009 Vineeth Pillai + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32gxemul GXemul + * @brief GXemul machine specific parts. + * @ingroup arm32 + * @{ + */ +/** @file + * @brief GXemul peripheries drivers declarations. + */ + +#ifndef KERN_arm32_testarm_H_ +#define KERN_arm32_testarm_H_ + +#include + +/** Size of GXemul IRQ number range (starting from 0) */ +#define GXEMUL_IRQ_COUNT 32 +#define GXEMUL_KBD_IRQ 2 +#define GXEMUL_TIMER_IRQ 4 + +/** Timer frequency */ +#define GXEMUL_TIMER_FREQ 100 + +#define GXEMUL_KBD_ADDRESS 0x10000000 +#define GXEMUL_MP_ADDRESS 0x11000000 +#define GXEMUL_FB_ADDRESS 0x12000000 +#define GXEMUL_RTC_ADDRESS 0x15000000 +#define GXEMUL_IRQC_ADDRESS 0x16000000 + +extern void *gxemul_kbd; +extern void *gxemul_rtc; +extern void *gxemul_irqc; + +#define GXEMUL_HALT_OFFSET 0x010 +#define GXEMUL_RTC_FREQ_OFFSET 0x100 +#define GXEMUL_MP_MEMSIZE_OFFSET 0x090 +#define GXEMUL_RTC_ACK_OFFSET 0x110 + +extern void gxemul_init(void); +extern void gxemul_output_init(void); +extern void gxemul_input_init(void); +extern void gxemul_timer_irq_start(void); +extern void gxemul_cpu_halt(void); +extern void gxemul_irq_exception(unsigned int, istate_t *); +extern void gxemul_get_memory_extents(uintptr_t *, size_t *); +extern void gxemul_frame_init(void); +extern size_t gxemul_get_irq_count(void); +extern const char *gxemul_get_platform_name(void); + +extern struct arm_machine_ops gxemul_machine_ops; + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/machine_func.h =================================================================== --- kernel/arch/arm32/include/arch/machine_func.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/machine_func.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,113 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * Copyright (c) 2009 Vineeth Pillai + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Declarations of machine specific functions. + * + * These functions enable to differentiate more kinds of ARM emulators + * or CPUs. It's the same concept as "arch" functions on the architecture + * level. + */ + +#ifndef KERN_arm32_MACHINE_FUNC_H_ +#define KERN_arm32_MACHINE_FUNC_H_ + +#include +#include +#include + +struct arm_machine_ops { + void (*machine_init)(void); + void (*machine_timer_irq_start)(void); + void (*machine_cpu_halt)(void); + void (*machine_get_memory_extents)(uintptr_t *, size_t *); + void (*machine_irq_exception)(unsigned int, istate_t *); + void (*machine_frame_init)(void); + void (*machine_output_init)(void); + void (*machine_input_init)(void); + size_t (*machine_get_irq_count)(void); + const char *(*machine_get_platform_name)(void); +}; + +/** Pointer to arm_machine_ops structure being used. */ +extern struct arm_machine_ops *machine_ops; + +/** Initialize machine_ops pointer. */ +extern void machine_ops_init(void); + +/** Maps HW devices to the kernel address space using #hw_map. */ +extern void machine_init(void); + + +/** Starts timer. */ +extern void machine_timer_irq_start(void); + + +/** Halts CPU. */ +extern void machine_cpu_halt(void); + +/** Get extents of available memory. + * + * @param start Place to store memory start address. + * @param size Place to store memory size. + */ +extern void machine_get_memory_extents(uintptr_t *start, size_t *size); + +/** Interrupt exception handler. + * + * @param exc_no Interrupt exception number. + * @param istate Saved processor state. + */ +extern void machine_irq_exception(unsigned int exc_no, istate_t *istate); + + +/* + * Machine specific frame initialization + */ +extern void machine_frame_init(void); + +/* + * configure the serial line output device. + */ +extern void machine_output_init(void); + +/* + * configure the serial line input device. + */ +extern void machine_input_init(void); + +extern size_t machine_get_irq_count(void); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mm/as.h =================================================================== --- kernel/arch/arm32/include/arch/mm/as.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/mm/as.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,62 @@ +/* + * Copyright (c) 2007 Pavel Jancik, Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32mm + * @{ + */ +/** @file + * @brief Address space manipulating functions declarations. + */ + +#ifndef KERN_arm32_AS_H_ +#define KERN_arm32_AS_H_ + +#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 + +#define KERNEL_ADDRESS_SPACE_START_ARCH UINT32_C(0x80000000) +#define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0xffffffff) +#define USER_ADDRESS_SPACE_START_ARCH UINT32_C(0x00000000) +#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x7fffffff) + +typedef struct { +} as_arch_t; + +#include + +#define as_constructor_arch(as, flags) (as != as) +#define as_destructor_arch(as) (as != as) +#define as_create_arch(as, flags) (as != as) +#define as_deinstall_arch(as) +#define as_invalidate_translation_cache(as, page, cnt) + +extern void as_arch_init(void); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mm/asid.h =================================================================== --- kernel/arch/arm32/include/arch/mm/asid.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/mm/asid.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2007 Pavel Jancik, Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32mm + * @{ + */ +/** @file + * @brief ASIDs related declarations. + * + * ARM CPUs doesn't support ASIDs. + */ + +#ifndef KERN_arm32_ASID_H_ +#define KERN_arm32_ASID_H_ + +#include + +#define ASID_MAX_ARCH 3 /* minimal required number */ + +typedef uint8_t asid_t; + +/* + * This works due to fact that this file is never included alone but only + * through "generic/include/mm/asid.h" where ASID_START is defined. + */ +#define asid_get() (ASID_START + 1) + +#define asid_put(asid) + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mm/frame.h =================================================================== --- kernel/arch/arm32/include/arch/mm/frame.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/mm/frame.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2007 Pavel Jancik, Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32mm + * @{ + */ +/** @file + * @brief Frame related declarations. + */ + +#ifndef KERN_arm32_FRAME_H_ +#define KERN_arm32_FRAME_H_ + +#define FRAME_WIDTH 12 /* 4KB frames */ +#define FRAME_SIZE (1 << FRAME_WIDTH) + +#ifndef __ASM__ + +#include + +#define BOOT_PAGE_TABLE_SIZE 0x4000 + +#ifdef MACHINE_gta02 +#define BOOT_PAGE_TABLE_ADDRESS 0x30010000 +#else +#define BOOT_PAGE_TABLE_ADDRESS 0x00008000 +#endif + +#define BOOT_PAGE_TABLE_START_FRAME (BOOT_PAGE_TABLE_ADDRESS >> FRAME_WIDTH) +#define BOOT_PAGE_TABLE_SIZE_IN_FRAMES (BOOT_PAGE_TABLE_SIZE >> FRAME_WIDTH) + +#ifdef MACHINE_gta02 +#define PHYSMEM_START_ADDR 0x30008000 +#else +#define PHYSMEM_START_ADDR 0x00000000 +#endif + +extern void frame_low_arch_init(void); +extern void frame_high_arch_init(void); +extern void boot_page_table_free(void); +#define physmem_print() + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mm/km.h =================================================================== --- kernel/arch/arm32/include/arch/mm/km.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/mm/km.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,57 @@ +/* + * Copyright (c) 2011 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32mm + * @{ + */ +/** @file + */ + +#ifndef KERN_arm32_KM_H_ +#define KERN_arm32_KM_H_ + +#include + +#define KM_ARM32_IDENTITY_START UINT32_C(0x80000000) +#define KM_ARM32_IDENTITY_SIZE UINT32_C(0x70000000) + +#define KM_ARM32_NON_IDENTITY_START UINT32_C(0xf0000000) +/* + * The last virtual megabyte contains the high exception vectors (0xFFFF0000). + * Do not include this range into kernel non-identity. + */ +#define KM_ARM32_NON_IDENTITY_SIZE UINT32_C(0x0ff00000) + +extern void km_identity_arch_init(void); +extern void km_non_identity_arch_init(void); +extern bool km_is_non_identity_arch(uintptr_t); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mm/page.h =================================================================== --- kernel/arch/arm32/include/arch/mm/page.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/mm/page.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,342 @@ +/* + * Copyright (c) 2007 Pavel Jancik, Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32mm + * @{ + */ +/** @file + * @brief Paging related declarations. + */ + +#ifndef KERN_arm32_PAGE_H_ +#define KERN_arm32_PAGE_H_ + +#include +#include +#include +#include +#include + +#define PAGE_WIDTH FRAME_WIDTH +#define PAGE_SIZE FRAME_SIZE + +#ifndef __ASM__ +# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) +# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) +#else +# define KA2PA(x) ((x) - 0x80000000) +# define PA2KA(x) ((x) + 0x80000000) +#endif + +/* Number of entries in each level. */ +#define PTL0_ENTRIES_ARCH (1 << 12) /* 4096 */ +#define PTL1_ENTRIES_ARCH 0 +#define PTL2_ENTRIES_ARCH 0 +/* coarse page tables used (256 * 4 = 1KB per page) */ +#define PTL3_ENTRIES_ARCH (1 << 8) /* 256 */ + +/* Page table sizes for each level. */ +#define PTL0_SIZE_ARCH FOUR_FRAMES +#define PTL1_SIZE_ARCH 0 +#define PTL2_SIZE_ARCH 0 +#define PTL3_SIZE_ARCH ONE_FRAME + +/* Macros calculating indices into page tables for each level. */ +#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 20) & 0xfff) +#define PTL1_INDEX_ARCH(vaddr) 0 +#define PTL2_INDEX_ARCH(vaddr) 0 +#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x0ff) + +/* Get PTE address accessors for each level. */ +#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ + ((pte_t *) ((((pte_t *)(ptl0))[(i)].l0).coarse_table_addr << 10)) +#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ + (ptl1) +#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ + (ptl2) +#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ + ((uintptr_t) ((((pte_t *)(ptl3))[(i)].l1).frame_base_addr << 12)) + +/* Set PTE address accessors for each level. */ +#define SET_PTL0_ADDRESS_ARCH(ptl0) \ + (set_ptl0_addr((pte_t *) (ptl0))) +#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ + (((pte_t *) (ptl0))[(i)].l0.coarse_table_addr = (a) >> 10) +#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) +#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) +#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ + (((pte_t *) (ptl3))[(i)].l1.frame_base_addr = (a) >> 12) + +/* Get PTE flags accessors for each level. */ +#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ + get_pt_level0_flags((pte_t *) (ptl0), (size_t) (i)) +#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ + PAGE_PRESENT +#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ + PAGE_PRESENT +#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ + get_pt_level1_flags((pte_t *) (ptl3), (size_t) (i)) + +/* Set PTE flags accessors for each level. */ +#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ + set_pt_level0_flags((pte_t *) (ptl0), (size_t) (i), (x)) +#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) +#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) +#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ + set_pt_level1_flags((pte_t *) (ptl3), (size_t) (i), (x)) + +/* Set PTE present bit accessors for each level. */ +#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ + set_pt_level0_present((pte_t *) (ptl0), (size_t) (i)) +#define SET_PTL2_PRESENT_ARCH(ptl1, i) +#define SET_PTL3_PRESENT_ARCH(ptl2, i) +#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ + set_pt_level1_present((pte_t *) (ptl3), (size_t) (i)) + +/* Macros for querying the last-level PTE entries. */ +#define PTE_VALID_ARCH(pte) \ + (*((uint32_t *) (pte)) != 0) +#define PTE_PRESENT_ARCH(pte) \ + (((pte_t *) (pte))->l0.descriptor_type != 0) +#define PTE_GET_FRAME_ARCH(pte) \ + (((pte_t *) (pte))->l1.frame_base_addr << FRAME_WIDTH) +#define PTE_WRITABLE_ARCH(pte) \ + (((pte_t *) (pte))->l1.access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) +#define PTE_EXECUTABLE_ARCH(pte) \ + 1 + +#ifndef __ASM__ + +/** Level 0 page table entry. */ +typedef struct { + /* 0b01 for coarse tables, see below for details */ + unsigned descriptor_type : 2; + unsigned impl_specific : 3; + unsigned domain : 4; + unsigned should_be_zero : 1; + + /* Pointer to the coarse 2nd level page table (holding entries for small + * (4KB) or large (64KB) pages. ARM also supports fine 2nd level page + * tables that may hold even tiny pages (1KB) but they are bigger (4KB + * per table in comparison with 1KB per the coarse table) + */ + unsigned coarse_table_addr : 22; +} ATTRIBUTE_PACKED pte_level0_t; + +/** Level 1 page table entry (small (4KB) pages used). */ +typedef struct { + + /* 0b10 for small pages */ + unsigned descriptor_type : 2; + unsigned bufferable : 1; + unsigned cacheable : 1; + + /* access permissions for each of 4 subparts of a page + * (for each 1KB when small pages used */ + unsigned access_permission_0 : 2; + unsigned access_permission_1 : 2; + unsigned access_permission_2 : 2; + unsigned access_permission_3 : 2; + unsigned frame_base_addr : 20; +} ATTRIBUTE_PACKED pte_level1_t; + +typedef union { + pte_level0_t l0; + pte_level1_t l1; +} pte_t; + +/* Level 1 page tables access permissions */ + +/** User mode: no access, privileged mode: no access. */ +#define PTE_AP_USER_NO_KERNEL_NO 0 + +/** User mode: no access, privileged mode: read/write. */ +#define PTE_AP_USER_NO_KERNEL_RW 1 + +/** User mode: read only, privileged mode: read/write. */ +#define PTE_AP_USER_RO_KERNEL_RW 2 + +/** User mode: read/write, privileged mode: read/write. */ +#define PTE_AP_USER_RW_KERNEL_RW 3 + + +/* pte_level0_t and pte_level1_t descriptor_type flags */ + +/** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type). */ +#define PTE_DESCRIPTOR_NOT_PRESENT 0 + +/** pte_level0_t coarse page table flag (used in descriptor_type). */ +#define PTE_DESCRIPTOR_COARSE_TABLE 1 + +/** pte_level1_t small page table flag (used in descriptor type). */ +#define PTE_DESCRIPTOR_SMALL_PAGE 2 + + +/** Sets the address of level 0 page table. + * + * @param pt Pointer to the page table to set. + * + */ +NO_TRACE static inline void set_ptl0_addr(pte_t *pt) +{ + asm volatile ( + "mcr p15, 0, %[pt], c2, c0, 0\n" + :: [pt] "r" (pt) + ); +} + + +/** Returns level 0 page table entry flags. + * + * @param pt Level 0 page table. + * @param i Index of the entry to return. + * + */ +NO_TRACE static inline int get_pt_level0_flags(pte_t *pt, size_t i) +{ + pte_level0_t *p = &pt[i].l0; + int np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT); + + return (np << PAGE_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) | + (1 << PAGE_READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) | + (1 << PAGE_EXEC_SHIFT) | (1 << PAGE_CACHEABLE_SHIFT); +} + +/** Returns level 1 page table entry flags. + * + * @param pt Level 1 page table. + * @param i Index of the entry to return. + * + */ +NO_TRACE static inline int get_pt_level1_flags(pte_t *pt, size_t i) +{ + pte_level1_t *p = &pt[i].l1; + + int dt = p->descriptor_type; + int ap = p->access_permission_0; + + return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) | + ((ap == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT) | + ((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_READ_SHIFT) | + ((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_WRITE_SHIFT) | + ((ap != PTE_AP_USER_NO_KERNEL_RW) << PAGE_USER_SHIFT) | + ((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_READ_SHIFT) | + ((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_WRITE_SHIFT) | + (1 << PAGE_EXEC_SHIFT) | + (p->bufferable << PAGE_CACHEABLE); +} + +/** Sets flags of level 0 page table entry. + * + * @param pt level 0 page table + * @param i index of the entry to be changed + * @param flags new flags + * + */ +NO_TRACE static inline void set_pt_level0_flags(pte_t *pt, size_t i, int flags) +{ + pte_level0_t *p = &pt[i].l0; + + if (flags & PAGE_NOT_PRESENT) { + p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; + /* + * Ensures that the entry will be recognized as valid when + * PTE_VALID_ARCH applied. + */ + p->should_be_zero = 1; + } else { + p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; + p->should_be_zero = 0; + } +} + +NO_TRACE static inline void set_pt_level0_present(pte_t *pt, size_t i) +{ + pte_level0_t *p = &pt[i].l0; + + p->should_be_zero = 0; + write_barrier(); + p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; +} + +/** Sets flags of level 1 page table entry. + * + * We use same access rights for the whole page. When page + * is not preset we store 1 in acess_rigts_3 so that at least + * one bit is 1 (to mark correct page entry, see #PAGE_VALID_ARCH). + * + * @param pt Level 1 page table. + * @param i Index of the entry to be changed. + * @param flags New flags. + * + */ +NO_TRACE static inline void set_pt_level1_flags(pte_t *pt, size_t i, int flags) +{ + pte_level1_t *p = &pt[i].l1; + + if (flags & PAGE_NOT_PRESENT) + p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; + else + p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; + + p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0; + + /* default access permission */ + p->access_permission_0 = p->access_permission_1 = + p->access_permission_2 = p->access_permission_3 = + PTE_AP_USER_NO_KERNEL_RW; + + if (flags & PAGE_USER) { + if (flags & PAGE_READ) { + p->access_permission_0 = p->access_permission_1 = + p->access_permission_2 = p->access_permission_3 = + PTE_AP_USER_RO_KERNEL_RW; + } + if (flags & PAGE_WRITE) { + p->access_permission_0 = p->access_permission_1 = + p->access_permission_2 = p->access_permission_3 = + PTE_AP_USER_RW_KERNEL_RW; + } + } +} + +NO_TRACE static inline void set_pt_level1_present(pte_t *pt, size_t i) +{ + pte_level1_t *p = &pt[i].l1; + + p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; +} + +extern void page_arch_init(void); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mm/page_fault.h =================================================================== --- kernel/arch/arm32/include/arch/mm/page_fault.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/mm/page_fault.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,89 @@ +/* + * Copyright (c) 2007 Pavel Jancik, Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32mm + * @{ + */ +/** @file + * @brief Page fault related declarations. + */ + +#ifndef KERN_arm32_PAGE_FAULT_H_ +#define KERN_arm32_PAGE_FAULT_H_ + +#include + + +/** Decribes CP15 "fault status register" (FSR). */ +typedef struct { + unsigned status : 3; + unsigned domain : 4; + unsigned zero : 1; + unsigned should_be_zero : 24; +} ATTRIBUTE_PACKED fault_status_t; + + +/** Help union used for casting integer value into #fault_status_t. */ +typedef union { + fault_status_t fs; + uint32_t dummy; +} fault_status_union_t; + + +/** Simplified description of instruction code. + * + * @note Used for recognizing memory access instructions. + * @see ARM architecture reference (chapter 3.1) + */ +typedef struct { + unsigned dummy1 : 4; + unsigned bit4 : 1; + unsigned bits567 : 3; + unsigned dummy : 12; + unsigned access : 1; + unsigned opcode : 4; + unsigned type : 3; + unsigned condition : 4; +} ATTRIBUTE_PACKED instruction_t; + + +/** Help union used for casting pc register (uint_32_t) value into + * #instruction_t pointer. + */ +typedef union { + instruction_t *instr; + uint32_t pc; +} instruction_union_t; + +extern void prefetch_abort(unsigned int, istate_t *); +extern void data_abort(unsigned int, istate_t *); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/mm/tlb.h =================================================================== --- kernel/arch/arm32/include/arch/mm/tlb.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/mm/tlb.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2007 Pavel Jancik + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32mm + * @{ + */ +/** @file + * @brief TLB related declarations. + */ + +#ifndef KERN_arm32_TLB_H_ +#define KERN_arm32_TLB_H_ + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/proc/task.h =================================================================== --- kernel/arch/arm32/include/arch/proc/task.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/proc/task.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32proc + * @{ + */ +/** @file + * @brief Task related declarations. + */ + +#ifndef KERN_arm32_TASK_H_ +#define KERN_arm32_TASK_H_ + +typedef struct { +} task_arch_t; + +#define task_create_arch(t) +#define task_destroy_arch(t) + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/proc/thread.h =================================================================== --- kernel/arch/arm32/include/arch/proc/thread.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/proc/thread.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2003-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32proc + * @{ + */ +/** @file + * @brief Thread related declarations. + */ + +#ifndef KERN_arm32_THREAD_H_ +#define KERN_arm32_THREAD_H_ + +typedef struct { +} thread_arch_t; + +#define thr_constructor_arch(t) +#define thr_destructor_arch(t) +#define thread_create_arch(t) + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/ras.h =================================================================== --- kernel/arch/arm32/include/arch/ras.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/ras.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2009 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Declarations related to Restartable Atomic Sequences. + */ + +#ifndef KERN_arm32_RAS_H_ +#define KERN_arm32_RAS_H_ + +#include +#include + +#define RAS_START 0 +#define RAS_END 1 + +extern uintptr_t *ras_page; + +extern void ras_init(void); +extern void ras_check(unsigned int, istate_t *); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/regutils.h =================================================================== --- kernel/arch/arm32/include/arch/regutils.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/regutils.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,89 @@ +/* + * Copyright (c) 2007 Petr Stepan + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** + * @file + * @brief Utilities for convenient manipulation with ARM registers. + */ + +#ifndef KERN_arm32_REGUTILS_H_ +#define KERN_arm32_REGUTILS_H_ + +#define STATUS_REG_IRQ_DISABLED_BIT (1 << 7) +#define STATUS_REG_MODE_MASK 0x1f + +#define CP15_R1_HIGH_VECTORS_BIT (1 << 13) + +/* ARM Processor Operation Modes */ +#define USER_MODE 0x10 +#define FIQ_MODE 0x11 +#define IRQ_MODE 0x12 +#define SUPERVISOR_MODE 0x13 +#define ABORT_MODE 0x17 +#define UNDEFINED_MODE 0x1b +#define SYSTEM_MODE 0x1f + +/* [CS]PRS manipulation macros */ +#define GEN_STATUS_READ(nm, reg) \ + static inline uint32_t nm## _status_reg_read(void) \ + { \ + uint32_t retval; \ + \ + asm volatile ( \ + "mrs %[retval], " #reg \ + : [retval] "=r" (retval) \ + ); \ + \ + return retval; \ + } + +#define GEN_STATUS_WRITE(nm, reg, fieldname, field) \ + static inline void nm## _status_reg_ ##fieldname## _write(uint32_t value) \ + { \ + asm volatile ( \ + "msr " #reg "_" #field ", %[value]" \ + :: [value] "r" (value) \ + ); \ + } + +/** Return the value of CPSR (Current Program Status Register). */ +GEN_STATUS_READ(current, cpsr); + +/** Set control bits of CPSR. */ +GEN_STATUS_WRITE(current, cpsr, control, c); + +/** Return the value of SPSR (Saved Program Status Register). */ +GEN_STATUS_READ(saved, spsr); + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/stack.h =================================================================== --- kernel/arch/arm32/include/arch/stack.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/stack.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2007 Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Stack constants. + */ + +#ifndef KERN_arm32_STACK_H_ +#define KERN_arm32_STACK_H_ + +#define STACK_ITEM_SIZE 4 + +/** See ABI for + * details + */ +#define STACK_ALIGNMENT 8 + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/arch/types.h =================================================================== --- kernel/arch/arm32/include/arch/types.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) +++ kernel/arch/arm32/include/arch/types.h (revision 6ecf5b8322ea8b1cfad0e7246655beef88ab3194) @@ -0,0 +1,71 @@ +/* + * Copyright (c) 2007 Pavel Jancik, Michal Kebrt + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup arm32 + * @{ + */ +/** @file + * @brief Type definitions. + */ + +#ifndef KERN_arm32_TYPES_H_ +#define KERN_arm32_TYPES_H_ + +#ifndef DOXYGEN + #define ATTRIBUTE_PACKED __attribute__((packed)) +#else + #define ATTRIBUTE_PACKED +#endif + +typedef uint32_t size_t; +typedef int32_t ssize_t; + +typedef uint32_t uintptr_t; +typedef uint32_t pfn_t; + +typedef uint32_t ipl_t; + +typedef uint32_t sysarg_t; +typedef int32_t native_t; +typedef uint32_t atomic_count_t; + +typedef struct { +} fncptr_t; + +#define INTN_C(c) INT32_C(c) +#define UINTN_C(c) UINT32_C(c) + +#define PRIdn PRId32 /**< Format for native_t. */ +#define PRIun PRIu32 /**< Format for sysarg_t. */ +#define PRIxn PRIx32 /**< Format for hexadecimal sysarg_t. */ +#define PRIua PRIu32 /**< Format for atomic_count_t. */ + +#endif + +/** @} + */ Index: kernel/arch/arm32/include/asm.h =================================================================== --- kernel/arch/arm32/include/asm.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,108 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Declarations of functions implemented in assembly. - */ - -#ifndef KERN_arm32_ASM_H_ -#define KERN_arm32_ASM_H_ - -#include -#include -#include -#include -#include - -/** No such instruction on ARM to sleep CPU. */ -NO_TRACE static inline void cpu_sleep(void) -{ -} - -NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) -{ - *port = v; -} - -NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) -{ - *port = v; -} - -NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) -{ - *port = v; -} - -NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) -{ - return *port; -} - -NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) -{ - return *port; -} - -NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) -{ - return *port; -} - -/** Return base address of current stack. - * - * Return the base address of the current stack. - * The stack is assumed to be STACK_SIZE bytes long. - * The stack must start on page boundary. - * - */ -NO_TRACE static inline uintptr_t get_stack_base(void) -{ - uintptr_t v; - - asm volatile ( - "and %[v], sp, %[size]\n" - : [v] "=r" (v) - : [size] "r" (~(STACK_SIZE - 1)) - ); - - return v; -} - -extern void cpu_halt(void) __attribute__((noreturn)); -extern void asm_delay_loop(uint32_t t); -extern void userspace_asm(uintptr_t ustack, uintptr_t uspace_uarg, - uintptr_t entry); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/asm/boot.h =================================================================== --- kernel/arch/arm32/include/asm/boot.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Initial kernel start. - */ - -#ifndef KERN_arm32_ASM_BOOT_H_ -#define KERN_arm32_ASM_BOOT_H_ - -/** Size of a temporary stack used for initial kernel start. */ -#define TEMP_STACK_SIZE 0x100 - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/atomic.h =================================================================== --- kernel/arch/arm32/include/atomic.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,131 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Atomic operations. - */ - -#ifndef KERN_arm32_ATOMIC_H_ -#define KERN_arm32_ATOMIC_H_ - -#include -#include - -/** Atomic addition. - * - * @param val Where to add. - * @param i Value to be added. - * - * @return Value after addition. - * - */ -NO_TRACE static inline atomic_count_t atomic_add(atomic_t *val, - atomic_count_t i) -{ - /* - * This implementation is for UP pre-ARMv6 systems where we do not have - * the LDREX and STREX instructions. - */ - ipl_t ipl = interrupts_disable(); - val->count += i; - atomic_count_t ret = val->count; - interrupts_restore(ipl); - - return ret; -} - -/** Atomic increment. - * - * @param val Variable to be incremented. - * - */ -NO_TRACE static inline void atomic_inc(atomic_t *val) -{ - atomic_add(val, 1); -} - -/** Atomic decrement. - * - * @param val Variable to be decremented. - * - */ -NO_TRACE static inline void atomic_dec(atomic_t *val) { - atomic_add(val, -1); -} - -/** Atomic pre-increment. - * - * @param val Variable to be incremented. - * @return Value after incrementation. - * - */ -NO_TRACE static inline atomic_count_t atomic_preinc(atomic_t *val) -{ - return atomic_add(val, 1); -} - -/** Atomic pre-decrement. - * - * @param val Variable to be decremented. - * @return Value after decrementation. - * - */ -NO_TRACE static inline atomic_count_t atomic_predec(atomic_t *val) -{ - return atomic_add(val, -1); -} - -/** Atomic post-increment. - * - * @param val Variable to be incremented. - * @return Value before incrementation. - * - */ -NO_TRACE static inline atomic_count_t atomic_postinc(atomic_t *val) -{ - return atomic_add(val, 1) - 1; -} - -/** Atomic post-decrement. - * - * @param val Variable to be decremented. - * @return Value before decrementation. - * - */ -NO_TRACE static inline atomic_count_t atomic_postdec(atomic_t *val) -{ - return atomic_add(val, -1) + 1; -} - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/barrier.h =================================================================== --- kernel/arch/arm32/include/barrier.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,55 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Memory barriers. - */ - -#ifndef KERN_arm32_BARRIER_H_ -#define KERN_arm32_BARRIER_H_ - -/* - * TODO: implement true ARM memory barriers for macros below. - */ -#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") -#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") - -#define memory_barrier() asm volatile ("" ::: "memory") -#define read_barrier() asm volatile ("" ::: "memory") -#define write_barrier() asm volatile ("" ::: "memory") - -#define smc_coherence(a) -#define smc_coherence_block(a, l) - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/context.h =================================================================== --- kernel/arch/arm32/include/context.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,82 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Thread context. - */ - -#ifndef KERN_arm32_CONTEXT_H_ -#define KERN_arm32_CONTEXT_H_ - -#include -#include - -/* Put one item onto the stack to support get_stack_base() and align it up. */ -#define SP_DELTA (0 + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) - -#define context_set(c, _pc, stack, size) \ - do { \ - (c)->pc = (uintptr_t) (_pc); \ - (c)->sp = ((uintptr_t) (stack)) + (size) - SP_DELTA; \ - (c)->fp = 0; \ - } while (0) - -#ifndef __ASM__ - -#include - -/** Thread context containing registers that must be preserved across function - * calls. - */ -typedef struct { - uint32_t cpu_mode; - uintptr_t sp; - uintptr_t pc; - - uint32_t r4; - uint32_t r5; - uint32_t r6; - uint32_t r7; - uint32_t r8; - uint32_t r9; - uint32_t r10; - uint32_t fp; /* r11 */ - - ipl_t ipl; -} context_t; - - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/cpu.h =================================================================== --- kernel/arch/arm32/include/cpu.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,64 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief CPU identification. - */ - -#ifndef KERN_arm32_CPU_H_ -#define KERN_arm32_CPU_H_ - -#include -#include - - -/** Struct representing ARM CPU identifiaction. */ -typedef struct { - /** Implementator (vendor) number. */ - uint32_t imp_num; - - /** Variant number. */ - uint32_t variant_num; - - /** Architecture number. */ - uint32_t arch_num; - - /** Primary part number. */ - uint32_t prim_part_num; - - /** Revision number. */ - uint32_t rev_num; -} cpu_arch_t; - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/cycle.h =================================================================== --- kernel/arch/arm32/include/cycle.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,56 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Count of CPU cycles. - */ - -#ifndef KERN_arm32_CYCLE_H_ -#define KERN_arm32_CYCLE_H_ - -#include - -/** Return count of CPU cycles. - * - * No such instruction on ARM to get count of cycles. - * - * @return Count of CPU cycles. - * - */ -NO_TRACE static inline uint64_t get_cycle(void) -{ - return 0; -} - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/elf.h =================================================================== --- kernel/arch/arm32/include/elf.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,52 +1,0 @@ -/* - * Copyright (c) 2006 Sergey Bondari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief ARM ELF constants. - */ - -#ifndef KERN_arm32_ELF_H_ -#define KERN_arm32_ELF_H_ - -#define ELF_MACHINE EM_ARM - -#ifdef __BE__ - #define ELF_DATA_ENCODING ELFDATA2MSB -#else - #define ELF_DATA_ENCODING ELFDATA2LSB -#endif - -#define ELF_CLASS ELFCLASS32 - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/exception.h =================================================================== --- kernel/arch/arm32/include/exception.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,99 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt, Petr Stepan - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Exception declarations. - */ - -#ifndef KERN_arm32_EXCEPTION_H_ -#define KERN_arm32_EXCEPTION_H_ - -#include -#include - -/** If defined, forces using of high exception vectors. */ -#define HIGH_EXCEPTION_VECTORS - -#ifdef HIGH_EXCEPTION_VECTORS - #define EXC_BASE_ADDRESS 0xffff0000 -#else - #define EXC_BASE_ADDRESS 0x0 -#endif - -/* Exception Vectors */ -#define EXC_RESET_VEC (EXC_BASE_ADDRESS + 0x0) -#define EXC_UNDEF_INSTR_VEC (EXC_BASE_ADDRESS + 0x4) -#define EXC_SWI_VEC (EXC_BASE_ADDRESS + 0x8) -#define EXC_PREFETCH_ABORT_VEC (EXC_BASE_ADDRESS + 0xc) -#define EXC_DATA_ABORT_VEC (EXC_BASE_ADDRESS + 0x10) -#define EXC_IRQ_VEC (EXC_BASE_ADDRESS + 0x18) -#define EXC_FIQ_VEC (EXC_BASE_ADDRESS + 0x1c) - -/* Exception numbers */ -#define EXC_RESET 0 -#define EXC_UNDEF_INSTR 1 -#define EXC_SWI 2 -#define EXC_PREFETCH_ABORT 3 -#define EXC_DATA_ABORT 4 -#define EXC_IRQ 5 -#define EXC_FIQ 6 - -/** Kernel stack pointer. - * - * It is set when thread switches to user mode, - * and then used for exception handling. - * - */ -extern uintptr_t supervisor_sp; - -/** Temporary exception stack pointer. - * - * Temporary stack is used in exceptions handling routines - * before switching to thread's kernel stack. - * - */ -extern uintptr_t exc_stack; - -extern void install_exception_handlers(void); -extern void exception_init(void); -extern void reset_exception_entry(void); -extern void irq_exception_entry(void); -extern void fiq_exception_entry(void); -extern void undef_instr_exception_entry(void); -extern void prefetch_abort_exception_entry(void); -extern void data_abort_exception_entry(void); -extern void swi_exception_entry(void); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/faddr.h =================================================================== --- kernel/arch/arm32/include/faddr.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Function address conversion. - */ - -#ifndef KERN_arm32_FADDR_H_ -#define KERN_arm32_FADDR_H_ - -#include - -/** Calculate absolute address of function referenced by fptr pointer. - * - * @param fptr Function pointer. - * - */ -#define FADDR(fptr) ((uintptr_t) (fptr)) - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/fpu_context.h =================================================================== --- kernel/arch/arm32/include/fpu_context.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief FPU context (not implemented). - * - * GXemul doesn't support FPU on its ARM CPU. - */ - -#ifndef KERN_arm32_FPU_CONTEXT_H_ -#define KERN_arm32_FPU_CONTEXT_H_ - -#include - -#define FPU_CONTEXT_ALIGN 0 - -typedef struct { -} fpu_context_t; - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/interrupt.h =================================================================== --- kernel/arch/arm32/include/interrupt.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,58 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32interrupt - * @{ - */ -/** @file - * @brief Declarations of interrupt controlling routines. - */ - -#ifndef KERN_arm32_INTERRUPT_H_ -#define KERN_arm32_INTERRUPT_H_ - -#include -#include - -/** Initial size of exception dispatch table. */ -#define IVT_ITEMS 6 - -/** Index of the first item in exception dispatch table. */ -#define IVT_FIRST 0 - -extern void interrupt_init(void); -extern ipl_t interrupts_disable(void); -extern ipl_t interrupts_enable(void); -extern void interrupts_restore(ipl_t ipl); -extern ipl_t interrupts_read(void); -extern bool interrupts_disabled(void); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/istate.h =================================================================== --- kernel/arch/arm32/include/istate.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,105 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt, Petr Stepan - * - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32interrupt - * @{ - */ - -#ifndef KERN_arm32_ISTATE_H_ -#define KERN_arm32_ISTATE_H_ - -#include - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#include - -#endif /* KERNEL */ - -/** Struct representing CPU state saved when an exception occurs. */ -typedef struct istate { - uint32_t dummy; - uint32_t spsr; - uint32_t sp; - uint32_t lr; - - uint32_t r0; - uint32_t r1; - uint32_t r2; - uint32_t r3; - uint32_t r4; - uint32_t r5; - uint32_t r6; - uint32_t r7; - uint32_t r8; - uint32_t r9; - uint32_t r10; - uint32_t fp; - uint32_t r12; - - uint32_t pc; -} istate_t; - -/** Set Program Counter member of given istate structure. - * - * @param istate istate structure - * @param retaddr new value of istate's PC member - * - */ -NO_TRACE static inline void istate_set_retaddr(istate_t *istate, - uintptr_t retaddr) -{ - istate->pc = retaddr; -} - -/** Return true if exception happened while in userspace. */ -NO_TRACE static inline int istate_from_uspace(istate_t *istate) -{ - return (istate->spsr & STATUS_REG_MODE_MASK) == USER_MODE; -} - -/** Return Program Counter member of given istate structure. */ -NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) -{ - return istate->pc; -} - -NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) -{ - return istate->fp; -} - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mach/gta02/gta02.h =================================================================== --- kernel/arch/arm32/include/mach/gta02/gta02.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2010 Jiri Svoboda - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32gta02 GTA02 - * @brief Openmoko GTA02 platform. - * @ingroup arm32 - * @{ - */ -/** @file - * @brief Openmoko GTA02 platform driver. - */ - -#ifndef KERN_arm32_gta02_H_ -#define KERN_arm32_gta02_H_ - -#include - -extern struct arm_machine_ops gta02_machine_ops; - -/** Size of GTA02 IRQ number range (starting from 0) */ -#define GTA02_IRQ_COUNT 32 - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mach/integratorcp/integratorcp.h =================================================================== --- kernel/arch/arm32/include/mach/integratorcp/integratorcp.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,118 +1,0 @@ -/* - * Copyright (c) 2009 Vineeth Pillai - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32integratorcp - * @brief Integratorcp machine specific parts. - * @ingroup arm32 - * @{ - */ -/** @file - * @brief Integratorcp peripheries drivers declarations. - */ - -#ifndef KERN_arm32_icp_H_ -#define KERN_arm32_icp_H_ - -#include - -/** Last interrupt number (beginning from 0) whose status is probed - * from interrupt controller - */ -#define ICP_IRQC_MAX_IRQ 8 -#define ICP_KBD_IRQ 3 -#define ICP_TIMER_IRQ 6 - -/** Timer frequency */ -#define ICP_TIMER_FREQ 10000 - -#define ICP_UART 0x16000000 -#define ICP_KBD 0x18000000 -#define ICP_KBD_STAT 0x04 -#define ICP_KBD_DATA 0x08 -#define ICP_KBD_INTR_STAT 0x10 -#define ICP_RTC 0x13000000 -#define ICP_RTC1_LOAD_OFFSET 0x100 -#define ICP_RTC1_READ_OFFSET 0x104 -#define ICP_RTC1_CTL_OFFSET 0x108 -#define ICP_RTC1_INTRCLR_OFFSET 0x10C -#define ICP_RTC1_INTRSTAT_OFFSET 0x114 -#define ICP_RTC1_BGLOAD_OFFSET 0x118 -#define ICP_RTC_CTL_VALUE 0x00E2 -#define ICP_IRQC 0x14000000 -#define ICP_IRQC_MASK_OFFSET 0xC -#define ICP_IRQC_UNMASK_OFFSET 0x8 -#define ICP_FB 0x00800000 -#define ICP_FB_FRAME (ICP_FB >> 12) -#define ICP_FB_NUM_FRAME 512 -#define ICP_VGA 0xC0000000 -#define ICP_CMCR 0x10000000 -#define ICP_SDRAM_MASK 0x1C -#define ICP_SDRAMCR_OFFSET 0x20 - -typedef struct { - uintptr_t uart; - uintptr_t kbd_ctrl; - uintptr_t kbd_stat; - uintptr_t kbd_data; - uintptr_t kbd_intstat; - uintptr_t rtc; - uintptr_t rtc1_load; - uintptr_t rtc1_read; - uintptr_t rtc1_ctl; - uintptr_t rtc1_intrclr; - uintptr_t rtc1_intrstat; - uintptr_t rtc1_bgload; - uintptr_t irqc; - uintptr_t irqc_mask; - uintptr_t irqc_unmask; - uintptr_t vga; - uintptr_t cmcr; - uintptr_t sdramcr; -} icp_hw_map_t; - - -extern void icp_init(void); -extern void icp_output_init(void); -extern void icp_input_init(void); -extern void icp_timer_irq_start(void); -extern void icp_cpu_halt(void); -extern void icp_irq_exception(unsigned int, istate_t *); -extern void icp_get_memory_extents(uintptr_t *, size_t *); -extern void icp_frame_init(void); -extern size_t icp_get_irq_count(void); -extern const char *icp_get_platform_name(void); - -extern struct arm_machine_ops icp_machine_ops; - -/** Size of IntegratorCP IRQ number range (starting from 0) */ -#define ICP_IRQ_COUNT 8 - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mach/testarm/testarm.h =================================================================== --- kernel/arch/arm32/include/mach/testarm/testarm.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,83 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * Copyright (c) 2009 Vineeth Pillai - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32gxemul GXemul - * @brief GXemul machine specific parts. - * @ingroup arm32 - * @{ - */ -/** @file - * @brief GXemul peripheries drivers declarations. - */ - -#ifndef KERN_arm32_testarm_H_ -#define KERN_arm32_testarm_H_ - -#include - -/** Size of GXemul IRQ number range (starting from 0) */ -#define GXEMUL_IRQ_COUNT 32 -#define GXEMUL_KBD_IRQ 2 -#define GXEMUL_TIMER_IRQ 4 - -/** Timer frequency */ -#define GXEMUL_TIMER_FREQ 100 - -#define GXEMUL_KBD_ADDRESS 0x10000000 -#define GXEMUL_MP_ADDRESS 0x11000000 -#define GXEMUL_FB_ADDRESS 0x12000000 -#define GXEMUL_RTC_ADDRESS 0x15000000 -#define GXEMUL_IRQC_ADDRESS 0x16000000 - -extern void *gxemul_kbd; -extern void *gxemul_rtc; -extern void *gxemul_irqc; - -#define GXEMUL_HALT_OFFSET 0x010 -#define GXEMUL_RTC_FREQ_OFFSET 0x100 -#define GXEMUL_MP_MEMSIZE_OFFSET 0x090 -#define GXEMUL_RTC_ACK_OFFSET 0x110 - -extern void gxemul_init(void); -extern void gxemul_output_init(void); -extern void gxemul_input_init(void); -extern void gxemul_timer_irq_start(void); -extern void gxemul_cpu_halt(void); -extern void gxemul_irq_exception(unsigned int, istate_t *); -extern void gxemul_get_memory_extents(uintptr_t *, size_t *); -extern void gxemul_frame_init(void); -extern size_t gxemul_get_irq_count(void); -extern const char *gxemul_get_platform_name(void); - -extern struct arm_machine_ops gxemul_machine_ops; - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/machine_func.h =================================================================== --- kernel/arch/arm32/include/machine_func.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,113 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * Copyright (c) 2009 Vineeth Pillai - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Declarations of machine specific functions. - * - * These functions enable to differentiate more kinds of ARM emulators - * or CPUs. It's the same concept as "arch" functions on the architecture - * level. - */ - -#ifndef KERN_arm32_MACHINE_FUNC_H_ -#define KERN_arm32_MACHINE_FUNC_H_ - -#include -#include -#include - -struct arm_machine_ops { - void (*machine_init)(void); - void (*machine_timer_irq_start)(void); - void (*machine_cpu_halt)(void); - void (*machine_get_memory_extents)(uintptr_t *, size_t *); - void (*machine_irq_exception)(unsigned int, istate_t *); - void (*machine_frame_init)(void); - void (*machine_output_init)(void); - void (*machine_input_init)(void); - size_t (*machine_get_irq_count)(void); - const char *(*machine_get_platform_name)(void); -}; - -/** Pointer to arm_machine_ops structure being used. */ -extern struct arm_machine_ops *machine_ops; - -/** Initialize machine_ops pointer. */ -extern void machine_ops_init(void); - -/** Maps HW devices to the kernel address space using #hw_map. */ -extern void machine_init(void); - - -/** Starts timer. */ -extern void machine_timer_irq_start(void); - - -/** Halts CPU. */ -extern void machine_cpu_halt(void); - -/** Get extents of available memory. - * - * @param start Place to store memory start address. - * @param size Place to store memory size. - */ -extern void machine_get_memory_extents(uintptr_t *start, size_t *size); - -/** Interrupt exception handler. - * - * @param exc_no Interrupt exception number. - * @param istate Saved processor state. - */ -extern void machine_irq_exception(unsigned int exc_no, istate_t *istate); - - -/* - * Machine specific frame initialization - */ -extern void machine_frame_init(void); - -/* - * configure the serial line output device. - */ -extern void machine_output_init(void); - -/* - * configure the serial line input device. - */ -extern void machine_input_init(void); - -extern size_t machine_get_irq_count(void); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mm/as.h =================================================================== --- kernel/arch/arm32/include/mm/as.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,62 +1,0 @@ -/* - * Copyright (c) 2007 Pavel Jancik, Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32mm - * @{ - */ -/** @file - * @brief Address space manipulating functions declarations. - */ - -#ifndef KERN_arm32_AS_H_ -#define KERN_arm32_AS_H_ - -#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 - -#define KERNEL_ADDRESS_SPACE_START_ARCH UINT32_C(0x80000000) -#define KERNEL_ADDRESS_SPACE_END_ARCH UINT32_C(0xffffffff) -#define USER_ADDRESS_SPACE_START_ARCH UINT32_C(0x00000000) -#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x7fffffff) - -typedef struct { -} as_arch_t; - -#include - -#define as_constructor_arch(as, flags) (as != as) -#define as_destructor_arch(as) (as != as) -#define as_create_arch(as, flags) (as != as) -#define as_deinstall_arch(as) -#define as_invalidate_translation_cache(as, page, cnt) - -extern void as_arch_init(void); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mm/asid.h =================================================================== --- kernel/arch/arm32/include/mm/asid.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,58 +1,0 @@ -/* - * Copyright (c) 2007 Pavel Jancik, Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32mm - * @{ - */ -/** @file - * @brief ASIDs related declarations. - * - * ARM CPUs doesn't support ASIDs. - */ - -#ifndef KERN_arm32_ASID_H_ -#define KERN_arm32_ASID_H_ - -#include - -#define ASID_MAX_ARCH 3 /* minimal required number */ - -typedef uint8_t asid_t; - -/* - * This works due to fact that this file is never included alone but only - * through "generic/include/mm/asid.h" where ASID_START is defined. - */ -#define asid_get() (ASID_START + 1) - -#define asid_put(asid) - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mm/frame.h =================================================================== --- kernel/arch/arm32/include/mm/frame.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,73 +1,0 @@ -/* - * Copyright (c) 2007 Pavel Jancik, Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32mm - * @{ - */ -/** @file - * @brief Frame related declarations. - */ - -#ifndef KERN_arm32_FRAME_H_ -#define KERN_arm32_FRAME_H_ - -#define FRAME_WIDTH 12 /* 4KB frames */ -#define FRAME_SIZE (1 << FRAME_WIDTH) - -#ifndef __ASM__ - -#include - -#define BOOT_PAGE_TABLE_SIZE 0x4000 - -#ifdef MACHINE_gta02 -#define BOOT_PAGE_TABLE_ADDRESS 0x30010000 -#else -#define BOOT_PAGE_TABLE_ADDRESS 0x00008000 -#endif - -#define BOOT_PAGE_TABLE_START_FRAME (BOOT_PAGE_TABLE_ADDRESS >> FRAME_WIDTH) -#define BOOT_PAGE_TABLE_SIZE_IN_FRAMES (BOOT_PAGE_TABLE_SIZE >> FRAME_WIDTH) - -#ifdef MACHINE_gta02 -#define PHYSMEM_START_ADDR 0x30008000 -#else -#define PHYSMEM_START_ADDR 0x00000000 -#endif - -extern void frame_low_arch_init(void); -extern void frame_high_arch_init(void); -extern void boot_page_table_free(void); -#define physmem_print() - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mm/km.h =================================================================== --- kernel/arch/arm32/include/mm/km.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,57 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32mm - * @{ - */ -/** @file - */ - -#ifndef KERN_arm32_KM_H_ -#define KERN_arm32_KM_H_ - -#include - -#define KM_ARM32_IDENTITY_START UINT32_C(0x80000000) -#define KM_ARM32_IDENTITY_SIZE UINT32_C(0x70000000) - -#define KM_ARM32_NON_IDENTITY_START UINT32_C(0xf0000000) -/* - * The last virtual megabyte contains the high exception vectors (0xFFFF0000). - * Do not include this range into kernel non-identity. - */ -#define KM_ARM32_NON_IDENTITY_SIZE UINT32_C(0x0ff00000) - -extern void km_identity_arch_init(void); -extern void km_non_identity_arch_init(void); -extern bool km_is_non_identity_arch(uintptr_t); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mm/page.h =================================================================== --- kernel/arch/arm32/include/mm/page.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,342 +1,0 @@ -/* - * Copyright (c) 2007 Pavel Jancik, Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32mm - * @{ - */ -/** @file - * @brief Paging related declarations. - */ - -#ifndef KERN_arm32_PAGE_H_ -#define KERN_arm32_PAGE_H_ - -#include -#include -#include -#include -#include - -#define PAGE_WIDTH FRAME_WIDTH -#define PAGE_SIZE FRAME_SIZE - -#ifndef __ASM__ -# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) -# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) -#else -# define KA2PA(x) ((x) - 0x80000000) -# define PA2KA(x) ((x) + 0x80000000) -#endif - -/* Number of entries in each level. */ -#define PTL0_ENTRIES_ARCH (1 << 12) /* 4096 */ -#define PTL1_ENTRIES_ARCH 0 -#define PTL2_ENTRIES_ARCH 0 -/* coarse page tables used (256 * 4 = 1KB per page) */ -#define PTL3_ENTRIES_ARCH (1 << 8) /* 256 */ - -/* Page table sizes for each level. */ -#define PTL0_SIZE_ARCH FOUR_FRAMES -#define PTL1_SIZE_ARCH 0 -#define PTL2_SIZE_ARCH 0 -#define PTL3_SIZE_ARCH ONE_FRAME - -/* Macros calculating indices into page tables for each level. */ -#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 20) & 0xfff) -#define PTL1_INDEX_ARCH(vaddr) 0 -#define PTL2_INDEX_ARCH(vaddr) 0 -#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x0ff) - -/* Get PTE address accessors for each level. */ -#define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ - ((pte_t *) ((((pte_t *)(ptl0))[(i)].l0).coarse_table_addr << 10)) -#define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ - (ptl1) -#define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ - (ptl2) -#define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ - ((uintptr_t) ((((pte_t *)(ptl3))[(i)].l1).frame_base_addr << 12)) - -/* Set PTE address accessors for each level. */ -#define SET_PTL0_ADDRESS_ARCH(ptl0) \ - (set_ptl0_addr((pte_t *) (ptl0))) -#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ - (((pte_t *) (ptl0))[(i)].l0.coarse_table_addr = (a) >> 10) -#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) -#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) -#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ - (((pte_t *) (ptl3))[(i)].l1.frame_base_addr = (a) >> 12) - -/* Get PTE flags accessors for each level. */ -#define GET_PTL1_FLAGS_ARCH(ptl0, i) \ - get_pt_level0_flags((pte_t *) (ptl0), (size_t) (i)) -#define GET_PTL2_FLAGS_ARCH(ptl1, i) \ - PAGE_PRESENT -#define GET_PTL3_FLAGS_ARCH(ptl2, i) \ - PAGE_PRESENT -#define GET_FRAME_FLAGS_ARCH(ptl3, i) \ - get_pt_level1_flags((pte_t *) (ptl3), (size_t) (i)) - -/* Set PTE flags accessors for each level. */ -#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ - set_pt_level0_flags((pte_t *) (ptl0), (size_t) (i), (x)) -#define SET_PTL2_FLAGS_ARCH(ptl1, i, x) -#define SET_PTL3_FLAGS_ARCH(ptl2, i, x) -#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ - set_pt_level1_flags((pte_t *) (ptl3), (size_t) (i), (x)) - -/* Set PTE present bit accessors for each level. */ -#define SET_PTL1_PRESENT_ARCH(ptl0, i) \ - set_pt_level0_present((pte_t *) (ptl0), (size_t) (i)) -#define SET_PTL2_PRESENT_ARCH(ptl1, i) -#define SET_PTL3_PRESENT_ARCH(ptl2, i) -#define SET_FRAME_PRESENT_ARCH(ptl3, i) \ - set_pt_level1_present((pte_t *) (ptl3), (size_t) (i)) - -/* Macros for querying the last-level PTE entries. */ -#define PTE_VALID_ARCH(pte) \ - (*((uint32_t *) (pte)) != 0) -#define PTE_PRESENT_ARCH(pte) \ - (((pte_t *) (pte))->l0.descriptor_type != 0) -#define PTE_GET_FRAME_ARCH(pte) \ - (((pte_t *) (pte))->l1.frame_base_addr << FRAME_WIDTH) -#define PTE_WRITABLE_ARCH(pte) \ - (((pte_t *) (pte))->l1.access_permission_0 == PTE_AP_USER_RW_KERNEL_RW) -#define PTE_EXECUTABLE_ARCH(pte) \ - 1 - -#ifndef __ASM__ - -/** Level 0 page table entry. */ -typedef struct { - /* 0b01 for coarse tables, see below for details */ - unsigned descriptor_type : 2; - unsigned impl_specific : 3; - unsigned domain : 4; - unsigned should_be_zero : 1; - - /* Pointer to the coarse 2nd level page table (holding entries for small - * (4KB) or large (64KB) pages. ARM also supports fine 2nd level page - * tables that may hold even tiny pages (1KB) but they are bigger (4KB - * per table in comparison with 1KB per the coarse table) - */ - unsigned coarse_table_addr : 22; -} ATTRIBUTE_PACKED pte_level0_t; - -/** Level 1 page table entry (small (4KB) pages used). */ -typedef struct { - - /* 0b10 for small pages */ - unsigned descriptor_type : 2; - unsigned bufferable : 1; - unsigned cacheable : 1; - - /* access permissions for each of 4 subparts of a page - * (for each 1KB when small pages used */ - unsigned access_permission_0 : 2; - unsigned access_permission_1 : 2; - unsigned access_permission_2 : 2; - unsigned access_permission_3 : 2; - unsigned frame_base_addr : 20; -} ATTRIBUTE_PACKED pte_level1_t; - -typedef union { - pte_level0_t l0; - pte_level1_t l1; -} pte_t; - -/* Level 1 page tables access permissions */ - -/** User mode: no access, privileged mode: no access. */ -#define PTE_AP_USER_NO_KERNEL_NO 0 - -/** User mode: no access, privileged mode: read/write. */ -#define PTE_AP_USER_NO_KERNEL_RW 1 - -/** User mode: read only, privileged mode: read/write. */ -#define PTE_AP_USER_RO_KERNEL_RW 2 - -/** User mode: read/write, privileged mode: read/write. */ -#define PTE_AP_USER_RW_KERNEL_RW 3 - - -/* pte_level0_t and pte_level1_t descriptor_type flags */ - -/** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type). */ -#define PTE_DESCRIPTOR_NOT_PRESENT 0 - -/** pte_level0_t coarse page table flag (used in descriptor_type). */ -#define PTE_DESCRIPTOR_COARSE_TABLE 1 - -/** pte_level1_t small page table flag (used in descriptor type). */ -#define PTE_DESCRIPTOR_SMALL_PAGE 2 - - -/** Sets the address of level 0 page table. - * - * @param pt Pointer to the page table to set. - * - */ -NO_TRACE static inline void set_ptl0_addr(pte_t *pt) -{ - asm volatile ( - "mcr p15, 0, %[pt], c2, c0, 0\n" - :: [pt] "r" (pt) - ); -} - - -/** Returns level 0 page table entry flags. - * - * @param pt Level 0 page table. - * @param i Index of the entry to return. - * - */ -NO_TRACE static inline int get_pt_level0_flags(pte_t *pt, size_t i) -{ - pte_level0_t *p = &pt[i].l0; - int np = (p->descriptor_type == PTE_DESCRIPTOR_NOT_PRESENT); - - return (np << PAGE_PRESENT_SHIFT) | (1 << PAGE_USER_SHIFT) | - (1 << PAGE_READ_SHIFT) | (1 << PAGE_WRITE_SHIFT) | - (1 << PAGE_EXEC_SHIFT) | (1 << PAGE_CACHEABLE_SHIFT); -} - -/** Returns level 1 page table entry flags. - * - * @param pt Level 1 page table. - * @param i Index of the entry to return. - * - */ -NO_TRACE static inline int get_pt_level1_flags(pte_t *pt, size_t i) -{ - pte_level1_t *p = &pt[i].l1; - - int dt = p->descriptor_type; - int ap = p->access_permission_0; - - return ((dt == PTE_DESCRIPTOR_NOT_PRESENT) << PAGE_PRESENT_SHIFT) | - ((ap == PTE_AP_USER_RO_KERNEL_RW) << PAGE_READ_SHIFT) | - ((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_READ_SHIFT) | - ((ap == PTE_AP_USER_RW_KERNEL_RW) << PAGE_WRITE_SHIFT) | - ((ap != PTE_AP_USER_NO_KERNEL_RW) << PAGE_USER_SHIFT) | - ((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_READ_SHIFT) | - ((ap == PTE_AP_USER_NO_KERNEL_RW) << PAGE_WRITE_SHIFT) | - (1 << PAGE_EXEC_SHIFT) | - (p->bufferable << PAGE_CACHEABLE); -} - -/** Sets flags of level 0 page table entry. - * - * @param pt level 0 page table - * @param i index of the entry to be changed - * @param flags new flags - * - */ -NO_TRACE static inline void set_pt_level0_flags(pte_t *pt, size_t i, int flags) -{ - pte_level0_t *p = &pt[i].l0; - - if (flags & PAGE_NOT_PRESENT) { - p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; - /* - * Ensures that the entry will be recognized as valid when - * PTE_VALID_ARCH applied. - */ - p->should_be_zero = 1; - } else { - p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; - p->should_be_zero = 0; - } -} - -NO_TRACE static inline void set_pt_level0_present(pte_t *pt, size_t i) -{ - pte_level0_t *p = &pt[i].l0; - - p->should_be_zero = 0; - write_barrier(); - p->descriptor_type = PTE_DESCRIPTOR_COARSE_TABLE; -} - -/** Sets flags of level 1 page table entry. - * - * We use same access rights for the whole page. When page - * is not preset we store 1 in acess_rigts_3 so that at least - * one bit is 1 (to mark correct page entry, see #PAGE_VALID_ARCH). - * - * @param pt Level 1 page table. - * @param i Index of the entry to be changed. - * @param flags New flags. - * - */ -NO_TRACE static inline void set_pt_level1_flags(pte_t *pt, size_t i, int flags) -{ - pte_level1_t *p = &pt[i].l1; - - if (flags & PAGE_NOT_PRESENT) - p->descriptor_type = PTE_DESCRIPTOR_NOT_PRESENT; - else - p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; - - p->cacheable = p->bufferable = (flags & PAGE_CACHEABLE) != 0; - - /* default access permission */ - p->access_permission_0 = p->access_permission_1 = - p->access_permission_2 = p->access_permission_3 = - PTE_AP_USER_NO_KERNEL_RW; - - if (flags & PAGE_USER) { - if (flags & PAGE_READ) { - p->access_permission_0 = p->access_permission_1 = - p->access_permission_2 = p->access_permission_3 = - PTE_AP_USER_RO_KERNEL_RW; - } - if (flags & PAGE_WRITE) { - p->access_permission_0 = p->access_permission_1 = - p->access_permission_2 = p->access_permission_3 = - PTE_AP_USER_RW_KERNEL_RW; - } - } -} - -NO_TRACE static inline void set_pt_level1_present(pte_t *pt, size_t i) -{ - pte_level1_t *p = &pt[i].l1; - - p->descriptor_type = PTE_DESCRIPTOR_SMALL_PAGE; -} - -extern void page_arch_init(void); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mm/page_fault.h =================================================================== --- kernel/arch/arm32/include/mm/page_fault.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,89 +1,0 @@ -/* - * Copyright (c) 2007 Pavel Jancik, Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32mm - * @{ - */ -/** @file - * @brief Page fault related declarations. - */ - -#ifndef KERN_arm32_PAGE_FAULT_H_ -#define KERN_arm32_PAGE_FAULT_H_ - -#include - - -/** Decribes CP15 "fault status register" (FSR). */ -typedef struct { - unsigned status : 3; - unsigned domain : 4; - unsigned zero : 1; - unsigned should_be_zero : 24; -} ATTRIBUTE_PACKED fault_status_t; - - -/** Help union used for casting integer value into #fault_status_t. */ -typedef union { - fault_status_t fs; - uint32_t dummy; -} fault_status_union_t; - - -/** Simplified description of instruction code. - * - * @note Used for recognizing memory access instructions. - * @see ARM architecture reference (chapter 3.1) - */ -typedef struct { - unsigned dummy1 : 4; - unsigned bit4 : 1; - unsigned bits567 : 3; - unsigned dummy : 12; - unsigned access : 1; - unsigned opcode : 4; - unsigned type : 3; - unsigned condition : 4; -} ATTRIBUTE_PACKED instruction_t; - - -/** Help union used for casting pc register (uint_32_t) value into - * #instruction_t pointer. - */ -typedef union { - instruction_t *instr; - uint32_t pc; -} instruction_union_t; - -extern void prefetch_abort(unsigned int, istate_t *); -extern void data_abort(unsigned int, istate_t *); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/mm/tlb.h =================================================================== --- kernel/arch/arm32/include/mm/tlb.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,42 +1,0 @@ -/* - * Copyright (c) 2007 Pavel Jancik - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32mm - * @{ - */ -/** @file - * @brief TLB related declarations. - */ - -#ifndef KERN_arm32_TLB_H_ -#define KERN_arm32_TLB_H_ - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/proc/task.h =================================================================== --- kernel/arch/arm32/include/proc/task.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32proc - * @{ - */ -/** @file - * @brief Task related declarations. - */ - -#ifndef KERN_arm32_TASK_H_ -#define KERN_arm32_TASK_H_ - -typedef struct { -} task_arch_t; - -#define task_create_arch(t) -#define task_destroy_arch(t) - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/proc/thread.h =================================================================== --- kernel/arch/arm32/include/proc/thread.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32proc - * @{ - */ -/** @file - * @brief Thread related declarations. - */ - -#ifndef KERN_arm32_THREAD_H_ -#define KERN_arm32_THREAD_H_ - -typedef struct { -} thread_arch_t; - -#define thr_constructor_arch(t) -#define thr_destructor_arch(t) -#define thread_create_arch(t) - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/ras.h =================================================================== --- kernel/arch/arm32/include/ras.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,53 +1,0 @@ -/* - * Copyright (c) 2009 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Declarations related to Restartable Atomic Sequences. - */ - -#ifndef KERN_arm32_RAS_H_ -#define KERN_arm32_RAS_H_ - -#include -#include - -#define RAS_START 0 -#define RAS_END 1 - -extern uintptr_t *ras_page; - -extern void ras_init(void); -extern void ras_check(unsigned int, istate_t *); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/regutils.h =================================================================== --- kernel/arch/arm32/include/regutils.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,89 +1,0 @@ -/* - * Copyright (c) 2007 Petr Stepan - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** - * @file - * @brief Utilities for convenient manipulation with ARM registers. - */ - -#ifndef KERN_arm32_REGUTILS_H_ -#define KERN_arm32_REGUTILS_H_ - -#define STATUS_REG_IRQ_DISABLED_BIT (1 << 7) -#define STATUS_REG_MODE_MASK 0x1f - -#define CP15_R1_HIGH_VECTORS_BIT (1 << 13) - -/* ARM Processor Operation Modes */ -#define USER_MODE 0x10 -#define FIQ_MODE 0x11 -#define IRQ_MODE 0x12 -#define SUPERVISOR_MODE 0x13 -#define ABORT_MODE 0x17 -#define UNDEFINED_MODE 0x1b -#define SYSTEM_MODE 0x1f - -/* [CS]PRS manipulation macros */ -#define GEN_STATUS_READ(nm, reg) \ - static inline uint32_t nm## _status_reg_read(void) \ - { \ - uint32_t retval; \ - \ - asm volatile ( \ - "mrs %[retval], " #reg \ - : [retval] "=r" (retval) \ - ); \ - \ - return retval; \ - } - -#define GEN_STATUS_WRITE(nm, reg, fieldname, field) \ - static inline void nm## _status_reg_ ##fieldname## _write(uint32_t value) \ - { \ - asm volatile ( \ - "msr " #reg "_" #field ", %[value]" \ - :: [value] "r" (value) \ - ); \ - } - -/** Return the value of CPSR (Current Program Status Register). */ -GEN_STATUS_READ(current, cpsr); - -/** Set control bits of CPSR. */ -GEN_STATUS_WRITE(current, cpsr, control, c); - -/** Return the value of SPSR (Saved Program Status Register). */ -GEN_STATUS_READ(saved, spsr); - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/stack.h =================================================================== --- kernel/arch/arm32/include/stack.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2007 Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Stack constants. - */ - -#ifndef KERN_arm32_STACK_H_ -#define KERN_arm32_STACK_H_ - -#define STACK_ITEM_SIZE 4 - -/** See ABI for - * details - */ -#define STACK_ALIGNMENT 8 - -#endif - -/** @} - */ Index: kernel/arch/arm32/include/types.h =================================================================== --- kernel/arch/arm32/include/types.h (revision 60d931d2ab10130e11bbd48f2a9b389bc4e76ec1) +++ (revision ) @@ -1,71 +1,0 @@ -/* - * Copyright (c) 2007 Pavel Jancik, Michal Kebrt - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32 - * @{ - */ -/** @file - * @brief Type definitions. - */ - -#ifndef KERN_arm32_TYPES_H_ -#define KERN_arm32_TYPES_H_ - -#ifndef DOXYGEN - #define ATTRIBUTE_PACKED __attribute__((packed)) -#else - #define ATTRIBUTE_PACKED -#endif - -typedef uint32_t size_t; -typedef int32_t ssize_t; - -typedef uint32_t uintptr_t; -typedef uint32_t pfn_t; - -typedef uint32_t ipl_t; - -typedef uint32_t sysarg_t; -typedef int32_t native_t; -typedef uint32_t atomic_count_t; - -typedef struct { -} fncptr_t; - -#define INTN_C(c) INT32_C(c) -#define UINTN_C(c) UINT32_C(c) - -#define PRIdn PRId32 /**< Format for native_t. */ -#define PRIun PRIu32 /**< Format for sysarg_t. */ -#define PRIxn PRIx32 /**< Format for hexadecimal sysarg_t. */ -#define PRIua PRIu32 /**< Format for atomic_count_t. */ - -#endif - -/** @} - */