Index: kernel/arch/mips32/include/asm.h
===================================================================
--- kernel/arch/mips32/include/asm.h	(revision 70047478224039b394ba6d1a4ba25ae4fb58ab81)
+++ kernel/arch/mips32/include/asm.h	(revision 6da1013f00030b5dcedc878f40a0e6242a8d3282)
@@ -71,4 +71,15 @@
 extern ipl_t interrupts_read(void);
 
+/** No I/O port address space on MIPS. */
+static inline void outb(ioport_t port, uint8_t v)
+{
+}
+
+/** No I/O port address space on MIPS. */
+static inline uint8_t inb(ioport_t port)
+{
+	return 0;
+}
+
 #endif
 
Index: kernel/arch/mips32/include/context_offset.h
===================================================================
--- kernel/arch/mips32/include/context_offset.h	(revision 70047478224039b394ba6d1a4ba25ae4fb58ab81)
+++ kernel/arch/mips32/include/context_offset.h	(revision 6da1013f00030b5dcedc878f40a0e6242a8d3282)
@@ -115,8 +115,8 @@
 	sw $gp,OFFSET_GP(\ctx)
 
-#ifndef KERNEL		
+#ifndef KERNEL
 	sw $k1,OFFSET_TLS(\ctx)
 
-# ifdef CONFIG_MIPS_FPU	
+#ifdef CONFIG_FPU
 	mfc1 $t0,$20
 	sw $t0, OFFSET_F20(\ctx)
@@ -151,5 +151,5 @@
 	mfc1 $t0,$30
 	sw $t0, OFFSET_F30(\ctx)
-# endif /* CONFIG_MIPS_FPU */	
+#endif /* CONFIG_FPU */
 #endif /* KERNEL */
 
@@ -173,5 +173,5 @@
 	lw $k1,OFFSET_TLS(\ctx)
 
-# ifdef CONFIG_MIPS_FPU	
+#ifdef CONFIG_FPU
 	lw $t0, OFFSET_F20(\ctx)
 	mtc1 $t0,$20
@@ -206,7 +206,7 @@
 	lw $t0, OFFSET_F30(\ctx)
 	mtc1 $t0,$30
-# endif	/* CONFIG_MIPS_FPU */
-	
+#endif /* CONFIG_FPU */
 #endif /* KERNEL */
+
 	lw $ra,OFFSET_PC(\ctx)
 	lw $sp,OFFSET_SP(\ctx)
Index: kernel/arch/mips32/src/asm.S
===================================================================
--- kernel/arch/mips32/src/asm.S	(revision 70047478224039b394ba6d1a4ba25ae4fb58ab81)
+++ kernel/arch/mips32/src/asm.S	(revision 6da1013f00030b5dcedc878f40a0e6242a8d3282)
@@ -160,5 +160,5 @@
 .global fpu_context_save
 fpu_context_save:
-#ifdef ARCH_HAS_FPU
+#ifdef CONFIG_FPU
 	fpu_gp_save 0,$a0
 	fpu_gp_save 1,$a0
@@ -231,5 +231,5 @@
 .global fpu_context_restore
 fpu_context_restore:
-#ifdef ARCH_HAS_FPU
+#ifdef CONFIG_FPU
 	fpu_gp_restore 0,$a0
 	fpu_gp_restore 1,$a0
Index: kernel/arch/mips32/src/drivers/msim.c
===================================================================
--- kernel/arch/mips32/src/drivers/msim.c	(revision 70047478224039b394ba6d1a4ba25ae4fb58ab81)
+++ kernel/arch/mips32/src/drivers/msim.c	(revision 6da1013f00030b5dcedc878f40a0e6242a8d3282)
@@ -77,5 +77,4 @@
 }
 
-#include <print.h>
 /** Read character using polling, assume interrupts disabled */
 static char msim_do_read(chardev_t *dev)
Index: kernel/arch/mips32/src/fpu_context.c
===================================================================
--- kernel/arch/mips32/src/fpu_context.c	(revision 70047478224039b394ba6d1a4ba25ae4fb58ab81)
+++ kernel/arch/mips32/src/fpu_context.c	(revision 6da1013f00030b5dcedc878f40a0e6242a8d3282)
@@ -41,5 +41,5 @@
 void fpu_disable(void)
 {	
-#ifdef ARCH_HAS_FPU
+#ifdef CONFIG_FPU
 	cp0_status_write(cp0_status_read() & ~cp0_status_fpu_bit);
 #endif
@@ -48,5 +48,5 @@
 void fpu_enable(void)
 {
-#ifdef ARCH_HAS_FPU
+#ifdef CONFIG_FPU
 	cp0_status_write(cp0_status_read() | cp0_status_fpu_bit);
 #endif
Index: kernel/arch/mips32/src/mips32.c
===================================================================
--- kernel/arch/mips32/src/mips32.c	(revision 70047478224039b394ba6d1a4ba25ae4fb58ab81)
+++ kernel/arch/mips32/src/mips32.c	(revision 6da1013f00030b5dcedc878f40a0e6242a8d3282)
@@ -112,10 +112,10 @@
 	cp0_status_write(cp0_status_read() &
 	    ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit));
-
-	/* 
-	 * Mask all interrupts 
+	
+	/*
+	 * Mask all interrupts
 	 */
 	cp0_mask_all_int();
-		
+	
 	debugger_init();
 }
@@ -133,9 +133,24 @@
 		.y = 480,
 		.scan = 1920,
-		.visual = VISUAL_RGB_8_8_8,
+		.visual = VISUAL_BGR_8_8_8,
 	};
 	fb_init(&gxemul_prop);
 #endif
-	sysinfo_set_item_val("machine." STRING(MACHINE), NULL, 1);
+
+#ifdef msim
+	sysinfo_set_item_val("machine.msim", NULL, 1);
+#endif
+
+#ifdef simics
+	sysinfo_set_item_val("machine.simics", NULL, 1);
+#endif
+
+#ifdef bgxemul
+	sysinfo_set_item_val("machine.bgxemul", NULL, 1);
+#endif
+
+#ifdef lgxemul
+	sysinfo_set_item_val("machine.lgxemul", NULL, 1);
+#endif
 }
 
@@ -162,6 +177,5 @@
 	    (uintptr_t) kernel_uarg->uspace_entry);
 	
-	while (1)
-		;
+	while (1);
 }
 
@@ -196,6 +210,19 @@
 	___halt();
 	
-	while (1)
-		;
+	while (1);
+}
+
+/** Construct function pointer
+ *
+ * @param fptr   function pointer structure
+ * @param addr   function address
+ * @param caller calling function address
+ *
+ * @return address of the function pointer
+ *
+ */
+void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
+{
+	return addr;
 }
 
Index: kernel/arch/mips32/src/mm/frame.c
===================================================================
--- kernel/arch/mips32/src/mm/frame.c	(revision 70047478224039b394ba6d1a4ba25ae4fb58ab81)
+++ kernel/arch/mips32/src/mm/frame.c	(revision 6da1013f00030b5dcedc878f40a0e6242a8d3282)
@@ -76,5 +76,5 @@
 static bool frame_available(pfn_t frame)
 {
-#if MACHINE == msim
+#ifdef msim
 	/* MSIM device (dprinter) */
 	if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
@@ -86,5 +86,5 @@
 #endif
 
-#if MACHINE == simics
+#ifdef simics
 	/* Simics device (serial line) */
 	if (frame == (KA2PA(SERIAL_ADDRESS) >> ZERO_PAGE_WIDTH))
@@ -92,5 +92,5 @@
 #endif
 
-#if (MACHINE == lgxemul) || (MACHINE == bgxemul)
+#if defined(lgxemul) || defined(bgxemul)
 	/* gxemul devices */
 	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
@@ -219,5 +219,5 @@
 					if (ZERO_PAGE_VALUE != 0xdeadbeef)
 						avail = false;
-#if (MACHINE == lgxemul) || (MACHINE == bgxemul)
+#if defined(lgxemul) || defined(bgxemul)
 					else {
 						ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd;