Changeset 6c296a9 in mainline

Timestamp:

2008-07-27T13:23:17Z (16 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

0d387d2

Parents:

4541ae4

Message:

fix off-by-one bug
cleanup

Location:

kernel/arch/mips32

Files:

• include/mm/tlb.h (modified) (1 diff)
• src/mm/frame.c (modified) (7 diffs)

kernel/arch/mips32/include/mm/tlb.h

@@ -50 +50 @@
 #define TLB_KSTACK_WIRED_INDEX  0
 
-#define TLB_PAGE_MASK_16K       (0x3 << 13)
+#define TLB_PAGE_MASK_4K        (0x000 << 13)
+#define TLB_PAGE_MASK_16K       (0x003 << 13)
+#define TLB_PAGE_MASK_64K       (0x00f << 13)
+#define TLB_PAGE_MASK_256K      (0x03f << 13)
+#define TLB_PAGE_MASK_1M        (0x0ff << 13)
+#define TLB_PAGE_MASK_4M        (0x3ff << 13)
+#define TLB_PAGE_MASK_16M       (0xfff << 13)
 
 #define PAGE_UNCACHED                   2

kernel/arch/mips32/src/mm/frame.c

@@ -36 +36 @@
 #include <arch/mm/frame.h>
 #include <arch/mm/tlb.h>
+#include <interrupt.h>
 #include <mm/frame.h>
 #include <mm/asid.h>
@@ -42 +43 @@
 #include <arch/drivers/serial.h>
 #include <print.h>
-#include <debug.h>
-
-#define TLB_PAGE_MASK_1M        (0xff << 13)
-
+
+#define ZERO_PAGE_MASK          TLB_PAGE_MASK_1M
 #define ZERO_FRAMES                     4096
 #define ZERO_PAGE_WIDTH         20  /* 1M */
@@ -53 +52 @@
 #define ZERO_PAGE_ADDR          0
 #define ZERO_PAGE_OFFSET        (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
-#define ZERO_PAGE_VALUE         (*((volatile uint32_t *) ZERO_PAGE_ADDR + ZERO_PAGE_OFFSET))
+#define ZERO_PAGE_VALUE         (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])
 
 #define MAX_REGIONS                     32
@@ -132 +131 @@
                 /* Convert 1M frames to 16K frames */
                 pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH);
-                pfn_t count = ADDR2PFN((end_frame - start_frame - 1) << ZERO_PAGE_WIDTH);
+                pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH);
                 
                 /* Interrupt vector frame is blacklisted */
@@ -157 +156 @@
  * memory and create zones.
  *
+ * Note: It is assumed that the TLB is not yet being
+ * used in any way, thus there is no interference.
+ *
  */
 void frame_arch_init(void)
 {
-        cp0_index_write(ZERO_PAGE_TLBI);
-        tlbr();
-        
-        uint32_t orig_pagemask = cp0_pagemask_read();
-        uint32_t orig_lo0 = cp0_entry_lo0_read();
-        uint32_t orig_lo1 = cp0_entry_lo1_read();
-        uint32_t orig_hi = cp0_entry_hi_read();
+        ipl_t ipl = interrupts_disable();
+        
+        /* Clear and initialize TLB */
+        cp0_pagemask_write(ZERO_PAGE_MASK);
+        cp0_entry_lo0_write(0);
+        cp0_entry_lo1_write(0);
+        cp0_entry_hi_write(0);
+
+        count_t i;
+        for (i = 0; i < TLB_ENTRY_COUNT; i++) {
+                cp0_index_write(i);
+                tlbwi();
+        }
                 
         pfn_t start_frame = 0;
@@ -185 +193 @@
                                 tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);
                                 
-                                cp0_index_write(ZERO_PAGE_TLBI);
-                                cp0_pagemask_write(TLB_PAGE_MASK_1M);
+                                cp0_pagemask_write(ZERO_PAGE_MASK);
                                 cp0_entry_lo0_write(lo0.value);
                                 cp0_entry_lo1_write(lo1.value);
                                 cp0_entry_hi_write(hi.value);
+                                cp0_index_write(ZERO_PAGE_TLBI);
                                 tlbwi();
                                 
@@ -212 +220 @@
         frame_add_region(start_frame, frame);
         
-        /* Cleanup TLB */
-        cp0_index_write(ZERO_PAGE_TLBI);
-        cp0_pagemask_write(orig_pagemask);
-        cp0_entry_lo0_write(orig_lo0);
-        cp0_entry_lo1_write(orig_lo1);
-        cp0_entry_hi_write(orig_hi);
-        tlbwi();
-        
         /* Blacklist interrupt vector frame */
         frame_mark_unavailable(0, 1);
+        
+        /* Cleanup */
+        cp0_pagemask_write(ZERO_PAGE_MASK);
+        cp0_entry_lo0_write(0);
+        cp0_entry_lo1_write(0);
+        cp0_entry_hi_write(0);
+        cp0_index_write(ZERO_PAGE_TLBI);
+        tlbwi();
+        
+        interrupts_restore(ipl);
 }