Index: kernel/genarch/include/acpi/acpi.h =================================================================== --- kernel/genarch/include/acpi/acpi.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,94 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** @file - */ - -#ifndef KERN_ACPI_H_ -#define KERN_ACPI_H_ - -#include - -/* Root System Description Pointer */ -struct acpi_rsdp { - uint8_t signature[8]; - uint8_t checksum; - uint8_t oemid[6]; - uint8_t revision; - uint32_t rsdt_address; - uint32_t length; - uint64_t xsdt_address; - uint32_t ext_checksum; - uint8_t reserved[3]; -} __attribute__ ((packed)); - -/* System Description Table Header */ -struct acpi_sdt_header { - uint8_t signature[4]; - uint32_t length; - uint8_t revision; - uint8_t checksum; - uint8_t oemid[6]; - uint8_t oem_table_id[8]; - uint32_t oem_revision; - uint32_t creator_id; - uint32_t creator_revision; -} __attribute__ ((packed)); - -struct acpi_signature_map { - uint8_t *signature; - struct acpi_sdt_header **sdt_ptr; - const char *description; -}; - -/* Root System Description Table */ -struct acpi_rsdt { - struct acpi_sdt_header header; - uint32_t entry[]; -} __attribute__ ((packed)); - -/* Extended System Description Table */ -struct acpi_xsdt { - struct acpi_sdt_header header; - uint64_t entry[]; -} __attribute__ ((packed)); - -extern struct acpi_rsdp *acpi_rsdp; -extern struct acpi_rsdt *acpi_rsdt; -extern struct acpi_xsdt *acpi_xsdt; - -extern void acpi_init(void); -extern int acpi_sdt_check(uint8_t *sdt); - -#endif /* KERN_ACPI_H_ */ - -/** @} - */ Index: kernel/genarch/include/acpi/madt.h =================================================================== --- kernel/genarch/include/acpi/madt.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,148 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** @file - */ - -#ifndef KERN_MADT_H_ -#define KERN_MADT_H_ - -#include -#include -#include - -#define MADT_L_APIC 0 -#define MADT_IO_APIC 1 -#define MADT_INTR_SRC_OVRD 2 -#define MADT_NMI_SRC 3 -#define MADT_L_APIC_NMI 4 -#define MADT_L_APIC_ADDR_OVRD 5 -#define MADT_IO_SAPIC 6 -#define MADT_L_SAPIC 7 -#define MADT_PLATFORM_INTR_SRC 8 -#define MADT_RESERVED_SKIP_BEGIN 9 -#define MADT_RESERVED_SKIP_END 127 -#define MADT_RESERVED_OEM_BEGIN 128 - -struct madt_apic_header { - uint8_t type; - uint8_t length; -} __attribute__ ((packed)); - -/* Multiple APIC Description Table */ -struct acpi_madt { - struct acpi_sdt_header header; - uint32_t l_apic_address; - uint32_t flags; - struct madt_apic_header apic_header[]; -} __attribute__ ((packed)); - -struct madt_l_apic { - struct madt_apic_header header; - uint8_t acpi_id; - uint8_t apic_id; - uint32_t flags; -} __attribute__ ((packed)); - -struct madt_io_apic { - struct madt_apic_header header; - uint8_t io_apic_id; - uint8_t reserved; - uint32_t io_apic_address; - uint32_t global_intr_base; -} __attribute__ ((packed)); - -struct madt_intr_src_ovrd { - struct madt_apic_header header; - uint8_t bus; - uint8_t source; - uint32_t global_int; - uint16_t flags; -} __attribute__ ((packed)); - -struct madt_nmi_src { - struct madt_apic_header header; - uint16_t flags; - uint32_t global_intr; -} __attribute__ ((packed)); - -struct madt_l_apic_nmi { - struct madt_apic_header header; - uint8_t acpi_id; - uint16_t flags; - uint8_t l_apic_lint; -} __attribute__ ((packed)); - -struct madt_l_apic_addr_ovrd { - struct madt_apic_header header; - uint16_t reserved; - uint64_t l_apic_address; -} __attribute__ ((packed)); - -struct madt_io_sapic { - struct madt_apic_header header; - uint8_t io_apic_id; - uint8_t reserved; - uint32_t global_intr_base; - uint64_t io_apic_address; -} __attribute__ ((packed)); - -struct madt_l_sapic { - struct madt_apic_header header; - uint8_t acpi_id; - uint8_t sapic_id; - uint8_t sapic_eid; - uint8_t reserved[3]; - uint32_t flags; - uint32_t acpi_processor_uid_value; - uint8_t acpi_processor_uid_str[1]; -} __attribute__ ((packed)); - -struct madt_platform_intr_src { - struct madt_apic_header header; - uint16_t flags; - uint8_t intr_type; - uint8_t processor_id; - uint8_t processor_eid; - uint8_t io_sapic_vector; - uint32_t global_intr; - uint32_t platform_intr_src_flags; -} __attribute__ ((packed)); - -extern struct acpi_madt *acpi_madt; -extern struct smp_config_operations madt_config_operations; - -extern void acpi_madt_parse(void); - -#endif /* KERN_MADT_H_ */ - -/** @} - */ Index: kernel/genarch/include/drivers/am335x/cm_dpll.h =================================================================== --- kernel/genarch/include/drivers/am335x/cm_dpll.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,81 +1,0 @@ -/* - * Copyright (c) 2013 Maurizio Lombardi - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Texas Instruments AM335x DPLL. - */ - -#ifndef _KERN_AM335X_CM_DPLL_H_ -#define _KERN_AM335X_CM_DPLL_H_ - -#include "cm_dpll_regs.h" -#include "timer.h" - -#define AM335x_CM_DPLL_BASE_ADDRESS 0x44E00500 -#define AM335x_CM_DPLL_SIZE 256 - -static ioport32_t *am335x_cm_dpll_timer_reg_get(am335x_cm_dpll_regs_t *cm, - am335x_timer_id_t id) -{ - switch (id) { - default: - return NULL; - case DMTIMER2: - return &cm->clksel_timer2; - case DMTIMER3: - return &cm->clksel_timer3; - case DMTIMER4: - return &cm->clksel_timer4; - case DMTIMER5: - return &cm->clksel_timer5; - case DMTIMER6: - return &cm->clksel_timer6; - case DMTIMER7: - return &cm->clksel_timer7; - } -} - -static void am335x_clock_source_select(am335x_cm_dpll_regs_t *cm, - am335x_timer_id_t id, am335x_clk_src_t src) -{ - ioport32_t *reg = am335x_cm_dpll_timer_reg_get(cm, id); - if (!reg) - return; - - *reg = (*reg & ~0x03) | src; -} - -#endif - -/** - * @} - */ - Index: kernel/genarch/include/drivers/am335x/cm_dpll_regs.h =================================================================== --- kernel/genarch/include/drivers/am335x/cm_dpll_regs.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,86 +1,0 @@ -/* - * Copyright (c) 2013 Maurizio Lombardi - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Texas Instruments AM335x DPLL registers. - */ - -#ifndef _KERN_AM335X_CM_DPLL_REGS_H_ -#define _KERN_AM335X_CM_DPLL_REGS_H_ - -typedef enum { - CLK_SRC_TCLKIN = 0x00, - CLK_SRC_M_OSC, - CLK_SRC_32_KHZ -} am335x_clk_src_t; - -typedef struct am335x_cm_dpll_regs { - - ioport32_t const pad0; - - ioport32_t clksel_timer7; - ioport32_t clksel_timer2; - ioport32_t clksel_timer3; - ioport32_t clksel_timer4; - - ioport32_t clksel_mac; -#define AM335x_CM_CLKSEL_MII_FLAG (1 << 2) - - ioport32_t clksel_timer5; - ioport32_t clksel_timer6; - - ioport32_t clksel_cpts_rft; - - ioport32_t const pad1; - - ioport32_t clksel_timer1ms; -#define AM335x_CM_CLKSEL_TIMER1MS_CLKMOSC 0x00 -#define AM335x_CM_CLKSEL_TIMER1MS_CLK32KHZ 0x01 -#define AM335x_CM_CLKSEL_TIMER1MS_TCLKIN 0x02 -#define AM335x_CM_CLKSEL_TIMER1MS_CLKRC32KHZ 0x03 -#define AM335x_CM_CLKSEL_TIMER1MS_32KHZCRYSTAL 0x04 - - ioport32_t clksel_gfx_fclk; -#define AM335x_CM_CLKSEL_GFX_FCLK_CLKDIV_FLAG (1 << 0) -#define AM335x_CM_CLKSEL_GFX_FCLK_CLKSEL_FLAG (1 << 1) - - ioport32_t clksel_pru_icss_ocp; - ioport32_t clksel_lcdc_pixel; - ioport32_t clksel_wdt1; - ioport32_t clksel_gpio0_db; - -} am335x_cm_dpll_regs_t; - -#endif - -/** - * @} - */ Index: kernel/genarch/include/drivers/am335x/cm_per.h =================================================================== --- kernel/genarch/include/drivers/am335x/cm_per.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,87 +1,0 @@ -/* - * Copyright (c) 2013 Maurizio Lombardi - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Texas Instruments AM335x clock module. - */ - -#ifndef _KERN_AM335X_CM_PER_H_ -#define _KERN_AM335X_CM_PER_H_ - -#include -#include "cm_per_regs.h" -#include "timer.h" - -#define AM335x_CM_PER_BASE_ADDRESS 0x44E00000 -#define AM335x_CM_PER_SIZE 1024 - -static ioport32_t *am335x_clock_clkctrl_reg_get(am335x_cm_per_regs_t *cm, - am335x_timer_id_t id) -{ - switch (id) { - default: - return NULL; - case DMTIMER2: - return &cm->timer2_clkctrl; - case DMTIMER3: - return &cm->timer3_clkctrl; - case DMTIMER4: - return &cm->timer4_clkctrl; - case DMTIMER5: - return &cm->timer5_clkctrl; - case DMTIMER6: - return &cm->timer6_clkctrl; - case DMTIMER7: - return &cm->timer7_clkctrl; - } - -} - -static void am335x_clock_module_enable(am335x_cm_per_regs_t *cm, - am335x_timer_id_t timer_id) -{ - ioport32_t *tmr_reg = am335x_clock_clkctrl_reg_get(cm, timer_id); - if (tmr_reg == NULL) - return; - - /* Enable the clock module */ - *tmr_reg = (*tmr_reg & ~0x03) | 0x02; - - /* Wait for completion */ - while ((*tmr_reg & 0x03) != 0x02); -} - -#endif - -/** - * @} - */ - Index: kernel/genarch/include/drivers/am335x/cm_per_regs.h =================================================================== --- kernel/genarch/include/drivers/am335x/cm_per_regs.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,137 +1,0 @@ -/* - * Copyright (c) 2013 Maurizio Lombardi - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Texas Instruments AM335x clock module registers. - */ - -#ifndef _KERN_AM335X_CM_PER_REGS_H_ -#define _KERN_AM335X_CM_PER_REGS_H_ - -#include - -typedef struct am335x_cm_per_regs { - - ioport32_t l4ls_clkstctrl; - ioport32_t l3ls_clkstctrl; - ioport32_t l4fw_clkstctrl; - ioport32_t l3_clkstctrl; - - ioport32_t const pad0; - - ioport32_t cpgmac0_clkctrl; - ioport32_t lcdc_clkctrl; - ioport32_t usb0_clkctrl; - - ioport32_t const pad1; - - ioport32_t tptc0_clkctrl; - ioport32_t emif_clkctrl; - ioport32_t ocmcram_clkctrl; - ioport32_t gpmc_clkctrl; - ioport32_t mcasp0_clkctrl; - ioport32_t uart5_clkctrl; - ioport32_t mmc0_clkctrl; - ioport32_t elm_clkctrl; - ioport32_t i2c2_clkctrl; - ioport32_t i2c1_clkctrl; - ioport32_t spi0_clkctrl; - ioport32_t spi1_clkctrl; - - ioport32_t const pad2[3]; - - ioport32_t l4ls_clkctrl; - ioport32_t l4fw_clkctrl; - ioport32_t mcasp1_clkctrl; - ioport32_t uart1_clkctrl; - ioport32_t uart2_clkctrl; - ioport32_t uart3_clkctrl; - ioport32_t uart4_clkctrl; - ioport32_t timer7_clkctrl; - ioport32_t timer2_clkctrl; - ioport32_t timer3_clkctrl; - ioport32_t timer4_clkctrl; - - ioport32_t const pad3[8]; - - ioport32_t gpio1_clkctrl; - ioport32_t gpio2_clkctrl; - ioport32_t gpio3_clkctrl; - - ioport32_t const pad4; - - ioport32_t tpcc_clkctrl; - ioport32_t dcan0_clkctrl; - ioport32_t dcan1_clkctrl; - ioport32_t epwmss1_clkctrl; - ioport32_t emiffw_clkctrl; - ioport32_t epwmss0_clkctrl; - ioport32_t epwmss2_clkctrl; - ioport32_t l3instr_clkctrl; - ioport32_t l3_clkctrl; - ioport32_t ieee5000_clkctrl; - ioport32_t pruicss_clkctrl; - ioport32_t timer5_clkctrl; - ioport32_t timer6_clkctrl; - ioport32_t mmc1_clkctrl; - ioport32_t mmc2_clkctrl; - ioport32_t tptc1_clkctrl; - ioport32_t tptc2_clkctrl; - - ioport32_t const pad5[2]; - - ioport32_t spinlock_clkctrl; - ioport32_t mailbox0_clkctrl; - - ioport32_t const pad6[2]; - - ioport32_t l4hs_clkstctrl; - ioport32_t l4hs_clkctrl; - - ioport32_t const pad7[2]; - - ioport32_t ocpwp_l3_clkstctrl; - ioport32_t ocpwp_clkctrl; - - ioport32_t const pad8[3]; - - ioport32_t pruicss_clkstctrl; - ioport32_t cpsw_clkstctrl; - ioport32_t lcdc_clkstctrl; - ioport32_t clkdiv32_clkctrl; - ioport32_t clk24mhz_clkstctrl; -} am335x_cm_per_regs_t; - -#endif - -/** - * @} - */ Index: kernel/genarch/include/drivers/am335x/ctrl_module.h =================================================================== --- kernel/genarch/include/drivers/am335x/ctrl_module.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,81 +1,0 @@ -/* - * Copyright (c) 2013 Maurizio Lombardi - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Texas Instruments AM335x control module. - */ - -#ifndef _KERN_AM335X_CTRL_MODULE_H_ -#define _KERN_AM335X_CTRL_MODULE_H_ - -#include -#include -#include "ctrl_module_regs.h" - -#define AM335x_CTRL_MODULE_BASE_ADDRESS 0x44E10000 -#define AM335x_CTRL_MODULE_SIZE 131072 /* 128 Kb */ - -typedef ioport32_t am335x_ctrl_module_t; - -static int -am335x_ctrl_module_clock_freq_get(am335x_ctrl_module_t *base, unsigned *freq) -{ - unsigned const control_status = AM335x_CTRL_MODULE_REG_VALUE(base, - CONTROL_STATUS); - - /* Get the sysboot1 field at control_status[22,23] */ - unsigned const sysboot1 = (control_status >> 22) & 0x03; - - switch (sysboot1) { - default: - return EINVAL; - case 0: - *freq = 19200000; /* 19.2 Mhz */ - break; - case 1: - *freq = 24000000; /* 24 Mhz */ - break; - case 2: - *freq = 25000000; /* 25 Mhz */ - break; - case 3: - *freq = 26000000; /* 26 Mhz */ - break; - } - - return EOK; -} - -#endif - -/** - * @} - */ Index: kernel/genarch/include/drivers/am335x/ctrl_module_regs.h =================================================================== --- kernel/genarch/include/drivers/am335x/ctrl_module_regs.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,280 +1,0 @@ -/* - * Copyright (c) 2013 Maurizio Lombardi - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Texas Instruments AM335x control module registers. - */ - -#ifndef _KERN_AM335X_CTRL_MODULE_REGS_H_ -#define _KERN_AM335X_CTRL_MODULE_REGS_H_ - -#include - -#define AM335x_CTRL_MODULE_REG_VALUE(base, name) \ - (*((ioport32_t *)(AM335x_CTRL_MODULE_##name##_OFFSET + \ - ((ioport8_t *) base)))) - -#define AM335x_CTRL_MODULE_CONTROL_REVISION_OFFSET 0x00 -#define AM335x_CTRL_MODULE_CONTROL_HWINFO_OFFSET 0x04 -#define AM335x_CTRL_MODULE_CONTROL_SYSCONFIG_OFFSET 0x10 -#define AM335x_CTRL_MODULE_CONTROL_STATUS_OFFSET 0x40 -#define AM335x_CTRL_MODULE_CONTROL_EMIF_SDRAM_CONFIG_OFFSET 0x110 -#define AM335x_CTRL_MODULE_CORTEX_VBBLDO_CTRL_OFFSET 0x41C -#define AM335x_CTRL_MODULE_CORE_SLDO_CTRL_OFFSET 0x428 -#define AM335x_CTRL_MODULE_MPU_SLDO_CTRL_OFFSET 0x42C -#define AM335x_CTRL_MODULE_CLK32KDIVRATIO_CTRL_OFFSET 0x444 -#define AM335x_CTRL_MODULE_BANDGAP_CTRL_OFFSET 0x448 -#define AM335x_CTRL_MODULE_BANDGAP_TRIM_OFFSET 0x44C -#define AM335x_CTRL_MODULE_PLL_CLKINPULOW_CTRL_OFFSET 0x458 -#define AM335x_CTRL_MODULE_MOSC_CTRL_OFFSET 0x468 -#define AM335x_CTRL_MODULE_ROSC_CTRL_OFFSET 0x46C -#define AM335x_CTRL_MODULE_DEEPSLEEP_CTRL_OFFSET 0x470 -#define AM335x_CTRL_MODULE_DEVICE_ID_OFFSET 0x600 -#define AM335x_CTRL_MODULE_DEV_FEATURE_OFFSET 0x604 -#define AM335x_CTRL_MODULE_INIT_PRIORITY_0_OFFSET 0x608 -#define AM335x_CTRL_MODULE_INIT_PRIORITY_1_OFFSET 0x60C -#define AM335x_CTRL_MODULE_MMU_CFG_OFFSET 0x610 -#define AM335x_CTRL_MODULE_TPTC_CFG_OFFSET 0x614 -#define AM335x_CTRL_MODULE_USB_CTRL0_OFFSET 0x620 -#define AM335x_CTRL_MODULE_USB_STS0_OFFSET 0x624 -#define AM335x_CTRL_MODULE_USB_CTRL1_OFFSET 0x628 -#define AM335x_CTRL_MODULE_USB_STS1_OFFSET 0x62C -#define AM335x_CTRL_MODULE_MAC_ID0_LO_OFFSET 0x630 -#define AM335x_CTRL_MODULE_MAC_ID0_HI_OFFSET 0x634 -#define AM335x_CTRL_MODULE_MAC_ID1_LO_OFFSET 0x638 -#define AM335x_CTRL_MODULE_MAC_ID1_HI_OFFSET 0x63C -#define AM335x_CTRL_MODULE_DCAN_RAMINIT_OFFSET 0x644 -#define AM335x_CTRL_MODULE_USB_WKUP_CTRL_OFFSET 0x648 -#define AM335x_CTRL_MODULE_GMII_SEL_OFFSET 0x650 -#define AM335x_CTRL_MODULE_PWMSS_CTRL_OFFSET 0x664 -#define AM335x_CTRL_MODULE_MREQPRIO_0_OFFSET 0x670 -#define AM335x_CTRL_MODULE_MREQPRIO_1_OFFSET 0x674 -#define AM335x_CTRL_MODULE_HW_EVENT_SEL_GRP1_OFFSET 0x690 -#define AM335x_CTRL_MODULE_HW_EVENT_SEL_GRP2_OFFSET 0x694 -#define AM335x_CTRL_MODULE_HW_EVENT_SEL_GRP3_OFFSET 0x698 -#define AM335x_CTRL_MODULE_HW_EVENT_SEL_GRP4_OFFSET 0x69C -#define AM335x_CTRL_MODULE_SMRT_CTRL_OFFSET 0x6A0 -#define AM335x_CTRL_MODULE_MPUSS_HW_DEBUG_SEL_OFFSET 0x6A4 -#define AM335x_CTRL_MODULE_MPUSS_HW_DBG_INFO_OFFSET 0x6A8 -#define AM335x_CTRL_MODULE_VDD_MPU_OPP_050_OFFSET 0x770 -#define AM335x_CTRL_MODULE_VDD_MPU_OPP_100_OFFSET 0x774 -#define AM335x_CTRL_MODULE_VDD_MPU_OPP_120_OFFSET 0x778 -#define AM335x_CTRL_MODULE_VDD_MPU_OPP_TURBO_OFFSET 0x77C -#define AM335x_CTRL_MODULE_VDD_CORE_OPP_050_OFFSET 0x7B8 -#define AM335x_CTRL_MODULE_VDD_CORE_OPP_100_OFFSET 0x7BC -#define AM335x_CTRL_MODULE_BB_SCALE_OFFSET 0x7D0 -#define AM335x_CTRL_MODULE_USB_VID_PID_OFFSET 0x7F4 -#define AM335x_CTRL_MODULE_CONF_GPMC_AD0_OFFSET 0x800 -#define AM335x_CTRL_MODULE_CONF_GPMC_AD1_OFFSET 0x804 -#define AM335x_CTRL_MODULE_CONF_GPMC_AD2_OFFSET 0x808 -#define AM335x_CTRL_MODULE_CONF_GPMC_AD3_OFFSET 0x80C -#define AM335x_CTRL_MODULE_CONF_GPMC_AD4_OFFSET 0x810 -#define AM335x_CTRL_MODULE_CONF_GPMC_AD5_OFFSET 0x814 -#define AM335x_CTRL_MODULE_CONF_GPMC_AD6_OFFSET 0x818 -#define AM335x_CTRL_MODULE_CONF_GPMC_AD7_OFFSET 0x81C -#define AM335x_CTRL_MODULE_CONF_GPMC_AD8_OFFSET 0x820 -#define AM335x_CTRL_MODULE_CONF_GPMC_AD9_OFFSET 0x824 -#define AM335x_CTRL_MODULE_CONF_GPMC_AD10_OFFSET 0x828 -#define AM335x_CTRL_MODULE_CONF_GPMC_AD11_OFFSET 0x82C -#define AM335x_CTRL_MODULE_CONF_GPMC_AD12_OFFSET 0x830 -#define AM335x_CTRL_MODULE_CONF_GPMC_AD13_OFFSET 0x834 -#define AM335x_CTRL_MODULE_CONF_GPMC_AD14_OFFSET 0x838 -#define AM335x_CTRL_MODULE_CONF_GPMC_AD15_OFFSET 0x83C -#define AM335x_CTRL_MODULE_CONF_GPMC_A0_OFFSET 0x840 -#define AM335x_CTRL_MODULE_CONF_GPMC_A1_OFFSET 0x844 -#define AM335x_CTRL_MODULE_CONF_GPMC_A2_OFFSET 0x848 -#define AM335x_CTRL_MODULE_CONF_GPMC_A3_OFFSET 0x84C -#define AM335x_CTRL_MODULE_CONF_GPMC_A4_OFFSET 0x850 -#define AM335x_CTRL_MODULE_CONF_GPMC_A5_OFFSET 0x854 -#define AM335x_CTRL_MODULE_CONF_GPMC_A6_OFFSET 0x858 -#define AM335x_CTRL_MODULE_CONF_GPMC_A7_OFFSET 0x85C -#define AM335x_CTRL_MODULE_CONF_GPMC_A8_OFFSET 0x860 -#define AM335x_CTRL_MODULE_CONF_GPMC_A9_OFFSET 0x864 -#define AM335x_CTRL_MODULE_CONF_GPMC_A10_OFFSET 0x868 -#define AM335x_CTRL_MODULE_CONF_GPMC_A11_OFFSET 0x86C -#define AM335x_CTRL_MODULE_CONF_GPMC_WAIT0_OFFSET 0x870 -#define AM335x_CTRL_MODULE_CONF_GPMC_WPN_OFFSET 0x874 -#define AM335x_CTRL_MODULE_CONF_GPMC_BEN1_OFFSET 0x878 -#define AM335x_CTRL_MODULE_CONF_GPMC_CSN0_OFFSET 0x87C -#define AM335x_CTRL_MODULE_CONF_GPMC_CSN1_OFFSET 0x880 -#define AM335x_CTRL_MODULE_CONF_GPMC_CSN2_OFFSET 0x884 -#define AM335x_CTRL_MODULE_CONF_GPMC_CSN3_OFFSET 0x888 -#define AM335x_CTRL_MODULE_CONF_GPMC_CLK_OFFSET 0x88C -#define AM335x_CTRL_MODULE_CONF_GPMC_ADVN_ALE_OFFSET 0x890 -#define AM335x_CTRL_MODULE_CONF_GPMC_OEN_REN_OFFSET 0x894 -#define AM335x_CTRL_MODULE_CONF_GPMC_WEN_OFFSET 0x898 -#define AM335x_CTRL_MODULE_CONF_GPMC_BEN0_CLE_OFFSET 0x89C -#define AM335x_CTRL_MODULE_CONF_LCD_DATA0_OFFSET 0x8A0 -#define AM335x_CTRL_MODULE_CONF_LCD_DATA1_OFFSET 0x8A4 -#define AM335x_CTRL_MODULE_CONF_LCD_DATA2_OFFSET 0x8A8 -#define AM335x_CTRL_MODULE_CONF_LCD_DATA3_OFFSET 0x8AC -#define AM335x_CTRL_MODULE_CONF_LCD_DATA4_OFFSET 0x8B0 -#define AM335x_CTRL_MODULE_CONF_LCD_DATA5_OFFSET 0x8B4 -#define AM335x_CTRL_MODULE_CONF_LCD_DATA6_OFFSET 0x8B8 -#define AM335x_CTRL_MODULE_CONF_LCD_DATA7_OFFSET 0x8BC -#define AM335x_CTRL_MODULE_CONF_LCD_DATA8_OFFSET 0x8C0 -#define AM335x_CTRL_MODULE_CONF_LCD_DATA9_OFFSET 0x8C4 -#define AM335x_CTRL_MODULE_CONF_LCD_DATA10_OFFSET 0x8C8 -#define AM335x_CTRL_MODULE_CONF_LCD_DATA11_OFFSET 0x8CC -#define AM335x_CTRL_MODULE_CONF_LCD_DATA12_OFFSET 0x8D0 -#define AM335x_CTRL_MODULE_CONF_LCD_DATA13_OFFSET 0x8D4 -#define AM335x_CTRL_MODULE_CONF_LCD_DATA14_OFFSET 0x8D8 -#define AM335x_CTRL_MODULE_CONF_LCD_DATA15_OFFSET 0x8DC -#define AM335x_CTRL_MODULE_CONF_LCD_VSYNC_OFFSET 0x8E0 -#define AM335x_CTRL_MODULE_CONF_LCD_HSYNC_OFFSET 0x8E4 -#define AM335x_CTRL_MODULE_CONF_LCD_PCLK_OFFSET 0x8E8 -#define AM335x_CTRL_MODULE_CONF_LCD_AC_BIAS_EN_OFFSET 0x8EC -#define AM335x_CTRL_MODULE_CONF_MMC0_DAT3_OFFSET 0x8F0 -#define AM335x_CTRL_MODULE_CONF_MMC0_DAT2_OFFSET 0x8F4 -#define AM335x_CTRL_MODULE_CONF_MMC0_DAT1_OFFSET 0x8F8 -#define AM335x_CTRL_MODULE_CONF_MMC0_DAT0_OFFSET 0x8FC -#define AM335x_CTRL_MODULE_CONF_MMC0_CLK_OFFSET 0x900 -#define AM335x_CTRL_MODULE_CONF_MMC0_CMD_OFFSET 0x904 -#define AM335x_CTRL_MODULE_CONF_MII1_COL_OFFSET 0x908 -#define AM335x_CTRL_MODULE_CONF_MII1_CRS_OFFSET 0x90C -#define AM335x_CTRL_MODULE_CONF_MII1_RX_ER_OFFSET 0x910 -#define AM335x_CTRL_MODULE_CONF_MII1_TX_EN_OFFSET 0x914 -#define AM335x_CTRL_MODULE_CONF_MII1_RX_DV_OFFSET 0x918 -#define AM335x_CTRL_MODULE_CONF_MII1_TXD3_OFFSET 0x91C -#define AM335x_CTRL_MODULE_CONF_MII1_TXD2_OFFSET 0x920 -#define AM335x_CTRL_MODULE_CONF_MII1_TXD1_OFFSET 0x924 -#define AM335x_CTRL_MODULE_CONF_MII1_TXD0_OFFSET 0x928 -#define AM335x_CTRL_MODULE_CONF_MII1_TX_CLK_OFFSET 0x92C -#define AM335x_CTRL_MODULE_CONF_MII1_RX_CLK_OFFSET 0x930 -#define AM335x_CTRL_MODULE_CONF_MII1_RXD3_OFFSET 0x934 -#define AM335x_CTRL_MODULE_CONF_MII1_RXD2_OFFSET 0x938 -#define AM335x_CTRL_MODULE_CONF_MII1_RXD1_OFFSET 0x93C -#define AM335x_CTRL_MODULE_CONF_MII1_RXD0_OFFSET 0x940 -#define AM335x_CTRL_MODULE_CONF_RMII1_REF_CLK_OFFSET 0x944 -#define AM335x_CTRL_MODULE_CONF_MDIO_OFFSET 0x948 -#define AM335x_CTRL_MODULE_CONF_MDC_OFFSET 0x94C -#define AM335x_CTRL_MODULE_CONF_SPI0_SCLK_OFFSET 0x950 -#define AM335x_CTRL_MODULE_CONF_SPI0_D0_OFFSET 0x954 -#define AM335x_CTRL_MODULE_CONF_SPI0_D1_OFFSET 0x958 -#define AM335x_CTRL_MODULE_CONF_SPI0_CS0_OFFSET 0x95C -#define AM335x_CTRL_MODULE_CONF_SPI0_CS1_OFFSET 0x960 -#define AM335x_CTRL_MODULE_CONF_ECAP0_IN_PWM0_OUT_OFFSET 0x964 -#define AM335x_CTRL_MODULE_CONF_UART0_CTSN_OFFSET 0x968 -#define AM335x_CTRL_MODULE_CONF_UART0_RTSN_OFFSET 0x96C -#define AM335x_CTRL_MODULE_CONF_UART0_RXD_OFFSET 0x970 -#define AM335x_CTRL_MODULE_CONF_UART0_TXD_OFFSET 0x974 -#define AM335x_CTRL_MODULE_CONF_UART1_CTSN_OFFSET 0x978 -#define AM335x_CTRL_MODULE_CONF_UART1_RTSN_OFFSET 0x97C -#define AM335x_CTRL_MODULE_CONF_UART1_RXD_OFFSET 0x980 -#define AM335x_CTRL_MODULE_CONF_UART1_TXD_OFFSET 0x984 -#define AM335x_CTRL_MODULE_CONF_I2C0_SDA_OFFSET 0x988 -#define AM335x_CTRL_MODULE_CONF_I2C0_SCL_OFFSET 0x98C -#define AM335x_CTRL_MODULE_CONF_MCASP0_ACLKX_OFFSET 0x990 -#define AM335x_CTRL_MODULE_CONF_MCASP0_FSX_OFFSET 0x994 -#define AM335x_CTRL_MODULE_CONF_MCASP0_AXR0_OFFSET 0x998 -#define AM335x_CTRL_MODULE_CONF_MCASP0_AHCLKR_OFFSET 0x99C -#define AM335x_CTRL_MODULE_CONF_MCASP0_ACLKR_OFFSET 0x9A0 -#define AM335x_CTRL_MODULE_CONF_MCASP0_FSR_OFFSET 0x9A4 -#define AM335x_CTRL_MODULE_CONF_MCASP0_AXR1_OFFSET 0x9A8 -#define AM335x_CTRL_MODULE_CONF_MCASP0_AHCLKX_OFFSET 0x9AC -#define AM335x_CTRL_MODULE_CONF_XDMA_EVENT_INTR0_OFFSET 0x9B0 -#define AM335x_CTRL_MODULE_CONF_XDMA_EVENT_INTR1_OFFSET 0x9B4 -#define AM335x_CTRL_MODULE_CONF_WARMRSTN_OFFSET 0x9B8 -#define AM335x_CTRL_MODULE_CONF_PWRONRSTN_OFFSET 0x9BC -#define AM335x_CTRL_MODULE_CONF_NNMI_OFFSET 0x9C0 -#define AM335x_CTRL_MODULE_CONF_XTALIN_OFFSET 0x9C4 -#define AM335x_CTRL_MODULE_CONF_XTALOUT_OFFSET 0x9C8 -#define AM335x_CTRL_MODULE_CONF_TMS_OFFSET 0x9D0 -#define AM335x_CTRL_MODULE_CONF_TDI_OFFSET 0x9D4 -#define AM335x_CTRL_MODULE_CONF_TDO_OFFSET 0x9D8 -#define AM335x_CTRL_MODULE_CONF_TCK_OFFSET 0x9DC -#define AM335x_CTRL_MODULE_CONF_TRSTN_OFFSET 0x9E0 -#define AM335x_CTRL_MODULE_CONF_EMU0_OFFSET 0x9E4 -#define AM335x_CTRL_MODULE_CONF_EMU1_OFFSET 0x9E8 -#define AM335x_CTRL_MODULE_CONF_RTC_XTALIN_OFFSET 0x9EC -#define AM335x_CTRL_MODULE_CONF_RTC_XTALOUT_OFFSET 0x9F0 -#define AM335x_CTRL_MODULE_CONF_RTC_PWRONRSTN_OFFSET 0x9F8 -#define AM335x_CTRL_MODULE_CONF_PMIC_POWER_EN_OFFSET 0x9FC -#define AM335x_CTRL_MODULE_CONF_EXT_WAKEUP_OFFSET 0xA00 -#define AM335x_CTRL_MODULE_CONF_RTC_KALDO_ENN_OFFSET 0xA04 -#define AM335x_CTRL_MODULE_CONF_USB0_DM_OFFSET 0xA08 -#define AM335x_CTRL_MODULE_CONF_USB0_DP_OFFSET 0xA0C -#define AM335x_CTRL_MODULE_CONF_USB0_CE_OFFSET 0xA10 -#define AM335x_CTRL_MODULE_CONF_USB0_ID_OFFSET 0xA14 -#define AM335x_CTRL_MODULE_CONF_USB0_VBUS_OFFSET 0xA18 -#define AM335x_CTRL_MODULE_CONF_USB0_DRVVBUS_OFFSET 0xA1C -#define AM335x_CTRL_MODULE_CONF_USB1_DM_OFFSET 0xA20 -#define AM335x_CTRL_MODULE_CONF_USB1_DP_OFFSET 0xA24 -#define AM335x_CTRL_MODULE_CONF_USB1_CE_OFFSET 0xA28 -#define AM335x_CTRL_MODULE_CONF_USB1_ID_OFFSET 0xA2C -#define AM335x_CTRL_MODULE_CONF_USB1_VBUS_OFFSET 0xA30 -#define AM335x_CTRL_MODULE_CONF_USB1_DRVVBUS_OFFSET 0xA34 -#define AM335x_CTRL_MODULE_CQDETECT_STATUS_OFFSET 0xE00 -#define AM335x_CTRL_MODULE_DDR_IO_CTRL_OFFSET 0xE04 -#define AM335x_CTRL_MODULE_VTP_CTRL_OFFSET 0xE0C -#define AM335x_CTRL_MODULE_VREF_CTRL_OFFSET 0xE14 -#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_0_3_OFFSET 0xF90 -#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_4_7_OFFSET 0xF94 -#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_8_11_OFFSET 0xF98 -#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_12_15_OFFSET 0xF9C -#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_16_19_OFFSET 0xFA0 -#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_20_23_OFFSET 0xFA4 -#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_24_27_OFFSET 0xFA8 -#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_28_31_OFFSET 0xFAC -#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_32_35_OFFSET 0xFB0 -#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_36_39_OFFSET 0xFB4 -#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_40_43_OFFSET 0xFB8 -#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_44_47_OFFSET 0xFBC -#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_48_51_OFFSET 0xFC0 -#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_52_55_OFFSET 0xFC4 -#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_56_59_OFFSET 0xFC8 -#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_60_63_OFFSET 0xFCC -#define AM335x_CTRL_MODULE_TIMER_EVT_CAPT_OFFSET 0xFD0 -#define AM335x_CTRL_MODULE_ECAP_EVT_CAPT_OFFSET 0xFD4 -#define AM335x_CTRL_MODULE_ADC_EVT_CAPT_OFFSET 0xFD8 -#define AM335x_CTRL_MODULE_RESET_ISO_OFFSET 0x1000 -#define AM335x_CTRL_MODULE_DDR_CKE_CTRL_OFFSET 0x131C -#define AM335x_CTRL_MODULE_SMA2_OFFSET 0x1320 -#define AM335x_CTRL_MODULE_M3_TXEV_EOI_OFFSET 0x1324 -#define AM335x_CTRL_MODULE_IPC_MSG_REG0_OFFSET 0x1328 -#define AM335x_CTRL_MODULE_IPC_MSG_REG1_OFFSET 0x132C -#define AM335x_CTRL_MODULE_IPC_MSG_REG2_OFFSET 0x1330 -#define AM335x_CTRL_MODULE_IPC_MSG_REG3_OFFSET 0x1334 -#define AM335x_CTRL_MODULE_IPC_MSG_REG4_OFFSET 0x1338 -#define AM335x_CTRL_MODULE_IPC_MSG_REG5_OFFSET 0x133C -#define AM335x_CTRL_MODULE_IPC_MSG_REG6_OFFSET 0x1340 -#define AM335x_CTRL_MODULE_IPC_MSG_REG7_OFFSET 0x1344 -#define AM335x_CTRL_MODULE_DDR_CMD0_IOCTRL_OFFSET 0x1404 -#define AM335x_CTRL_MODULE_DDR_CMD1_IOCTRL_OFFSET 0x1408 -#define AM335x_CTRL_MODULE_DDR_CMD2_IOCTRL_OFFSET 0x140C -#define AM335x_CTRL_MODULE_DDR_DATA0_IOCTRL_OFFSET 0x1440 -#define AM335x_CTRL_MODULE_DDR_DATA1_IOCTRL_OFFSET 0x1444 - -#endif - -/** - * @} - */ Index: kernel/genarch/include/drivers/am335x/iomux.h =================================================================== --- kernel/genarch/include/drivers/am335x/iomux.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,268 +1,0 @@ -/* - * Copyright (c) 2012 Matteo Facchinetti - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Texas Instruments AM335x CONTROL_MODULE: I/O multiplexing. - */ - -#ifndef KERN_AM335X_IOMUX_H_ -#define KERN_AM335X_IOMUX_H_ - -#include - -/* Pad Control Register for each configurable pin p. 876 */ -#define AM335X_IOMUX_SLEWRATE_SLOW_FLAG (1 << 6) -#define AM335X_IOMUX_RX_ENABLE_FLAG (1 << 5) -#define AM335X_IOMUX_PULLUP_FLAG (1 << 4) -#define AM335X_IOMUX_PULLUPDOWN_ENABLE_FLAG (1 << 3) -#define AM335X_IOMUX_MODE0 0 -#define AM335X_IOMUX_MODE1 1 -#define AM335X_IOMUX_MODE2 2 -#define AM335X_IOMUX_MODE3 3 -#define AM335X_IOMUX_MODE4 4 -#define AM335X_IOMUX_MODE5 5 -#define AM335X_IOMUX_MODE6 6 -#define AM335X_IOMUX_MODE7 7 - -/* AM335X CONTROL_MODULE configurable I/O pin. Table 9-10 at p. 886 */ -#define AM335X_IOMUX_CONF_BASE_ADDRESS 0x44E10800 - -typedef struct { - ioport32_t gpmc_ad1; - ioport32_t gpmc_ad2; - ioport32_t gpmc_ad3; - ioport32_t gpmc_ad4; - ioport32_t gpmc_ad5; - ioport32_t gpmc_ad6; - ioport32_t gpmc_ad7; - ioport32_t gpmc_ad8; - ioport32_t gpmc_ad9; - ioport32_t gpmc_ad10; - ioport32_t gpmc_ad11; - ioport32_t gpmc_ad12; - ioport32_t gpmc_ad13; - ioport32_t gpmc_ad14; - ioport32_t gpmc_ad15; - ioport32_t gpmc_a0; - ioport32_t gpmc_a1; - ioport32_t gpmc_a2; - ioport32_t gpmc_a3; - ioport32_t gpmc_a4; - ioport32_t gpmc_a5; - ioport32_t gpmc_a6; - ioport32_t gpmc_a7; - ioport32_t gpmc_a8; - ioport32_t gpmc_a9; - ioport32_t gpmc_a10; - ioport32_t gpmc_a11; - ioport32_t gpmc_wait0; - ioport32_t gpmc_wpn; - ioport32_t gpmc_be1n; - ioport32_t gpmc_csn0; - ioport32_t gpmc_csn1; - ioport32_t gpmc_csn2; - ioport32_t gpmc_csn3; - ioport32_t gpmc_clk; - ioport32_t gpmc_advn_ale; - ioport32_t gpmc_oen_ren; - ioport32_t gpmc_wen; - ioport32_t gpmc_be0n_cle; - ioport32_t lcd_data0; - ioport32_t lcd_data1; - ioport32_t lcd_data2; - ioport32_t lcd_data3; - ioport32_t lcd_data4; - ioport32_t lcd_data5; - ioport32_t lcd_data6; - ioport32_t lcd_data7; - ioport32_t lcd_data8; - ioport32_t lcd_data9; - ioport32_t lcd_data10; - ioport32_t lcd_data11; - ioport32_t lcd_data12; - ioport32_t lcd_data13; - ioport32_t lcd_data14; - ioport32_t lcd_data15; - ioport32_t lcd_vsync; - ioport32_t lcd_hsync; - ioport32_t lcd_pclk; - ioport32_t lcd_ac_bias_en; - ioport32_t mmc0_dat3; - ioport32_t mmc0_dat2; - ioport32_t mmc0_dat1; - ioport32_t mmc0_dat0; - ioport32_t mmc0_clk; - ioport32_t mmc0_cmd; - ioport32_t mii1_col; - ioport32_t mii1_crs; - ioport32_t mii1_rxerr; - ioport32_t mii1_txen; - ioport32_t mii1_rxdv; - ioport32_t mii1_txd3; - ioport32_t mii1_txd2; - ioport32_t mii1_txd1; - ioport32_t mii1_txd0; - ioport32_t mii1_txclk; - ioport32_t mii1_rxclk; - ioport32_t mii1_rxd3; - ioport32_t mii1_rxd2; - ioport32_t mii1_rxd1; - ioport32_t mii1_rxd0; - ioport32_t rmii1_refclk; - ioport32_t mdio_data; - ioport32_t mdio_clk; - ioport32_t spi0_sclk; - ioport32_t spi0_d0; - ioport32_t spi0_d1; - ioport32_t spi0_cs0; - ioport32_t spi0_cs1; - ioport32_t ecap0_in_pwm0_out; - ioport32_t uart0_ctsn; - ioport32_t uart0_rtsn; - ioport32_t uart0_rxd; - ioport32_t uart0_txd; - ioport32_t uart1_ctsn; - ioport32_t uart1_rtsn; - ioport32_t uart1_rxd; - ioport32_t uart1_txd; - ioport32_t i2c0_sda; - ioport32_t i2c0_scl; - ioport32_t mcasp0_aclkx; - ioport32_t mcasp0_fsx; - ioport32_t mcasp0_axr0; - ioport32_t mcasp0_ahclkr; - ioport32_t mcasp0_aclkr; - ioport32_t mcasp0_fsr; - ioport32_t mcasp0_axr1; - ioport32_t mcasp0_ahclkx; - ioport32_t xdma_event_intr0; - ioport32_t xdma_event_intr1; - ioport32_t nresetin_out; - ioport32_t porz; - ioport32_t nnmi; - ioport32_t osc0_in; - ioport32_t osc0_out; - ioport32_t osc0_vss; - ioport32_t tms; - ioport32_t tdi; - ioport32_t tdo; - ioport32_t tck; - ioport32_t ntrst; - ioport32_t emu0; - ioport32_t emu1; - ioport32_t osc1_in; - ioport32_t osc1_out; - ioport32_t osc1_vss; - ioport32_t rtc_porz; - ioport32_t pmic_power_en; - ioport32_t ext_wakeup; - ioport32_t enz_kaldo_1p8v; - ioport32_t usb0_dm; - ioport32_t usb0_dp; - ioport32_t usb0_ce; - ioport32_t usb0_id; - ioport32_t usb0_vbus; - ioport32_t usb0_drvvbus; - ioport32_t usb1_dm; - ioport32_t usb1_dp; - ioport32_t usb1_ce; - ioport32_t usb1_id; - ioport32_t usb1_vbus; - ioport32_t usb1_drvvbus; - ioport32_t ddr_resetn; - ioport32_t ddr_csn0; - ioport32_t ddr_cke; - ioport32_t ddr_ck; - ioport32_t ddr_nck; - ioport32_t ddr_casn; - ioport32_t ddr_rasn; - ioport32_t ddr_wen; - ioport32_t ddr_ba0; - ioport32_t ddr_ba1; - ioport32_t ddr_ba2; - ioport32_t ddr_a0; - ioport32_t ddr_a1; - ioport32_t ddr_a2; - ioport32_t ddr_a3; - ioport32_t ddr_a4; - ioport32_t ddr_a5; - ioport32_t ddr_a6; - ioport32_t ddr_a7; - ioport32_t ddr_a8; - ioport32_t ddr_a9; - ioport32_t ddr_a10; - ioport32_t ddr_a11; - ioport32_t ddr_a12; - ioport32_t ddr_a13; - ioport32_t ddr_a14; - ioport32_t ddr_a15; - ioport32_t ddr_odt; - ioport32_t ddr_d0; - ioport32_t ddr_d1; - ioport32_t ddr_d2; - ioport32_t ddr_d3; - ioport32_t ddr_d4; - ioport32_t ddr_d5; - ioport32_t ddr_d6; - ioport32_t ddr_d7; - ioport32_t ddr_d8; - ioport32_t ddr_d9; - ioport32_t ddr_d10; - ioport32_t ddr_d11; - ioport32_t ddr_d12; - ioport32_t ddr_d13; - ioport32_t ddr_d14; - ioport32_t ddr_d15; - ioport32_t ddr_dqm0; - ioport32_t ddr_dqm1; - ioport32_t ddr_dqs0; - ioport32_t ddr_dqsn0; - ioport32_t ddr_dqs1; - ioport32_t ddr_dqsn1; - ioport32_t ddr_vref; - ioport32_t ddr_vtp; - ioport32_t ain7; - ioport32_t ain6; - ioport32_t ain5; - ioport32_t ain4; - ioport32_t ain3; - ioport32_t ain2; - ioport32_t ain1; - ioport32_t ain0; - ioport32_t vrefp; - ioport32_t vrefn; - ioport32_t avdd; - ioport32_t avss; - ioport32_t iforce; - ioport32_t vsense; - ioport32_t testout; -} am335x_iomux_conf_regs_t; -#endif /* KERN_AM335X_IOMUX_H_ */ Index: kernel/genarch/include/drivers/am335x/irc.h =================================================================== --- kernel/genarch/include/drivers/am335x/irc.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,255 +1,0 @@ -/* - * Copyright (c) 2012 Maurizio Lombardi - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup genarch - * @{ - */ - -/** - * @file - * @brief Texas Instruments AM335x MPU on-chip interrupt controller driver. - */ - -#ifndef KERN_AM335x_IRQC_H_ -#define KERN_AM335x_IRQC_H_ - -#define AM335x_IRC_BASE_ADDRESS 0x48200000 -#define AM335x_IRC_SIZE 4096 - -#define AM335x_IRC_IRQ_COUNT 128 - -#include - -typedef struct { - const ioport32_t revision; -#define AM335x_IRC_REV_MASK 0xFF - - const uint8_t padd0[12]; - - /* This register controls the various parameters - * of the OCP interface. - */ - ioport32_t sysconfig; -#define AM335x_IRC_SYSCONFIG_AUTOIDLE_FLAG (1 << 0) -#define AM335x_IRC_SYSCONFIG_SOFTRESET_FLAG (1 << 1) - - /* This register provides status information about the module */ - const ioport32_t sysstatus; -#define AM335x_IRC_SYSSTATUS_RESET_DONE_FLAG (1 << 0) - - const uint8_t padd1[40]; - - /* This register supplies the currently active IRQ interrupt number */ - ioport32_t sir_irq; -#define AM335x_IRC_SIR_IRQ_ACTIVEIRQ_MASK 0x7F -#define AM335x_IRC_SIR_IRQ_SPURIOUSIRQFLAG_MASK 0xFFFFFFF8 - - /* This register supplies the currently active FIQ interrupt number */ - const ioport32_t sir_fiq; -#define AM335x_IRC_FIQ_IRQ_ACTIVEFIQ_MASK 0x7F -#define AM335x_IRC_FIQ_IRQ_SPURIOUSFIQFLAG_MASK 0xFFFFFFF8 - - /* This register contains the new interrupt agreement bits */ - ioport32_t control; -#define AM335x_IRC_CONTROL_NEWIRQAGR_FLAG (1 << 0) -#define AM335x_IRC_CONTROL_NEWFIQAGR_FLAG (1 << 1) - - /* This register controls protection of the other registers. - * This register can only be accessed in priviledged mode, regardless - * of the current value of the protection bit. - */ - ioport32_t protection; -#define AM335x_IRC_PROTECTION_FLAG (1 << 0) - - /* This register controls the clock auto-idle for the functional - * clock and the input synchronizers. - */ - ioport32_t idle; -#define AM335x_IRC_IDLE_FUNCIDLE_FLAG (1 << 0) -#define AM335x_IRC_IDLE_TURBO_FLAG (1 << 1) - - const uint8_t padd2[12]; - - /* This register supplies the currently active IRQ priority level */ - const ioport32_t irq_priority; -#define AM335x_IRC_IRQ_PRIORITY_IRQPRIORITY_MASK 0x7F -#define AM335x_IRC_IRQ_PRIORITY_SPURIOUSIRQFLAG_MASK 0xFFFFFFF8 - - /* This register supplies the currently active FIQ priority level */ - const ioport32_t fiq_priority; -#define AM335x_IRC_FIQ_PRIORITY_FIQPRIORITY_MASK 0x7F -#define AM335x_IRC_FIQ_PRIORITY_SPURIOUSIRQFLAG_MASK 0xFFFFFFF8 - - /* This register sets the priority threshold */ - ioport32_t threshold; -#define AM335x_IRC_THRESHOLD_PRIORITYTHRESHOLD_MASK 0xFF -#define AM335x_IRC_THRESHOLD_PRIORITYTHRESHOLD_ENABLED 0x00 -#define AM335x_IRC_THRESHOLD_PRIORITYTHRESHOLD_DISABLED 0xFF - - const uint8_t padd[20]; - - struct { - /* Raw interrupt input status before masking */ - const ioport32_t itr; - - /* Interrupt mask */ - ioport32_t mir; - - /* This register is used to clear the interrupt mask bits, - * Write 1 clears the mask bit to 0. - */ - ioport32_t mir_clear; - - /* This register is used to set the interrupt mask bits, - * Write 1 sets the mask bit to 1. - */ - ioport32_t mir_set; - - /* This register is used to set the software interrupt bits, - * it is also used to read the current active software - * interrupts. - * Write 1 sets the software interrups bits to 1. - */ - ioport32_t isr_set; - - /* This register is used to clear the software interrups bits. - * Write 1 clears the software interrupt bits to 0. - */ - ioport32_t isr_clear; - - /* This register contains the IRQ status after masking. */ - const ioport32_t pending_irq; - - /* This register contains the FIQ status after masking. */ - const ioport32_t pending_fiq; - } interrupts[4]; - - /* These registers contain the priority for the interrups and - * the FIQ/IRQ steering. - */ - ioport32_t ilr[AM335x_IRC_IRQ_COUNT]; -/* 0 = Interrupt routed to IRQ, 1 = interrupt routed to FIQ */ -#define AM335x_IRC_ILR_FIQNIRQ_FLAG (1 << 0) -#define AM335x_IRC_ILR_PRIORITY_MASK 0x3F -#define AM335x_IRC_ILR_PRIORITY_SHIFT 2 - -} am335x_irc_regs_t; - -static inline void am335x_irc_init(am335x_irc_regs_t *regs) -{ - int i; - - /* Initialization sequence */ - - /* 1 - Program the SYSCONFIG register: if necessary, enable the - * autogating by setting the AUTOIDLE bit. - */ - regs->sysconfig &= ~AM335x_IRC_SYSCONFIG_AUTOIDLE_FLAG; - - /* 2 - Program the IDLE register: if necessary, disable functional - * clock autogating or enable synchronizer autogating by setting - * the FUNCIDLE bit or the TURBO bit accordingly. - */ - regs->idle &= ~AM335x_IRC_IDLE_FUNCIDLE_FLAG; - regs->idle &= ~AM335x_IRC_IDLE_TURBO_FLAG; - - /* 3 - Program ILRm register for each interrupt line: Assign a - * priority level and set the FIQNIRQ bit for an FIQ interrupt - * (by default, interrupts are mapped to IRQ and - * priority is 0 (highest). - */ - - for (i = 0; i < AM335x_IRC_IRQ_COUNT; ++i) - regs->ilr[i] = 0; - - /* 4 - Program the MIRn register: Enable interrupts (by default, - * all interrupt lines are masked). - */ - for (i = 0; i < 4; ++i) - regs->interrupts[i].mir_set = 0xFFFFFFFF; -} - -/** Get the currently active IRQ interrupt number - * - * @param regs Pointer to the irc memory mapped registers - * - * @return The active IRQ interrupt number - */ -static inline unsigned am335x_irc_inum_get(am335x_irc_regs_t *regs) -{ - return regs->sir_irq & AM335x_IRC_SIR_IRQ_ACTIVEIRQ_MASK; -} - -/** Reset IRQ output and enable new IRQ generation - * - * @param regs Pointer to the irc memory mapped registers - */ -static inline void am335x_irc_irq_ack(am335x_irc_regs_t *regs) -{ - regs->control = AM335x_IRC_CONTROL_NEWIRQAGR_FLAG; -} - -/** Reset FIQ output and enable new FIQ generation - * - * @param regs Pointer to the irc memory mapped registers - */ -static inline void am335x_irc_fiq_ack(am335x_irc_regs_t *regs) -{ - regs->control = AM335x_IRC_CONTROL_NEWFIQAGR_FLAG; -} - -/** Clear an interrupt mask bit - * - * @param regs Pointer to the irc memory mapped registers - * @param inum The interrupt to be enabled - */ -static inline void am335x_irc_enable(am335x_irc_regs_t *regs, unsigned inum) -{ - ASSERT(inum < AM335x_IRC_IRQ_COUNT); - const unsigned set = inum / 32; - const unsigned pos = inum % 32; - regs->interrupts[set].mir_clear = (1 << pos); -} - -/** Set an interrupt mask bit - * - * @param regs Pointer to the irc memory mapped registers - * @param inum The interrupt to be disabled - */ -static inline void am335x_irc_disable(am335x_irc_regs_t *regs, unsigned inum) -{ - ASSERT(inum < AM335x_IRC_IRQ_COUNT); - const unsigned set = inum / 32; - const unsigned pos = inum % 32; - regs->interrupts[set].mir_set = (1 << pos); -} - -#endif - -/** - * @} - */ Index: kernel/genarch/include/drivers/am335x/timer.h =================================================================== --- kernel/genarch/include/drivers/am335x/timer.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,100 +1,0 @@ -/* - * Copyright (c) 2012 Maurizio Lombardi - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Texas Instruments AM335x timer driver. - */ - -#ifndef _KERN_AM335X_TIMER_H_ -#define _KERN_AM335X_TIMER_H_ - -#include - -#define AM335x_DMTIMER0_BASE_ADDRESS 0x44E05000 -#define AM335x_DMTIMER0_SIZE 4096 -#define AM335x_DMTIMER0_IRQ 66 - -#define AM335x_DMTIMER2_BASE_ADDRESS 0x48040000 -#define AM335x_DMTIMER2_SIZE 4096 -#define AM335x_DMTIMER2_IRQ 68 - -#define AM335x_DMTIMER3_BASE_ADDRESS 0x48042000 -#define AM335x_DMTIMER3_SIZE 4096 -#define AM335x_DMTIMER3_IRQ 69 - -#define AM335x_DMTIMER4_BASE_ADDRESS 0x48044000 -#define AM335x_DMTIMER4_SIZE 4096 -#define AM335x_DMTIMER4_IRQ 92 - -#define AM335x_DMTIMER5_BASE_ADDRESS 0x48046000 -#define AM335x_DMTIMER5_SIZE 4096 -#define AM335x_DMTIMER5_IRQ 93 - -#define AM335x_DMTIMER6_BASE_ADDRESS 0x48048000 -#define AM335x_DMTIMER6_SIZE 4096 -#define AM335x_DMTIMER6_IRQ 94 - -#define AM335x_DMTIMER7_BASE_ADDRESS 0x4804A000 -#define AM335x_DMTIMER7_SIZE 4096 -#define AM335x_DMTIMER7_IRQ 95 - -typedef enum { - DMTIMER0 = 0, - DMTIMER1_1MS, - DMTIMER2, - DMTIMER3, - DMTIMER4, - DMTIMER5, - DMTIMER6, - DMTIMER7, - - TIMERS_MAX -} am335x_timer_id_t; - -typedef struct am335x_timer { - am335x_timer_regs_t *regs; - am335x_timer_id_t id; -} am335x_timer_t; - -extern int am335x_timer_init(am335x_timer_t *timer, am335x_timer_id_t id, - unsigned hz, unsigned srcclk_hz); -extern void am335x_timer_intr_ack(am335x_timer_t *timer); -extern void am335x_timer_reset(am335x_timer_t *timer); -extern void am335x_timer_start(am335x_timer_t *timer); -extern void am335x_timer_stop(am335x_timer_t *timer); - - -#endif - -/** - * @} - */ - Index: kernel/genarch/include/drivers/am335x/timer_regs.h =================================================================== --- kernel/genarch/include/drivers/am335x/timer_regs.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,159 +1,0 @@ -/* - * Copyright (c) 2012 Maurizio Lombardi - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Texas Instruments AM335x DMTIMER memory mapped registers. - */ - -#ifndef _KERN_AM335X_TIMER_REGS_H_ -#define _KERN_AM335X_TIMER_REGS_H_ - -#include - -typedef struct am335x_timer_regs { - - /* This read only register contains the - * revision number of the module - */ - ioport32_t const tidr; -#define AM335x_TIMER_TIDR_MINOR_MASK 0x3F -#define AM335x_TIMER_TIDR_MINOR_SHIFT 0 -#define AM335x_TIMER_TIDR_CUSTOM_MASK 0x03 -#define AM335x_TIMER_TIDR_CUSTOM_SHIFT 6 -#define AM335x_TIMER_TIDR_MAJOR_MASK 0x07 -#define AM335x_TIMER_TIDR_MAJOR_SHIFT 8 -#define AM335x_TIMER_TIDR_RTL_MASK 0x1F -#define AM335x_TIMER_TIDR_RTL_SHIFT 11 -#define AM335x_TIMER_TIDR_FUNC_MASK 0xFFF -#define AM335x_TIMER_TIDR_FUNC_SHIFT 16 -#define AM335x_TIMER_TIDR_SCHEME_MASK 0x03 -#define AM335x_TIMER_TIDR_SCHEME_SHIFT 30 - - ioport32_t const pad1[3]; - - /* This register allows controlling various - * parameters of the OCP interface. - */ - ioport32_t tiocp_cfg; -#define AM335x_TIMER_TIOCPCFG_SOFTRESET_FLAG (1 << 0) -#define AM335x_TIMER_TIOCPCFG_EMUFREE_FLAG (1 << 1) - -#define AM335x_TIMER_TIOCPCFG_IDLEMODE_MASK 0x02 -#define AM335x_TIMER_TIOCPCFG_IDLEMODE_SHIFT 2 -# define AM335x_TIMER_TIOCCPCFG_IDLEMODE_FORCE 0x00 -# define AM335x_TIMER_TIOCCPCFG_IDLEMODE_DISABLED 0x01 -# define AM335x_TIMER_TIOCCPCFG_IDLEMODE_SMART 0x02 -# define AM335x_TIMER_TIOCCPCFG_IDLEMODE_SMART_WAKEUP 0x03 - - ioport32_t const pad2[4]; - - ioport32_t irqstatus_raw; -#define AM335x_TIMER_IRQSTATUS_RAW_MAT_FLAG (1 << 0) -#define AM335x_TIMER_IRQSTATUS_RAW_OVF_FLAG (1 << 1) -#define AM335x_TIMER_IRQSTATUS_RAW_TCAR_FLAG (1 << 2) - - ioport32_t irqstatus; -#define AM335x_TIMER_IRQSTATUS_MAT_FLAG (1 << 0) -#define AM335x_TIMER_IRQSTATUS_OVF_FLAG (1 << 1) -#define AM335x_TIMER_IRQSTATUS_TCAR_FLAG (1 << 2) - - ioport32_t irqenable_set; -#define AM335x_TIMER_IRQENABLE_SET_MAT_FLAG (1 << 0) -#define AM335x_TIMER_IRQENABLE_SET_OVF_FLAG (1 << 1) -#define AM335x_TIMER_IRQENABLE_SET_TCAR_FLAG (1 << 2) - - ioport32_t irqenable_clr; -#define AM335x_TIMER_IRQENABLE_CLR_MAT_FLAG (1 << 0) -#define AM335x_TIMER_IRQENABLE_CLR_OVF_FLAG (1 << 1) -#define AM335x_TIMER_IRQENABLE_CLR_TCAR_FLAG (1 << 2) - - /* Timer IRQ wakeup enable register */ - ioport32_t irqwakeen; -#define AM335x_TIMER_IRQWAKEEN_MAT_FLAG (1 << 0) -#define AM335x_TIMER_IRQWAKEEN_OVF_FLAG (1 << 1) -#define AM335x_TIMER_IRQWAKEEN_TCAR_FLAG (1 << 2) - - /* Timer control register */ - ioport32_t tclr; -#define AM335x_TIMER_TCLR_ST_FLAG (1 << 0) -#define AM335x_TIMER_TCLR_AR_FLAG (1 << 1) -#define AM335x_TIMER_TCLR_PTV_MASK 0x07 -#define AM335x_TIMER_TCLR_PTV_SHIFT 2 -#define AM335x_TIMER_TCLR_PRE_FLAG (1 << 5) -#define AM335x_TIMER_TCLR_CE_FLAG (1 << 6) -#define AM335x_TIMER_TCLR_SCPWM_FLAG (1 << 7) -#define AM335x_TIMER_TCLR_TCM_MASK 0x03 -#define AM335x_TIMER_TCLR_TCM_SHIFT 8 -#define AM335x_TIMER_TCLR_TGR_MASK 0x03 -#define AM335x_TIMER_TCLR_TGR_SHIFT 10 -#define AM335x_TIMER_TCLR_PT_FLAG (1 << 12) -#define AM335x_TIMER_TCLR_CAPT_MODE_FLAG (1 << 13) -#define AM335x_TIMER_TCLR_GPO_CFG_FLAG (1 << 14) - - /* Timer counter register */ - ioport32_t tcrr; - - /* Timer load register */ - ioport32_t tldr; - - /* Timer trigger register */ - ioport32_t const ttgr; - - /* Timer write posted status register */ - ioport32_t twps; -#define AM335x_TIMER_TWPS_PEND_TCLR (1 << 0) -#define AM335x_TIMER_TWPS_PEND_TCRR (1 << 1) -#define AM335x_TIMER_TWPS_PEND_TLDR (1 << 2) -#define AM335x_TIMER_TWPS_PEND_TTGR (1 << 3) -#define AM335x_TIMER_TWPS_PEND_TMAR (1 << 4) - - /* Timer match register */ - ioport32_t tmar; - - /* Timer capture register */ - ioport32_t tcar1; - - /* Timer synchronous interface control register */ - ioport32_t tsicr; -#define AM335x_TIMER_TSICR_SFT_FLAG (1 << 1) -#define AM335x_TIMER_TSICR_POSTED_FLAG (1 << 2) - - /* Timer capture register */ - ioport32_t tcar2; - -} am335x_timer_regs_t; - -#endif - -/** - * @} - */ - Index: kernel/genarch/include/drivers/am335x/uart.h =================================================================== --- kernel/genarch/include/drivers/am335x/uart.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,90 +1,0 @@ -/* - * Copyright (c) Maurizio Lombardi - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Texas Instruments AM335x UART driver. - */ - -#ifndef _KERN_AM335X_UART_H_ -#define _KERN_AM335X_UART_H_ - -#include "uart_regs.h" - -#define AM335x_UART0_BASE_ADDRESS 0x44E09000 -#define AM335x_UART0_SIZE 4096 -#define AM335x_UART0_IRQ 72 - -#define AM335x_UART1_BASE_ADDRESS 0x48022000 -#define AM335x_UART1_SIZE 4096 -#define AM335x_UART1_IRQ 73 - -#define AM335x_UART2_BASE_ADDRESS 0x48024000 -#define AM335x_UART2_SIZE 4096 -#define AM335x_UART2_IRQ 74 - -#define AM335x_UART3_BASE_ADDRESS 0x481A6000 -#define AM335x_UART3_SIZE 4096 -#define AM335x_UART3_IRQ 44 - -#define AM335x_UART4_BASE_ADDRESS 0x481A8000 -#define AM335x_UART4_SIZE 4096 -#define AM335x_UART4_IRQ 45 - -#define AM335x_UART5_BASE_ADDRESS 0x481AA000 -#define AM335x_UART5_SIZE 4096 -#define AM335x_UART5_IRQ 46 - -typedef struct { - am335x_uart_regs_t *regs; - indev_t *indev; - outdev_t outdev; - irq_t irq; -} am335x_uart_t; - -#ifdef CONFIG_AM335X_UART -extern bool am335x_uart_init(am335x_uart_t *uart, inr_t interrupt, - uintptr_t addr, size_t size); - -extern void am335x_uart_input_wire(am335x_uart_t *uart, indev_t *indev); -#else -static bool am335x_uart_init(am335x_uart_t *uart, inr_t interrupt, - uintptr_t addr, size_t size) -{ return true; } - -static void am335x_uart_input_wire(am335x_uart_t *uart, indev_t *indev) {} -#endif - -#endif - -/** - * @} - */ - Index: kernel/genarch/include/drivers/am335x/uart_regs.h =================================================================== --- kernel/genarch/include/drivers/am335x/uart_regs.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,431 +1,0 @@ -/* - * Copyright (c) 2012 Jan Vesely - * Copyright (c) 2012 Maurizio Lombardi - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Texas Instruments AM335x UART memory mapped registers. - */ - -#ifndef _KERN_AM335X_UART_REGS_H_ -#define _KERN_AM335X_UART_REGS_H_ - -#include -#include -#include - -typedef struct { - union { - /** Stores lower part of the 14-bit baud divisor */ - ioport32_t dll; -#define AM335x_UART_DLL_MASK (0xff) - - /** Receive holding register */ - const ioport32_t rhr; -#define AM335x_UART_RHR_MASK (0xff) - - /** Transmit holding register */ - ioport32_t thr; -#define AM335x_UART_THR_MASK (0xff) - }; - - union { - /** Stores higher part of the 14-bit baud divisor */ - ioport32_t dlh; -#define AM335x_UART_DLH_MASK (0x1f) - - /** Interrupt enable registers */ - ioport32_t ier; -#define AM335x_UART_IER_RHR_IRQ_FLAG (1 << 0) -#define AM335x_UART_IER_THR_IRQ_FLAG (1 << 1) -#define AM335x_UART_IER_LINE_STS_IRQ_FLAG (1 << 2) -#define AM335x_UART_IER_MODEM_STS_IRQ_FLAG (1 << 3) -#define AM335x_UART_IER_SLEEP_MODE_FLAG (1 << 4) -#define AM335x_UART_IER_XOFF_IRQ_FLAG (1 << 5) -#define AM335x_UART_IER_RTS_IRQ_FLAG (1 << 6) -#define AM335x_UART_IER_CTS_IRQ_FLAG (1 << 7) - -#define AM335x_CIR_IER_RHR_IRQ_FLAG (1 << 0) -#define AM335x_CIR_IER_THR_IRQ_FLAG (1 << 1) -#define AM335x_CIR_IER_RX_STOP_IRQ_FLAG (1 << 2) -#define AM335x_CIR_IER_RX_OVERRUN_IRQ_FLAG (1 << 3) -#define AM335x_CIR_IER_TX_STS_IRQ_FLAG (1 << 5) - -#define AM335x_IRDA_IER_RHR_IRQ_FLAG (1 << 0) -#define AM335x_IRDA_IER_THR_IRQ_FLAG (1 << 1) -#define AM335x_IRDA_IER_LAST_RX_BYTE_IRQ_FLAG (1 << 2) -#define AM335x_IRDA_IER_RX_OVERRUN_IRQ_FLAG (1 << 3) -#define AM335x_IRDA_IER_STS_FIFO_TRIG_IRQ_FLAG (1 << 4) -#define AM335x_IRDA_IER_TX_STS_IRQ_FLAG (1 << 5) -#define AM335x_IRDA_IER_LINE_STS_IRQ_FLAG (1 << 6) -#define AM335x_IRDA_IER_EOF_IRQ_FLAG (1 << 7) - }; - - union { - /** Interrupt identification register */ - const ioport32_t iir; -#define AM335x_UART_IIR_IRQ_PENDING_FLAG (1 << 0) -#define AM335x_UART_IIR_TYPE_MASK (0x1f) -#define AM335x_UART_IIR_TYPE_SHIFT (1) -#define AM335x_UART_IIR_FCR_MASK (0x3) -#define AM335x_UART_IIR_FCR_SHIFT (6) - -#define AM335x_CIR_IIR_RHR_IRQ_FLAG (1 << 0) -#define AM335x_CIR_IIR_THR_IRQ_FLAG (1 << 1) -#define AM335x_CIR_IIR_RX_STOP_IRQ_FLAG (1 << 2) -#define AM335x_CIR_IIR_RX_OE_IRQ_FLAG (1 << 3) -#define AM335x_CIR_IIR_TX_STS_IRQ_FLAG (1 << 5) - -#define AM335x_IRDA_IIR_RHR_IRQ_FLAG (1 << 0) -#define AM335x_IRDA_IIR_THR_IRQ_FLAG (1 << 1) -#define AM335x_IRDA_IIR_RX_FIFO_LB_IRQ_FLAG (1 << 2) -#define AM335x_IRDA_IIR_RX_OE_IRQ_FLAG (1 << 3) -#define AM335x_IRDA_IIR_STS_FIFO_IRQ_FLAG (1 << 4) -#define AM335x_IRDA_IIR_TX_STS_IRQ_FLAG (1 << 5) -#define AM335x_IRDA_IIR_LINE_STS_IRQ_FLAG (1 << 6) -#define AM335x_IRDA_IIR_EOF_IRQ_FLAG (1 << 7) - - /** FIFO control register */ - ioport32_t fcr; -#define AM335x_UART_FCR_FIFO_EN_FLAG (1 << 0) -#define AM335x_UART_FCR_RX_FIFO_CLR_FLAG (1 << 1) -#define AM335x_UART_FCR_TX_FIFO_CLR_FLAG (1 << 3) -#define AM335x_UART_FCR_DMA_MODE_FLAG (1 << 4) - -#define AM335x_UART_FCR_TX_FIFO_TRIG_MASK (0x3) -#define AM335x_UART_FCR_TX_FIFO_TRIG_SHIFT (4) - -#define AM335x_UART_FCR_RX_FIFO_TRIG_MASK (0x3) -#define AM335x_UART_FCR_RX_FIFO_TRIG_SHIFT (6) - - /** Enhanced feature register */ - ioport32_t efr; -#define AM335x_UART_EFR_SW_FLOW_CTRL_RX_MASK (0x3) -#define AM335x_UART_EFR_SW_FLOW_CTRL_RX_SHIFT (0) -#define AM335x_UART_EFR_SW_FLOW_CTRL_TX_MASK (0x3) -#define AM335x_UART_EFR_SW_FLOW_CTRL_TX_SHIFT (2) - -#define AM335x_UART_EFR_SW_FLOW_CTRL_NONE (0x0) -#define AM335x_UART_EFR_SW_FLOW_CTRL_X2 (0x1) -#define AM335x_UART_EFR_SW_FLOW_CTRL_X1 (0x2) -#define AM335x_UART_EFR_SW_FLOW_CTRL_XBOTH (0x3) - -#define AM335x_UART_EFR_ENH_FLAG (1 << 4) -#define AM335x_UART_EFR_SPEC_CHAR_FLAG (1 << 5) -#define AM335x_UART_EFR_AUTO_RTS_EN_FLAG (1 << 6) -#define AM335x_UART_EFR_AUTO_CTS_EN_FLAG (1 << 7) - }; - - /** Line control register */ - ioport32_t lcr; -#define AM335x_UART_LCR_CHAR_LENGTH_MASK (0x3) -#define AM335x_UART_LCR_CHAR_LENGTH_SHIFT (0) -#define AM335x_UART_LCR_CHAR_LENGTH_5BITS (0x0) -#define AM335x_UART_LCR_CHAR_LENGTH_6BITS (0x1) -#define AM335x_UART_LCR_CHAR_LENGTH_7BITS (0x2) -#define AM335x_UART_LCR_CHAR_LENGTH_8BITS (0x3) -#define AM335x_UART_LCR_NB_STOP_FLAG (1 << 2) -#define AM335x_UART_LCR_PARITY_EN_FLAG (1 << 3) -#define AM335x_UART_LCR_PARITY_TYPE1_FLAG (1 << 4) -#define AM335x_UART_LCR_PARITY_TYPE2_FLAG (1 << 5) -#define AM335x_UART_LCR_BREAK_EN_FLAG (1 << 6) -#define AM335x_UART_LCR_DIV_EN_FLAG (1 << 7) - - - union { - /** Modem control register */ - ioport32_t mcr; -#define AM335x_UART_MCR_DTR_FLAG (1 << 0) -#define AM335x_UART_MCR_RTS_FLAG (1 << 1) -#define AM335x_UART_MCR_RI_STS_CH_FLAG (1 << 2) -#define AM335x_UART_MCR_CD_STS_CH_FLAG (1 << 3) -#define AM335x_UART_MCR_LOOPBACK_EN_FLAG (1 << 4) -#define AM335x_UART_MCR_XON_EN_FLAG (1 << 5) -#define AM335x_UART_MCR_TCR_TLR_FLAG (1 << 6) - - /** UART: XON1 char, IRDA: ADDR1 address */ - ioport32_t xon1_addr1; -#define AM335x_UART_XON1_ADDR1_MASK (0xff) - }; - - union { - /** Line status register */ - const ioport32_t lsr; -#define AM335x_UART_LSR_RX_FIFO_E_FLAG (1 << 0) -#define AM335x_UART_LSR_RX_OE_FLAG (1 << 1) -#define AM335x_UART_LSR_RX_PE_FLAG (1 << 2) -#define AM335x_UART_LSR_RX_FE_FLAG (1 << 3) -#define AM335x_UART_LSR_RX_BI_FLAG (1 << 4) -#define AM335x_UART_LSR_TX_FIFO_E_FLAG (1 << 5) -#define AM335x_UART_LSR_TX_SR_E_FLAG (1 << 6) -#define AM335x_UART_LSR_RX_FIFO_STS_FLAG (1 << 7) - -#define AM335x_CIR_LSR_RX_FIFO_E_FLAG (1 << 0) -#define AM335x_CIR_LSR_RX_STOP_FLAG (1 << 5) -#define AM335x_CIR_LSR_THR_EMPTY_FLAG (1 << 7) - -#define AM335x_IRDA_LSR_RX_FIFO_E_FLAG (1 << 0) -#define AM335x_IRDA_LSR_STS_FIFO_E_FLAG (1 << 1) -#define AM335x_IRDA_LSR_CRC_FLAG (1 << 2) -#define AM335x_IRDA_LSR_ABORT_FLAG (1 << 3) -#define AM335x_IRDA_LSR_FTL_FLAG (1 << 4) -#define AM335x_IRDA_LSR_RX_LAST_FLAG (1 << 5) -#define AM335x_IRDA_LSR_STS_FIFO_FULL_FLAG (1 << 6) -#define AM335x_IRDA_LSR_THR_EMPTY_FLAG (1 << 7) - - /** UART: XON2 char, IRDA: ADDR2 address */ - ioport32_t xon2_addr2; - }; - - union { - /** Modem status register */ - const ioport32_t msr; -#define AM335x_UART_MSR_CTS_STS_FLAG (1 << 0) -#define AM335x_UART_MSR_DSR_STS_FLAG (1 << 1) -#define AM335x_UART_MSR_RI_STS_FLAG (1 << 2) -#define AM335x_UART_MSR_DCD_STS_FLAG (1 << 3) -#define AM335x_UART_MSR_NCTS_STS_FLAG (1 << 4) -#define AM335x_UART_MSR_NDSR_STS_FLAG (1 << 5) -#define AM335x_UART_MSR_NRI_STS_FLAG (1 << 6) -#define AM335x_UART_MSR_NCD_STS_FLAG (1 << 7) - - /** Transmission control register */ - ioport32_t tcr; -#define AM335x_UART_TCR_FIFO_TRIG_MASK (0xf) -#define AM335x_UART_TCR_FIFO_TRIG_HALT_SHIFT (0) -#define AM335x_UART_TCR_FIFO_TRIG_START_SHIFT (4) - - /** UART: XOFF1 char */ - ioport32_t xoff1; -#define AM335x_UART_XOFF1_MASK (0xff) - }; - - union { - /* Scratchpad register, does nothing */ - ioport32_t spr; -#define AM335x_UART_SPR_MASK (0xff) - - /* Trigger level register */ - ioport32_t tlr; -#define AM335x_UART_TLR_LEVEL_MASK (0xf) -#define AM335x_UART_TLR_TX_FIFO_TRIG_SHIFT (0) -#define AM335x_UART_TLR_RX_FIFO_TRIG_SHIFT (4) - - /** UART: XOFF2 char */ - ioport32_t xoff2; -#define AM335x_UART_XOFF2_MASK (0xff) - }; - - /** Mode definition register. */ - ioport32_t mdr1; -#define AM335x_UART_MDR_MS_MASK (0x7) -#define AM335x_UART_MDR_MS_SHIFT (0) -#define AM335x_UART_MDR_MS_UART16 (0x0) -#define AM335x_UART_MDR_MS_SIR (0x1) -#define AM335x_UART_MDR_MS_UART16_AUTO (0x2) -#define AM335x_UART_MDR_MS_UART13 (0x3) -#define AM335x_UART_MDR_MS_MIR (0x4) -#define AM335x_UART_MDR_MS_FIR (0x5) -#define AM335x_UART_MDR_MS_CIR (0x6) -#define AM335x_UART_MDR_MS_DISABLE (0x7) - -#define AM335x_UART_MDR_IR_SLEEP_FLAG (1 << 3) -#define AM335x_UART_MDR_SET_TXIR_FLAG (1 << 4) -#define AM335x_UART_MDR_SCT_FLAG (1 << 5) -#define AM335x_UART_MDR_SIP_FLAG (1 << 6) -#define AM335x_UART_MDR_FRAME_END_MODE_FLAG (1 << 7) - - /** Mode definition register */ - ioport32_t mdr2; -#define AM335x_UART_MDR_IRTX_UNDERRUN_FLAG (1 << 0) -#define AM335x_UART_MDR_STS_FIFO_TRIG_MASK (0x3) -#define AM335x_UART_MDR_STS_FIFO_TRIG_SHIFT (1) -#define AM335x_UART_MDR_PULSE_SHAPING_FLAG (1 << 3) -#define AM335x_UART_MDR_CIR_PULSE_MODE_MASK (0x3) -#define AM335x_UART_MDR_CIR_PULSE_MODE_SHIFT (4) -#define AM335x_UART_MDR_IRRXINVERT_FLAG (1 << 6) - - union { - /** Status FIFO line status register (IrDA only) */ - const ioport32_t sflsr; -#define AM335x_IRDA_SFLSR_CRC_ERROR_FLAG (1 << 1) -#define AM335x_IRDA_SFLSR_ABORT_FLAG (1 << 2) -#define AM335x_IRDA_SFLSR_FTL_FLAG (1 << 3) -#define AM335x_IRDA_SFLSR_OE_FLAG (1 << 4) - - /** Transmit frame length low (IrDA only) */ - ioport32_t txfll; -#define AM335x_UART_TXFLL_MASK (0xff) - }; - - union { - /** Dummy register to restart TX or RX (IrDA only) */ - const ioport32_t resume; - /** Transmit frame length high (IrDA only) */ - ioport32_t txflh; -#define AM335x_UART_TXFLH_MASK (0xff) - }; - - union { - /** Status FIFO register low (IrDA only) */ - const ioport32_t sfregl; -#define AM335x_UART_SFREGL_MASK (0xff) - /** Received frame length low (IrDA only) */ - ioport32_t rxfll; -#define AM335x_UART_RXFLL_MASK (0xff) - }; - - union { - /** Status FIFO register high (IrDA only) */ - const ioport32_t sfregh; -#define AM335x_UART_SFREGH_MASK (0xf) - /** Received frame length high (IrDA only) */ - ioport32_t rxflh; -#define AM335x_UART_RXFLH_MASK (0xf) - }; - - union { - /** UART autobauding status register */ - const ioport32_t uasr; -#define AM335x_UART_UASR_SPEED_MASK (0x1f) -#define AM335x_UART_UASR_SPEED_SHIFT (0) -#define AM335x_UART_UASR_8BIT_CHAR_FLAG (1 << 5) -#define AM335x_UART_UASR_PARITY_MASK (0x3) -#define AM335x_UART_UASR_PARITY_SHIFT (6) - - /** BOF control register (IrDA only) */ - ioport32_t blr; -#define AM335x_IRDA_BLR_XBOF_TYPE_FLAG (1 << 6) -#define AM335x_IRDA_BLR_STS_FIFO_RESET (1 << 7) - }; - - /** Auxiliary control register (IrDA only) */ - ioport32_t acreg; -#define AM335x_IRDA_ACREG_EOT_EN_FLAG (1 << 0) -#define AM335x_IRDA_ACREG_ABORT_EN_FLAG (1 << 1) -#define AM335x_IRDA_ACREG_SCTX_EN_FLAG (1 << 2) -#define AM335x_IRDA_ACREG_SEND_SIP_FLAG (1 << 3) -#define AM335x_IRDA_ACREG_DIS_TX_UNDERRUN_FLAG (1 << 4) -#define AM335x_IRDA_ACREG_DIS_IR_RX_FLAG (1 << 5) -#define AM335x_IRDA_ACREG_SD_MOD_FLAG (1 << 6) -#define AM335x_IRDA_ACREG_PULSE_TYPE_FLAG (1 << 7) - - /** Supplementary control register */ - ioport32_t scr; -#define AM335x_UART_SCR_DMA_MODE_CTL_FLAG (1 << 0) -#define AM335x_UART_SCR_DMA_MODE_MASK (0x3) -#define AM335x_UART_SCR_DMA_MODE_SHIFT (1) -#define AM335x_UART_SCR_TX_EMPTY_CTL_IRQ_FLAG (1 << 3) -#define AM335x_UART_SCR_RX_CTS_WU_EN_FLAG (1 << 4) -#define AM335x_UART_SCR_TX_TRIG_GRANU1_FLAG (1 << 6) -#define AM335x_UART_SCR_RX_TRIG_GRANU1_FLAG (1 << 7) - - /** Supplementary status register */ - const ioport32_t ssr; -#define AM335x_UART_SSR_TX_FIFO_FULL_FLAG (1 << 0) -#define AM335x_UART_SSR_RX_CTS_WU_STS_FLAG (1 << 1) -#define AM335x_UART_SSR_DMA_COUNTER_RESET_FLAG (1 << 2) - - /** BOF Length register (IrDA only)*/ - ioport32_t eblr; -#define AM335x_IRDA_EBLR_DISABLED (0x00) -#define AM335x_IRDA_EBLR_RX_STOP_BITS(bits) (bits & 0xff) - - uint32_t padd0_; - - /** Module version register */ - const ioport32_t mvr; -#define AM335x_UART_MVR_MINOR_MASK (0xf) -#define AM335x_UART_MVR_MINOR_SHIFT (0) -#define AM335x_UART_MVR_MAJOR_MASK (0xf) -#define AM335x_UART_MVR_MAJOR_SHIFT (4) - - /** System configuration register */ - ioport32_t sysc; -#define AM335x_UART_SYSC_AUTOIDLE_FLAG (1 << 0) -#define AM335x_UART_SYSC_SOFTRESET_FLAG (1 << 1) -#define AM335x_UART_SYSC_ENWAKEUP_FLAG (1 << 2) -#define AM335x_UART_SYSC_IDLE_MODE_MASK (0x3) -#define AM335x_UART_SYSC_IDLE_MODE_SHIFT (3) -#define AM335x_UART_SYSC_IDLE_MODE_FORCE (0x0) -#define AM335x_UART_SYSC_IDLE_MODE_NO (0x1) -#define AM335x_UART_SYSC_IDLE_MODE_SMART (0x2) - - /** System status register */ - const ioport32_t syss; -#define AM335x_UART_SYSS_RESETDONE_FLAG (1 << 0) - - /** Wake-up enable register */ - ioport32_t wer; -#define AM335x_UART_WER_CTS_ACTIVITY_FLAG (1 << 0) -#define AM335x_UART_WER_RI_ACTIVITY_FLAG (1 << 2) -#define AM335x_UART_WER_RX_ACTIVITY_FLAG (1 << 4) -#define AM335x_UART_WER_RHR_IRQ_FLAG (1 << 5) -#define AM335x_UART_WER_RLS_IRQ_FLAG (1 << 6) -#define AM335x_UART_WER_TX_WAKEUP_EN_FLAG (1 << 7) - - /** Carrier frequency prescaler */ - ioport32_t cfps; -#define AM335x_UART_CFPS_MASK (0xff) - - /** Number of bytes in RX fifo */ - const ioport32_t rx_fifo_lvl; -#define AM335x_UART_RX_FIFO_LVL_MASK (0xff) - - /** Number of bytes in TX fifo */ - const ioport32_t tx_fifo_lvl; -#define AM335x_UART_TX_FIFO_LVL_MASK (0xff) - - /** RX/TX empty interrupts */ - ioport32_t ier2; -#define AM335x_UART_IER2_RX_FIFO_EMPTY_IRQ_EN_FLAG (1 << 0) -#define AM335x_UART_IER2_TX_FIFO_EMPTY_IRQ_EN_FLAG (1 << 1) - - /** RX/TX empty status */ - ioport32_t isr2; -#define AM335x_UART_ISR2_RX_FIFO_EMPTY_FLAG (1 << 0) -#define AM335x_UART_ISR2_TX_FIFO_EMPTY_FLAG (1 << 1) - - /** Set the sample per bit if non default frequency is used */ - ioport32_t freq_sel; -#define AM335x_UART_FREQ_SEL_MASK (0x000000FF) - - uint32_t padd2_[2]; - - /** Mode definition register 3 */ - ioport32_t mdr3; -#define AM335x_UART_MDR3_DIS_CIR_RX_DEMOD_FLAG (1 << 0) -} am335x_uart_regs_t; - -#endif - -/** - * @} - */ Index: kernel/genarch/include/drivers/amdm37x/gpt.h =================================================================== --- kernel/genarch/include/drivers/amdm37x/gpt.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,255 +1,0 @@ -/* - * Copyright (c) 2012 Jan Vesely - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Texas Instruments AM/DM37x MPU general purpose timer driver. - */ - -#ifndef KERN_AMDM37x_GPT_H_ -#define KERN_AMDM37x_GPT_H_ - -#include -#include - -/* AMDM37x TRM p. 2740 */ -#define AMDM37x_GPT1_BASE_ADDRESS 0x48318000 -#define AMDM37x_GPT1_SIZE 4096 -#define AMDM37x_GPT1_IRQ 37 -#define AMDM37x_GPT2_BASE_ADDRESS 0x49032000 -#define AMDM37x_GPT2_SIZE 4096 -#define AMDM37x_GPT2_IRQ 38 -#define AMDM37x_GPT3_BASE_ADDRESS 0x49034000 -#define AMDM37x_GPT3_SIZE 4096 -#define AMDM37x_GPT3_IRQ 39 -#define AMDM37x_GPT4_BASE_ADDRESS 0x49036000 -#define AMDM37x_GPT4_SIZE 4096 -#define AMDM37x_GPT4_IRQ 40 -#define AMDM37x_GPT5_BASE_ADDRESS 0x49038000 -#define AMDM37x_GPT5_SIZE 4096 -#define AMDM37x_GPT5_IRQ 41 -#define AMDM37x_GPT6_BASE_ADDRESS 0x4903a000 -#define AMDM37x_GPT6_SIZE 4096 -#define AMDM37x_GPT6_IRQ 42 -#define AMDM37x_GPT7_BASE_ADDRESS 0x4903c000 -#define AMDM37x_GPT7_SIZE 4096 -#define AMDM37x_GPT7_IRQ 43 -#define AMDM37x_GPT8_BASE_ADDRESS 0x4903e000 -#define AMDM37x_GPT8_SIZE 4096 -#define AMDM37x_GPT8_IRQ 44 -#define AMDM37x_GPT9_BASE_ADDRESS 0x49040000 -#define AMDM37x_GPT9_SIZE 4096 -#define AMDM37x_GPT9_IRQ 45 -#define AMDM37x_GPT10_BASE_ADDRESS 0x48086000 -#define AMDM37x_GPT10_SIZE 4096 -#define AMDM37x_GPT10_IRQ 46 -#define AMDM37x_GPT11_BASE_ADDRESS 0x48088000 -#define AMDM37x_GPT11_SIZE 4096 -#define AMDM37x_GPT11_IRQ 47 - - -/** GPT register map AMDM37x TRM p. 2740 */ -typedef struct { - /** IP revision */ - const ioport32_t tidr; -#define AMDM37x_GPT_TIDR_MINOR_MASK (0xf) -#define AMDM37x_GPT_TIDR_MINOR_SHIFT (0) -#define AMDM37x_GPT_TIDR_MAJOR_MASK (0xf) -#define AMDM37x_GPT_TIDR_MAJOR_SHIFT (4) - uint32_t padd0_[3]; - - /** L4 Interface parameters */ - ioport32_t tiocp_cfg; -#define AMDM37x_GPT_TIOCP_CFG_AUTOIDLE_FLAG (1 << 0) -#define AMDM37x_GPT_TIOCP_CFG_SOFTRESET_FLAG (1 << 1) -#define AMDM37x_GPT_TIOCP_CFG_ENWAKEUP_FLAG (1 << 2) -#define AMDM37x_GPT_TIOCP_CFG_IDLEMODE_MASK (0x3) -#define AMDM37x_GPT_TIOCP_CFG_IDLEMODE_SHIFT (3) -#define AMDM37x_GPT_TIOCP_CFG_EMUFREE_FlAG (1 << 5) -#define AMDM37x_GPT_TIOCP_CFG_CLOCKACTIVITY_MASK (0x3) -#define AMDM37x_GPT_TIOCP_CFG_CLOCKACTIVITY_SHIFT (8) - - /** Module status information, excluding irq */ - const ioport32_t tistat; -#define AMDM37x_GPT_TISTAT_RESET_DONE_FLAG (1 << 0) - - /** Interrupt status register */ - ioport32_t tisr; -#define AMDM37x_GPT_TISR_MAT_IRQ_FLAG (1 << 0) -#define AMDM37x_GPT_TISR_OVF_IRQ_FLAG (1 << 1) -#define AMDM37x_GPT_TISR_TCAR_IRQ_FLAG (1 << 2) - - /* Interrupt enable register */ - ioport32_t tier; -#define AMDM37x_GPT_TIER_MAT_IRQ_FLAG (1 << 0) -#define AMDM37x_GPT_TIER_OVF_IRQ_FLAG (1 << 1) -#define AMDM37x_GPT_TIER_TCAR_IRQ_FLAG (1 << 2) - - /** Wakeup enable register */ - ioport32_t twer; -#define AMDM37x_GPT_TWER_MAT_IRQ_FLAG (1 << 0) -#define AMDM37x_GPT_TWER_OVF_IRQ_FLAG (1 << 1) -#define AMDM37x_GPT_TWER_TCAR_IRQ_FLAG (1 << 2) - - /** Optional features control register */ - ioport32_t tclr; -#define AMDM37x_GPT_TCLR_ST_FLAG (1 << 0) -#define AMDM37x_GPT_TCLR_AR_FLAG (1 << 1) -#define AMDM37x_GPT_TCLR_PTV_MASK (0x7) -#define AMDM37x_GPT_TCLR_PTV_SHIFT (2) -#define AMDM37x_GPT_TCLR_PRE_FLAG (1 << 5) -#define AMDM37x_GPT_TCLR_CE_FLAG (1 << 6) -#define AMDM37x_GPT_TCLR_SCPWM (1 << 7) -#define AMDM37x_GPT_TCLR_TCM_MASK (0x3) -#define AMDM37x_GPT_TCLR_TCM_SHIFT (8) -#define AMDM37x_GPT_TCLR_TRG_MASK (0x3) -#define AMDM37x_GPT_TCLR_TRG_SHIFT (10) -#define AMDM37x_GPT_TCLR_PT_FLAG (1 << 12) -#define AMDM37x_GPT_TCLR_CAPT_MODE_FLAG (1 << 13) -#define AMDM37x_GPT_TCLR_GPO_CFG_FLAG (1 << 14) - - /** Value of timer counter */ - ioport32_t tccr; - - /** Timer load register */ - ioport32_t tldr; - - /** Timer trigger register */ - ioport32_t ttgr; - - /** Write-posted pending register */ - const ioport32_t twps; -#define AMDM37x_GPT_TWPS_TCLR_FLAG (1 << 0) -#define AMDM37x_GPT_TWPS_TCRR_FLAG (1 << 1) -#define AMDM37x_GPT_TWPS_TLDR_FLAG (1 << 2) -#define AMDM37x_GPT_TWPS_TTGR_FLAG (1 << 3) -#define AMDM37x_GPT_TWPS_TMAR_FLAG (1 << 4) -#define AMDM37x_GPT_TWPS_TPIR_FLAG (1 << 5) -#define AMDM37x_GPT_TWPS_TNIR_FLAG (1 << 6) -#define AMDM37x_GPT_TWPS_TCVR_FLAG (1 << 7) -#define AMDM37x_GPT_TWPS_TOCR_FLAG (1 << 8) -#define AMDM37x_GPT_TWPS_TOWR_FLAG (1 << 9) - - /** Timer match register */ - ioport32_t tmar; - - /** Capture value 1 register */ - const ioport32_t tcar1; - - /** Software interface control register */ - ioport32_t tsicr; -#define AMDM37x_GPT_TSICR_SFT_FLAG (1 << 1) -#define AMDM37x_GPT_TSICR_POSTED_FLAG (1 << 2) - - /** Capture value 2 register */ - const ioport32_t tcar2; - - /* GPT1,2,10 only (used for 1ms time period generation)*/ - - /** Positive increment register */ - ioport32_t tpir; - - /** Negative increment register */ - ioport32_t tnir; - - /** Counter value register */ - ioport32_t tcvr; - - /** Mask the tick interrupt for selected number of ticks */ - ioport32_t tocr; - - /** Number of masked overflow interrupts */ - ioport32_t towr; -} amdm37x_gpt_regs_t; - -typedef struct { - amdm37x_gpt_regs_t *regs; - bool special_available; -} amdm37x_gpt_t; - -static inline void amdm37x_gpt_timer_ticks_init( - amdm37x_gpt_t* timer, uintptr_t ioregs, size_t iosize, unsigned hz) -{ - /* Set 32768 Hz clock as source */ - // TODO find a nicer way to setup 32kHz clock source for timer1 - // reg 0x48004C40 is CM_CLKSEL_WKUP see page 485 of the manual - ioport32_t *clksel = (void*) km_map(0x48004C40, 4, PAGE_NOT_CACHEABLE); - *clksel &= ~1; - km_unmap((uintptr_t)clksel, 4); - - ASSERT(timer); - /* Map control register */ - timer->regs = (void*) km_map(ioregs, iosize, PAGE_NOT_CACHEABLE); - - /* Set autoreload */ - timer->regs->tclr = AMDM37x_GPT_TCLR_AR_FLAG; - - timer->special_available = ( - (ioregs == AMDM37x_GPT1_BASE_ADDRESS) || - (ioregs == AMDM37x_GPT2_BASE_ADDRESS) || - (ioregs == AMDM37x_GPT10_BASE_ADDRESS)); - timer->regs->tldr = 0xffffffff - (32768 / hz) + 1; - timer->regs->tccr = 0xffffffff - (32768 / hz) + 1; - if (timer->special_available) { - /* Set values for according to formula (manual p. 2733) */ - /* Use temporary variables for easier debugging */ - const uint32_t tpir = - ((32768 / hz + 1) * 1000000) - (32768000L * (1000 / hz)); - const uint32_t tnir = - ((32768 / hz) * 1000000) - (32768000 * (1000 / hz)); - timer->regs->tpir = tpir; - timer->regs->tnir = tnir; - } - -} - -static inline void amdm37x_gpt_timer_ticks_start(amdm37x_gpt_t* timer) -{ - ASSERT(timer); - ASSERT(timer->regs); - /* Enable overflow interrupt */ - timer->regs->tier |= AMDM37x_GPT_TIER_OVF_IRQ_FLAG; - /* Start timer */ - timer->regs->tclr |= AMDM37x_GPT_TCLR_ST_FLAG; -} - -static inline void amdm37x_gpt_irq_ack(amdm37x_gpt_t* timer) -{ - ASSERT(timer); - ASSERT(timer->regs); - /* Clear all pending interrupts */ - timer->regs->tisr = timer->regs->tisr; -} - -#endif - -/** - * @} - */ Index: kernel/genarch/include/drivers/amdm37x/irc.h =================================================================== --- kernel/genarch/include/drivers/amdm37x/irc.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,206 +1,0 @@ -/* - * Copyright (c) 2012 Jan Vesely - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Texas Instruments AM/DM37x MPU on-chip interrupt controller driver. - */ - -#ifndef KERN_AMDM37x_IRQC_H_ -#define KERN_AMDM37x_IRQC_H_ - -/* AMDM37x TRM p. 1079 */ -#define AMDM37x_IRC_BASE_ADDRESS 0x48200000 -#define AMDM37x_IRC_SIZE 4096 - -#define AMDM37x_IRC_IRQ_COUNT 96 - -#include - -typedef struct { - const ioport32_t revision; /**< Revision */ -#define AMDM37x_IRC_REV_MASK (0xff) - - uint8_t padd0_[12]; - - ioport32_t sysconfig; /**< SYS config */ -#define AMDM37x_IRC_SYSCONFIG_AUTOIDLE_FLAG (1 << 0) -#define AMDM37x_IRC_SYSCONFIG_SOFTRESET_FLAG (1 << 1) - - const ioport32_t sysstatus; /**< SYS status */ -#define AMDM37x_IRC_SYSSTATUS_RESET_DONE_FLAG (1 << 0) - - uint8_t padd1_[40]; - - const ioport32_t sir_irq; /**< Currently active irq number */ -#define AMDM37x_IRC_SIR_IRQ_ACTIVEIRQ_MASK (0x7f) -#define AMDM37x_IRC_SIR_IRQ_SPURIOUSIRQFLAG_MASK (0xfffffff8) - - const ioport32_t sir_fiq; -#define AMDM37x_IRC_SIR_FIQ_ACTIVEIRQ_MASK (0x7f) -#define AMDM37x_IRC_SIR_FIQ_SPURIOUSIRQFLAG_MASK (0xfffffff8) - - ioport32_t control; /**< New interrupt agreement. */ -#define AMDM37x_IRC_CONTROL_NEWIRQAGR_FLAG (1 << 0) -#define AMDM37x_IRC_CONTROL_NEWFIQAGR_FLAG (1 << 1) - - ioport32_t protection; /**< Protect other registers. */ -#define AMDM37x_IRC_PROTECTION_PROETCTION_FLAG (1 << 0) - - ioport32_t idle; /**< Idle and autogating */ -#define AMDM37x_IRC_IDLE_FUNCIDLE_FLAG (1 << 0) -#define AMDM37x_IRC_IDLE_TURBO_FLAG (1 << 1) - - uint8_t padd2_[12]; - - ioport32_t irq_priority; /**< Active IRQ priority */ -#define AMDM37x_IRC_IRQ_PRIORITY_IRQPRIORITY_MASK (0x7f) -#define AMDM37x_IRC_IRQ_PRIORITY_SPURIOUSIRQFLAG_MASK (0xfffffff8) - - ioport32_t fiq_priority; /**< Active FIQ priority */ -#define AMDM37x_IRC_FIQ_PRIORITY_FIQPRIORITY_MASK (0x7f) -#define AMDM37x_IRC_FIQ_PRIORITY_SPURIOUSFIQFLAG_MASK (0xfffffff8) - - ioport32_t threshold; /**< Priority threshold */ -#define AMDM37x_IRC_THRESHOLD_PRIORITYTHRESHOLD_MASK (0xff) -#define AMDM37x_IRC_THRESHOLD_PRIORITYTHRESHOLD_ENABLED (0x00) -#define AMDM37x_IRC_THRESHOLD_PRIORITYTHRESHOLD_DISABLED (0xff) - - uint8_t padd3__[20]; - - struct { - const ioport32_t itr; /**< Interrupt input status before masking */ - ioport32_t mir; /**< Interrupt mask */ - ioport32_t mir_clear; /**< Clear mir mask bits */ - ioport32_t mir_set; /**< Set mir mask bits */ - ioport32_t isr_set; /**< Set software interrupt bits */ - ioport32_t isr_clear; /**< Clear software interrupt bits */ - const ioport32_t pending_irq; /**< IRQ status after masking */ - const ioport32_t pending_fiq; /**< FIQ status after masking */ - } interrupts[3]; - - uint8_t padd4_[32]; - - ioport32_t ilr[96]; /**< FIQ/IRQ steering */ -#define AMDM37x_IRC_ILR_FIQNIRQ (1 << 0) -#define AMDM37x_IRC_ILR_PRIORITY_MASK (0x3f) -#define AMDM37x_IRC_ILR_PRIORITY_SHIFT (2) - -} amdm37x_irc_regs_t; - -static inline void amdm37x_irc_dump(amdm37x_irc_regs_t *regs) -{ -#define DUMP_REG(name) \ - printf("%s %p(%x).\n", #name, ®s->name, regs->name); - - DUMP_REG(revision); - DUMP_REG(sysconfig); - DUMP_REG(sysstatus); - DUMP_REG(sir_irq); - DUMP_REG(sir_fiq); - DUMP_REG(control); - DUMP_REG(protection); - DUMP_REG(idle); - DUMP_REG(irq_priority); - DUMP_REG(fiq_priority); - DUMP_REG(threshold); - - for (int i = 0; i < 3; ++i) { - DUMP_REG(interrupts[i].itr); - DUMP_REG(interrupts[i].mir); - DUMP_REG(interrupts[i].isr_set); - DUMP_REG(interrupts[i].pending_irq); - DUMP_REG(interrupts[i].pending_fiq); - } - for (int i = 0; i < AMDM37x_IRC_IRQ_COUNT; ++i) { - DUMP_REG(ilr[i]); - } - -#undef DUMP_REG -} - -static inline void amdm37x_irc_init(amdm37x_irc_regs_t *regs) -{ - /* AMDM37x TRM sec 12.5.1 p. 2425 */ - /* Program system config register */ - //TODO enable this when you know the meaning - //regs->sysconfig |= AMDM37x_IRC_SYSCONFIG_AUTOIDLE_FLAG; - - /* Program idle register */ - //TODO enable this when you know the meaning - //regs->sysconfig |= AMDM37x_IRC_IDLE_TURBO_FLAG; - - /* Program ilr[m] assign priority, decide fiq */ - for (unsigned i = 0; i < AMDM37x_IRC_IRQ_COUNT; ++i) { - regs->ilr[i] = 0; /* highest prio(default) route to irq */ - } - - /* Disable all interrupts */ - regs->interrupts[0].mir_set = 0xffffffff; - regs->interrupts[1].mir_set = 0xffffffff; - regs->interrupts[2].mir_set = 0xffffffff; -} - -static inline unsigned amdm37x_irc_inum_get(amdm37x_irc_regs_t *regs) -{ - return regs->sir_irq & AMDM37x_IRC_SIR_IRQ_ACTIVEIRQ_MASK; -} - -static inline void amdm37x_irc_irq_ack(amdm37x_irc_regs_t *regs) -{ - regs->control = AMDM37x_IRC_CONTROL_NEWIRQAGR_FLAG; -} - -static inline void amdm37x_irc_fiq_ack(amdm37x_irc_regs_t *regs) -{ - regs->control = AMDM37x_IRC_CONTROL_NEWFIQAGR_FLAG; -} - -static inline void amdm37x_irc_enable(amdm37x_irc_regs_t *regs, unsigned inum) -{ - ASSERT(inum < AMDM37x_IRC_IRQ_COUNT); - const unsigned set = inum / 32; - const unsigned pos = inum % 32; - regs->interrupts[set].mir_clear = (1 << pos); -} - -static inline void amdm37x_irc_disable(amdm37x_irc_regs_t *regs, unsigned inum) -{ - ASSERT(inum < AMDM37x_IRC_IRQ_COUNT); - const unsigned set = inum / 32; - const unsigned pos = inum % 32; - regs->interrupts[set].mir_set = (1 << pos); -} - -#endif - -/** - * @} - */ Index: kernel/genarch/include/drivers/amdm37x/uart.h =================================================================== --- kernel/genarch/include/drivers/amdm37x/uart.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,73 +1,0 @@ -/* - * Copyright (c) 2012 Jan Vesely - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Texas Instruments AMDM37x UART driver - */ - -#ifndef _AMDM37x_UART_H_ -#define _AMDM37x_UART_H_ - -#include "uart_regs.h" - -/* AMDM37x TRM p. 2950 */ -#define AMDM37x_UART1_BASE_ADDRESS 0x4806a000 -#define AMDM37x_UART1_SIZE 1024 -#define AMDM37x_UART1_IRQ 72 /* AMDM37x TRM p. 2418 */ - -#define AMDM37x_UART2_BASE_ADDRESS 0x4806b000 -#define AMDM37x_UART2_SIZE 1024 -#define AMDM37x_UART2_IRQ 73 /* AMDM37x TRM p. 2418 */ - -#define AMDM37x_UART3_BASE_ADDRESS 0x49020000 -#define AMDM37x_UART3_SIZE 1024 -#define AMDM37x_UART3_IRQ 74 /* AMDM37x TRM p. 2418 */ - -#define AMDM37x_UART4_BASE_ADDRESS 0x49042000 -#define AMDM37x_UART4_SIZE 1024 -#define AMDM37x_UART4_IRQ 80 /* AMDM37x TRM p. 2418 */ - -typedef struct { - amdm37x_uart_regs_t *regs; - indev_t *indev; - outdev_t outdev; - irq_t irq; -} amdm37x_uart_t; - - -bool amdm37x_uart_init(amdm37x_uart_t *, inr_t, uintptr_t, size_t); -void amdm37x_uart_input_wire(amdm37x_uart_t *, indev_t *); - -#endif - -/** - * @} - */ Index: kernel/genarch/include/drivers/amdm37x/uart_regs.h =================================================================== --- kernel/genarch/include/drivers/amdm37x/uart_regs.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,431 +1,0 @@ -/* - * Copyright (c) 2012 Jan Vesely - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Texas Instruments AMDM37x UART memory mapped registers. - */ - -#ifndef KERN_AMDM37x_UART_H_ -#define KERN_AMDM37x_UART_H_ - -#include -#include -#include - -typedef struct { - union { - /** Stores lower part of the 14-bit baud divisor */ - ioport32_t dll; -#define AMDM37x_UART_DLL_MASK (0xff) - - /** Receive holding register */ - const ioport32_t rhr; -#define AMDM37x_UART_RHR_MASK (0xff) - - /** Transmit holding register */ - ioport32_t thr; -#define AMDM37x_UART_THR_MASK (0xff) - }; - - union { - /** Stores higher part of the 14-bit baud divisor */ - ioport32_t dlh; -#define AMDM37x_UART_DLH_MASK (0x1f) - - /** Interrupt enable registers */ - ioport32_t ier; -#define AMDM37x_UART_IER_RHR_IRQ_FLAG (1 << 0) -#define AMDM37x_UART_IER_THR_IRQ_FLAG (1 << 1) -#define AMDM37x_UART_IER_LINE_STS_IRQ_FLAG (1 << 2) -#define AMDM37x_UART_IER_MODEM_STS_IRQ_FLAG (1 << 3) -#define AMDM37x_UART_IER_SLEEP_MODE_FLAG (1 << 4) -#define AMDM37x_UART_IER_XOFF_IRQ_FLAG (1 << 5) -#define AMDM37x_UART_IER_RTS_IRQ_FLAG (1 << 6) -#define AMDM37x_UART_IER_CTS_IRQ_FLAG (1 << 7) - -#define AMDM37x_CIR_IER_RHR_IRQ_FLAG (1 << 0) -#define AMDM37x_CIR_IER_THR_IRQ_FLAG (1 << 1) -#define AMDM37x_CIR_IER_RX_STOP_IRQ_FLAG (1 << 2) -#define AMDM37x_CIR_IER_RX_OVERRUN_IRQ_FLAG (1 << 3) -#define AMDM37x_CIR_IER_TX_STS_IRQ_FLAG (1 << 5) - -#define AMDM37x_IRDA_IER_RHR_IRQ_FLAG (1 << 0) -#define AMDM37x_IRDA_IER_THR_IRQ_FLAG (1 << 1) -#define AMDM37x_IRDA_IER_LAST_RX_BYTE_IRQ_FLAG (1 << 2) -#define AMDM37x_IRDA_IER_RX_OVERRUN_IRQ_FLAG (1 << 3) -#define AMDM37x_IRDA_IER_STS_FIFO_TRIG_IRQ_FLAG (1 << 4) -#define AMDM37x_IRDA_IER_TX_STS_IRQ_FLAG (1 << 5) -#define AMDM37x_IRDA_IER_LINE_STS_IRQ_FLAG (1 << 6) -#define AMDM37x_IRDA_IER_EOF_IRQ_FLAG (1 << 7) - }; - - union { - /** Interrupt identification register */ - const ioport32_t iir; -#define AMDM37x_UART_IIR_IRQ_PENDING_FLAG (1 << 0) -#define AMDM37x_UART_IIR_TYPE_MASK (0x1f) -#define AMDM37x_UART_IIR_TYPE_SHIFT (1) -#define AMDM37x_UART_IIR_FCR_MASK (0x3) -#define AMDM37x_UART_IIR_FCR_SHIFT (6) - -#define AMDM37x_CIR_IIR_RHR_IRQ_FLAG (1 << 0) -#define AMDM37x_CIR_IIR_THR_IRQ_FLAG (1 << 1) -#define AMDM37x_CIR_IIR_RX_STOP_IRQ_FLAG (1 << 2) -#define AMDM37x_CIR_IIR_RX_OE_IRQ_FLAG (1 << 3) -#define AMDM37x_CIR_IIR_TX_STS_IRQ_FLAG (1 << 5) - -#define AMDM37x_IRDA_IIR_RHR_IRQ_FLAG (1 << 0) -#define AMDM37x_IRDA_IIR_THR_IRQ_FLAG (1 << 1) -#define AMDM37x_IRDA_IIR_RX_FIFO_LB_IRQ_FLAG (1 << 2) -#define AMDM37x_IRDA_IIR_RX_OE_IRQ_FLAG (1 << 3) -#define AMDM37x_IRDA_IIR_STS_FIFO_IRQ_FLAG (1 << 4) -#define AMDM37x_IRDA_IIR_TX_STS_IRQ_FLAG (1 << 5) -#define AMDM37x_IRDA_IIR_LINE_STS_IRQ_FLAG (1 << 6) -#define AMDM37x_IRDA_IIR_EOF_IRQ_FLAG (1 << 7) - - /** FIFO control register */ - ioport32_t fcr; -#define AMDM37x_UART_FCR_FIFO_EN_FLAG (1 << 0) -#define AMDM37x_UART_FCR_RX_FIFO_CLR_FLAG (1 << 1) -#define AMDM37x_UART_FCR_TX_FIFO_CLR_FLAG (1 << 3) -#define AMDM37x_UART_FCR_DMA_MODE_FLAG (1 << 4) - -#define AMDM37x_UART_FCR_TX_FIFO_TRIG_MASK (0x3) -#define AMDM37x_UART_FCR_TX_FIFO_TRIG_SHIFT (4) - -#define AMDM37x_UART_FCR_RX_FIFO_TRIG_MASK (0x3) -#define AMDM37x_UART_FCR_RX_FIFO_TRIG_SHIFT (6) - - /** Enhanced feature register */ - ioport32_t efr; -#define AMDM37x_UART_EFR_SW_FLOW_CTRL_RX_MASK (0x3) -#define AMDM37x_UART_EFR_SW_FLOW_CTRL_RX_SHIFT (0) -#define AMDM37x_UART_EFR_SW_FLOW_CTRL_TX_MASK (0x3) -#define AMDM37x_UART_EFR_SW_FLOW_CTRL_TX_SHIFT (2) - -#define AMDM37x_UART_EFR_SW_FLOW_CTRL_NONE (0x0) -#define AMDM37x_UART_EFR_SW_FLOW_CTRL_X2 (0x1) -#define AMDM37x_UART_EFR_SW_FLOW_CTRL_X1 (0x2) -#define AMDM37x_UART_EFR_SW_FLOW_CTRL_XBOTH (0x3) - -#define AMDM37x_UART_EFR_ENH_FLAG (1 << 4) -#define AMDM37x_UART_EFR_SPEC_CHAR_FLAG (1 << 5) -#define AMDM37x_UART_EFR_AUTO_RTS_EN_FLAG (1 << 6) -#define AMDM37x_UART_EFR_AUTO_CTS_EN_FLAG (1 << 7) - }; - - /** Line control register */ - ioport32_t lcr; -#define AMDM37x_UART_LCR_CHAR_LENGTH_MASK (0x3) -#define AMDM37x_UART_LCR_CHAR_LENGTH_SHIFT (0) -#define AMDM37x_UART_LCR_CHAR_LENGTH_5BITS (0x0) -#define AMDM37x_UART_LCR_CHAR_LENGTH_6BITS (0x1) -#define AMDM37x_UART_LCR_CHAR_LENGTH_7BITS (0x2) -#define AMDM37x_UART_LCR_CHAR_LENGTH_8BITS (0x3) -#define AMDM37x_UART_LCR_NB_STOP_FLAG (1 << 2) -#define AMDM37x_UART_LCR_PARITY_EN_FLAG (1 << 3) -#define AMDM37x_UART_LCR_PARITY_TYPE1_FLAG (1 << 4) -#define AMDM37x_UART_LCR_PARITY_TYPE2_FLAG (1 << 5) -#define AMDM37x_UART_LCR_BREAK_EN_FLAG (1 << 6) -#define AMDM37x_UART_LCR_DIV_EN_FLAG (1 << 7) - - - union { - /** Modem control register */ - ioport32_t mcr; -#define AMDM37x_UART_MCR_DTR_FLAG (1 << 0) -#define AMDM37x_UART_MCR_RTS_FLAG (1 << 1) -#define AMDM37x_UART_MCR_RI_STS_CH_FLAG (1 << 2) -#define AMDM37x_UART_MCR_CD_STS_CH_FLAG (1 << 3) -#define AMDM37x_UART_MCR_LOOPBACK_EN_FLAG (1 << 4) -#define AMDM37x_UART_MCR_XON_EN_FLAG (1 << 5) -#define AMDM37x_UART_MCR_TCR_TLR_FLAG (1 << 6) - - /** UART: XON1 char, IRDA: ADDR1 address */ - ioport32_t xon1_addr1; -#define AMDM37x_UART_XON1_ADDR1_MASK (0xff) - }; - - union { - /** Line status register */ - const ioport32_t lsr; -#define AMDM37x_UART_LSR_RX_FIFO_E_FLAG (1 << 0) -#define AMDM37x_UART_LSR_RX_OE_FLAG (1 << 1) -#define AMDM37x_UART_LSR_RX_PE_FLAG (1 << 2) -#define AMDM37x_UART_LSR_RX_FE_FLAG (1 << 3) -#define AMDM37x_UART_LSR_RX_BI_FLAG (1 << 4) -#define AMDM37x_UART_LSR_TX_FIFO_E_FLAG (1 << 5) -#define AMDM37x_UART_LSR_TX_SR_E_FLAG (1 << 6) -#define AMDM37x_UART_LSR_RX_FIFO_STS_FLAG (1 << 7) - -#define AMDM37x_CIR_LSR_RX_FIFO_E_FLAG (1 << 0) -#define AMDM37x_CIR_LSR_RX_STOP_FLAG (1 << 5) -#define AMDM37x_CIR_LSR_THR_EMPTY_FLAG (1 << 7) - -#define AMDM37x_IRDA_LSR_RX_FIFO_E_FLAG (1 << 0) -#define AMDM37x_IRDA_LSR_STS_FIFO_E_FLAG (1 << 1) -#define AMDM37x_IRDA_LSR_CRC_FLAG (1 << 2) -#define AMDM37x_IRDA_LSR_ABORT_FLAG (1 << 3) -#define AMDM37x_IRDA_LSR_FTL_FLAG (1 << 4) -#define AMDM37x_IRDA_LSR_RX_LAST_FLAG (1 << 5) -#define AMDM37x_IRDA_LSR_STS_FIFO_FULL_FLAG (1 << 6) -#define AMDM37x_IRDA_LSR_THR_EMPTY_FLAG (1 << 7) - - /** UART: XON2 char, IRDA: ADDR2 address */ - ioport32_t xon2_addr2; - }; - - union { - /** Modem status register */ - const ioport32_t msr; -#define AMDM37x_UART_MSR_CTS_STS_FLAG (1 << 0) -#define AMDM37x_UART_MSR_DSR_STS_FLAG (1 << 1) -#define AMDM37x_UART_MSR_RI_STS_FLAG (1 << 2) -#define AMDM37x_UART_MSR_DCD_STS_FLAG (1 << 3) -#define AMDM37x_UART_MSR_NCTS_STS_FLAG (1 << 4) -#define AMDM37x_UART_MSR_NDSR_STS_FLAG (1 << 5) -#define AMDM37x_UART_MSR_NRI_STS_FLAG (1 << 6) -#define AMDM37x_UART_MSR_NCD_STS_FLAG (1 << 7) - - /** Transmission control register */ - ioport32_t tcr; -#define AMDM37x_UART_TCR_FIFO_TRIG_MASK (0xf) -#define AMDM37x_UART_TCR_FIFO_TRIG_HALT_SHIFT (0) -#define AMDM37x_UART_TCR_FIFO_TRIG_START_SHIFT (4) - - /** UART: XOFF1 char */ - ioport32_t xoff1; -#define AMDM37x_UART_XOFF1_MASK (0xff) - }; - - union { - /* Scratchpad register, does nothing */ - ioport32_t spr; -#define AMDM37x_UART_SPR_MASK (0xff) - - /* Trigger level register */ - ioport32_t tlr; -#define AMDM37x_UART_TLR_LEVEL_MASK (0xf) -#define AMDM37x_UART_TLR_TX_FIFO_TRIG_SHIFT (0) -#define AMDM37x_UART_TLR_RX_FIFO_TRIG_SHIFT (4) - - /** UART: XOFF2 char */ - ioport32_t xoff2; -#define AMDM37x_UART_XOFF2_MASK (0xff) - }; - - /** Mode definition register. */ - ioport32_t mdr1; -#define AMDM37x_UART_MDR_MS_MASK (0x7) -#define AMDM37x_UART_MDR_MS_SHIFT (0) -#define AMDM37x_UART_MDR_MS_UART16 (0x0) -#define AMDM37x_UART_MDR_MS_SIR (0x1) -#define AMDM37x_UART_MDR_MS_UART16_AUTO (0x2) -#define AMDM37x_UART_MDR_MS_UART13 (0x3) -#define AMDM37x_UART_MDR_MS_MIR (0x4) -#define AMDM37x_UART_MDR_MS_FIR (0x5) -#define AMDM37x_UART_MDR_MS_CIR (0x6) -#define AMDM37x_UART_MDR_MS_DISABLE (0x7) - -#define AMDM37x_UART_MDR_IR_SLEEP_FLAG (1 << 3) -#define AMDM37x_UART_MDR_SET_TXIR_FLAG (1 << 4) -#define AMDM37x_UART_MDR_SCT_FLAG (1 << 5) -#define AMDM37x_UART_MDR_SIP_FLAG (1 << 6) -#define AMDM37x_UART_MDR_FRAME_END_MODE_FLAG (1 << 7) - - /** Mode definition register */ - ioport32_t mdr2; -#define AMDM37x_UART_MDR_IRTX_UNDERRUN_FLAG (1 << 0) -#define AMDM37x_UART_MDR_STS_FIFO_TRIG_MASK (0x3) -#define AMDM37x_UART_MDR_STS_FIFO_TRIG_SHIFT (1) -#define AMDM37x_UART_MDR_PULSE_SHAPING_FLAG (1 << 3) -#define AMDM37x_UART_MDR_CIR_PULSE_MODE_MASK (0x3) -#define AMDM37x_UART_MDR_CIR_PULSE_MODE_SHIFT (4) -#define AMDM37x_UART_MDR_IRRXINVERT_FLAG (1 << 6) - - - /* UART3 specific */ - union { - /** Status FIFO line status register (IrDA only) */ - const ioport32_t sflsr; -#define AMDM37x_IRDA_SFLSR_CRC_ERROR_FLAG (1 << 1) -#define AMDM37x_IRDA_SFLSR_ABORT_FLAG (1 << 2) -#define AMDM37x_IRDA_SFLSR_FTL_FLAG (1 << 3) -#define AMDM37x_IRDA_SFLSR_OE_FLAG (1 << 4) - - /** Transmit frame length low (IrDA only) */ - ioport32_t txfll; -#define AMDM37x_UART_TXFLL_MASK (0xff) - }; - - /* UART3 specific */ - union { - /** Dummy register to restart TX or RX (IrDA only) */ - const ioport32_t resume; - /** Transmit frame length high (IrDA only) */ - ioport32_t txflh; -#define AMDM37x_UART_TXFLH_MASK (0xff) - }; - - /* UART3 specific */ - union { - /** Status FIFO register low (IrDA only) */ - const ioport32_t sfregl; -#define AMDM37x_UART_SFREGL_MASK (0xff) - /** Received frame length low (IrDA only) */ - ioport32_t rxfll; -#define AMDM37x_UART_RXFLL_MASK (0xff) - }; - - /* UART3 specific */ - union { - /** Status FIFO register high (IrDA only) */ - const ioport32_t sfregh; -#define AMDM37x_UART_SFREGH_MASK (0xf) - /** Received frame length high (IrDA only) */ - ioport32_t rxflh; -#define AMDM37x_UART_RXFLH_MASK (0xf) - }; - - union { - /** UART autobauding status register */ - const ioport32_t uasr; -#define AMDM37x_UART_UASR_SPEED_MASK (0x1f) -#define AMDM37x_UART_UASR_SPEED_SHIFT (0) -#define AMDM37x_UART_UASR_8BIT_CHAR_FLAG (1 << 5) -#define AMDM37x_UART_UASR_PARITY_MASK (0x3) -#define AMDM37x_UART_UASR_PARITY_SHIFT (6) - - /** BOF control register (IrDA only) */ - ioport32_t blr; /* UART3 specific */ -#define AMDM37x_IRDA_BLR_XBOF_TYPE_FLAG (1 << 6) -#define AMDM37x_IRDA_BLR_STS_FIFO_RESET (1 << 7) - }; - - /** Auxiliary control register (IrDA only) */ - ioport32_t acreg; /* UART3 specific */ -#define AMDM37x_IRDA_ACREG_EOT_EN_FLAG (1 << 0) -#define AMDM37x_IRDA_ACREG_ABORT_EN_FLAG (1 << 1) -#define AMDM37x_IRDA_ACREG_SCTX_EN_FLAG (1 << 2) -#define AMDM37x_IRDA_ACREG_SEND_SIP_FLAG (1 << 3) -#define AMDM37x_IRDA_ACREG_DIS_TX_UNDERRUN_FLAG (1 << 4) -#define AMDM37x_IRDA_ACREG_DIS_IR_RX_FLAG (1 << 5) -#define AMDM37x_IRDA_ACREG_SD_MOD_FLAG (1 << 6) -#define AMDM37x_IRDA_ACREG_PULSE_TYPE_FLAG (1 << 7) - - /** Supplementary control register */ - ioport32_t scr; -#define AMDM37x_UART_SCR_DMA_MODE_CTL_FLAG (1 << 0) -#define AMDM37x_UART_SCR_DMA_MODE_MASK (0x3) -#define AMDM37x_UART_SCR_DMA_MODE_SHIFT (1) -#define AMDM37x_UART_SCR_TX_EMPTY_CTL_IRQ_FLAG (1 << 3) -#define AMDM37x_UART_SCR_RX_CTS_WU_EN_FLAG (1 << 4) -#define AMDM37x_UART_SCR_TX_TRIG_GRANU1_FLAG (1 << 6) -#define AMDM37x_UART_SCR_RX_TRIG_GRANU1_FLAG (1 << 7) - - /** Supplementary status register */ - const ioport32_t ssr; -#define AMDM37x_UART_SSR_TX_FIFO_FULL_FLAG (1 << 0) -#define AMDM37x_UART_SSR_RX_CTS_WU_STS_FLAG (1 << 1) -#define AMDM37x_UART_SSR_DMA_COUNTER_RESET_FLAG (1 << 2) - - /** BOF Length register (IrDA only)*/ - ioport32_t eblr; /* UART3 specific */ -#define AMDM37x_IRDA_EBLR_DISABLED (0x00) -#define AMDM37x_IRDA_EBLR_RX_STOP_BITS(bits) (bits & 0xff) - - uint32_t padd0_; - - /** Module version register */ - const ioport32_t mvr; -#define AMDM37x_UART_MVR_MINOR_MASK (0xf) -#define AMDM37x_UART_MVR_MINOR_SHIFT (0) -#define AMDM37x_UART_MVR_MAJOR_MASK (0xf) -#define AMDM37x_UART_MVR_MAJOR_SHIFT (4) - - /** System configuration register */ - ioport32_t sysc; -#define AMDM37x_UART_SYSC_AUTOIDLE_FLAG (1 << 0) -#define AMDM37x_UART_SYSC_SOFTRESET_FLAG (1 << 1) -#define AMDM37x_UART_SYSC_ENWAKEUP_FLAG (1 << 2) -#define AMDM37x_UART_SYSC_IDLE_MODE_MASK (0x3) -#define AMDM37x_UART_SYSC_IDLE_MODE_SHIFT (3) -#define AMDM37x_UART_SYSC_IDLE_MODE_FORCE (0x0) -#define AMDM37x_UART_SYSC_IDLE_MODE_NO (0x1) -#define AMDM37x_UART_SYSC_IDLE_MODE_SMART (0x2) - - /** System status register */ - const ioport32_t syss; -#define AMDM37x_UART_SYSS_RESETDONE_FLAG (1 << 0) - - /** Wake-up enable register */ - ioport32_t wer; -#define AMDM37x_UART_WER_CTS_ACTIVITY_FLAG (1 << 0) -#define AMDM37x_UART_WER_RI_ACTIVITY_FLAG (1 << 2) -#define AMDM37x_UART_WER_RX_ACTIVITY_FLAG (1 << 4) -#define AMDM37x_UART_WER_RHR_IRQ_FLAG (1 << 5) -#define AMDM37x_UART_WER_RLS_IRQ_FLAG (1 << 6) -#define AMDM37x_UART_WER_TX_WAKEUP_EN_FLAG (1 << 7) - - /** Carrier frequency prescaler */ - ioport32_t cfps; /* UART3 specific */ -#define AMDM37x_UART_CFPS_MASK (0xff) - - /** Number of bytes in RX fifo */ - const ioport32_t rx_fifo_lvl; -#define AMDM37x_UART_RX_FIFO_LVL_MASK (0xff) - - /** Number of bytes in TX fifo */ - const ioport32_t tx_fifo_lvl; -#define AMDM37x_UART_TX_FIFO_LVL_MASK (0xff) - - /** RX/TX empty interrupts */ - ioport32_t ier2; -#define AMDM37x_UART_IER2_RX_FIFO_EMPTY_IRQ_EN_FLAG (1 << 0) -#define AMDM37x_UART_IER2_TX_FIFO_EMPTY_IRQ_EN_FLAG (1 << 1) - - /** RX/TX empty status */ - ioport32_t isr2; -#define AMDM37x_UART_ISR2_RX_FIFO_EMPTY_FLAG (1 << 0) -#define AMDM37x_UART_ISR2_TX_FIFO_EMPTY_FLAG (1 << 1) - - uint32_t padd2_[3]; - - /** Mode definition register 3 */ - ioport32_t mdr3; -#define AMDM37x_UART_MDR3_DIS_CIR_RX_DEMOD_FLAG (1 << 0) -} amdm37x_uart_regs_t; - -#endif - -/** - * @} - */ Index: kernel/genarch/include/drivers/arm926_uart/arm926_uart.h =================================================================== --- kernel/genarch/include/drivers/arm926_uart/arm926_uart.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,169 +1,0 @@ -/* - * Copyright (c) 2012 Jan Vesely - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief ARM926 on-chip UART (PrimeCell UART, PL011) driver. - */ - -#ifndef KERN_ARM926_UART_H_ -#define KERN_ARM926_UART_H_ - -#include -#include -#include - - -/** ARM926 User Guide ch. 4.8.5 (p. 106 in the pdf) */ -#define ARM926_UART0_BASE_ADDRESS 0x16000000 -#define ARM926_UART1_BASE_ADDRESS 0x16000000 - -/** ARM926 User Guide ch. A.1 (p. 124 in the pdf) */ -#define ARM926_UART0_IRQ 1 -#define ARM926_UART1_IRQ 2 - -/** PrimeCell UART TRM ch. 3.3 (p. 49 in the pdf) */ -typedef struct { - /** UART data register */ - ioport32_t data; -#define ARM926_UART_DATA_DATA_MASK 0xff -#define ARM926_UART_DATA_FE_FLAG (1 << 7) -#define ARM926_UART_DATA_PE_FLAG (1 << 9) -#define ARM926_UART_DATA_BE_FLAG (1 << 10) -#define ARM926_UART_DATA_OE_FLAG (1 << 11) - - union { - /* Same values that are in upper bits of data register*/ - const ioport32_t status; -#define ARM926_UART_STATUS_FE_FLAG (1 << 0) -#define ARM926_UART_STATUS_PE_FLAG (1 << 1) -#define ARM926_UART_STATUS_BE_FLAG (1 << 2) -#define ARM926_UART_STATUS_OE_FLAG (1 << 3) - /* Writing anything clears all errors */ - ioport32_t error_clear; - }; - uint32_t padd0_[4]; - - const ioport32_t flag; -#define ARM926_UART_FLAG_CTS_FLAG (1 << 0) -#define ARM926_UART_FLAG_DSR_FLAG (1 << 1) -#define ARM926_UART_FLAG_DCD_FLAG (1 << 2) -#define ARM926_UART_FLAG_BUSY_FLAG (1 << 3) -#define ARM926_UART_FLAG_RXFE_FLAG (1 << 4) -#define ARM926_UART_FLAG_TXFF_FLAG (1 << 5) -#define ARM926_UART_FLAG_RXFF_FLAG (1 << 6) -#define ARM926_UART_FLAG_TXFE_FLAG (1 << 7) -#define ARM926_UART_FLAG_RI_FLAG (1 << 8) - uint32_t padd1_; - - ioport32_t irda_low_power; -#define ARM926_UART_IRDA_LOW_POWER_MASK 0xff - - ioport32_t int_baud_divisor; -#define ARM926_UART_INT_BAUD_DIVISOR_MASK 0xffff - - ioport32_t fract_baud_divisor; -#define ARM926_UART_FRACT_BAUD_DIVISOR_MASK 0x1f - - ioport32_t line_control_high; -#define ARM926_UART_CONTROLHI_BRK_FLAG (1 << 0) -#define ARM926_UART_CONTROLHI_PEN_FLAG (1 << 1) -#define ARM926_UART_CONTROLHI_EPS_FLAG (1 << 2) -#define ARM926_UART_CONTROLHI_STP2_FLAG (1 << 3) -#define ARM926_UART_CONTROLHI_FEN_FLAG (1 << 4) -#define ARM926_UART_CONTROLHI_WLEN_MASK 0x3 -#define ARM926_UART_CONTROLHI_WLEN_SHIFT 5 -#define ARM926_UART_CONTROLHI_SPS_FLAG (1 << 5) - - ioport32_t control; -#define ARM926_UART_CONTROL_UARTEN_FLAG (1 << 0) -#define ARM926_UART_CONTROL_SIREN_FLAG (1 << 1) -#define ARM926_UART_CONTROL_SIRLP_FLAG (1 << 2) -#define ARM926_UART_CONTROL_LBE_FLAG (1 << 7) -#define ARM926_UART_CONTROL_TXE_FLAG (1 << 8) -#define ARM926_UART_CONTROL_RXE_FLAG (1 << 9) -#define ARM926_UART_CONTROL_DTR_FLAG (1 << 10) -#define ARM926_UART_CONTROL_RTS_FLAG (1 << 11) -#define ARM926_UART_CONTROL_OUT1_FLAG (1 << 12) -#define ARM926_UART_CONTROL_OUT2_FLAG (1 << 13) -#define ARM926_UART_CONTROL_RTSE_FLAG (1 << 14) -#define ARM926_UART_CONTROL_CTSE_FLAG (1 << 15) - - ioport32_t interrupt_fifo; -#define ARM926_UART_INTERRUPTFIFO_TX_MASK 0x7 -#define ARM926_UART_INTERRUPTFIFO_TX_SHIFT 0 -#define ARM926_UART_INTERRUPTFIFO_RX_MASK 0x7 -#define ARM926_UART_INTERRUPTFIFO_RX_SHIFT 3 - - /** Interrupt mask register */ - ioport32_t interrupt_mask; - /** Pending interrupts before applying the mask */ - const ioport32_t raw_interrupt_status; - /** Pending interrupts after applying the mask */ - const ioport32_t masked_interrupt_status; - /** Write 1s to clear pending interrupts */ - ioport32_t interrupt_clear; -#define ARM926_UART_INTERRUPT_RIM_FLAG (1 << 0) -#define ARM926_UART_INTERRUPT_CTSM_FLAG (1 << 1) -#define ARM926_UART_INTERRUPT_DCDM_FLAG (1 << 2) -#define ARM926_UART_INTERRUPT_DSRM_FLAG (1 << 3) -#define ARM926_UART_INTERRUPT_RX_FLAG (1 << 4) -#define ARM926_UART_INTERRUPT_TX_FLAG (1 << 5) -#define ARM926_UART_INTERRUPT_RT_FLAG (1 << 6) -#define ARM926_UART_INTERRUPT_FE_FLAG (1 << 7) -#define ARM926_UART_INTERRUPT_PE_FLAG (1 << 8) -#define ARM926_UART_INTERRUPT_BE_FLAG (1 << 9) -#define ARM926_UART_INTERRUPT_OE_FLAG (1 << 10) -#define ARM926_UART_INTERRUPT_ALL 0x3ff - - ioport32_t dma_control; -#define ARM926_UART_DMACONTROL_RXDMAEN_FLAG (1 << 0) -#define ARM926_UART_DMACONTROL_TXDMAEN_FLAG (1 << 1) -#define ARM926_UART_DMACONTROL_DMAONERR_FLAG (1 << 2) - - // TODO There is some reserved space here followed by - // peripheral identification registers. -} arm926_uart_regs_t; - -typedef struct { - arm926_uart_regs_t *regs; - indev_t *indev; - outdev_t outdev; - irq_t irq; -} arm926_uart_t; - -bool arm926_uart_init(arm926_uart_t *, inr_t, uintptr_t, size_t); -void arm926_uart_input_wire(arm926_uart_t *, indev_t *); - -#endif -/** - * @} - */ Index: kernel/genarch/include/drivers/dsrln/dsrlnin.h =================================================================== --- kernel/genarch/include/drivers/dsrln/dsrlnin.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,60 +1,0 @@ -/* - * Copyright (c) 2009 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Dummy serial line input. - */ - -#ifndef KERN_DSRLNIN_H_ -#define KERN_DSRLNIN_H_ - -#include -#include -#include - -typedef struct { - ioport8_t data; -} __attribute__ ((packed)) dsrlnin_t; - -typedef struct { - irq_t irq; - dsrlnin_t *dsrlnin; - indev_t *srlnin; -} dsrlnin_instance_t; - -extern dsrlnin_instance_t *dsrlnin_init(dsrlnin_t *, inr_t); -extern void dsrlnin_wire(dsrlnin_instance_t *, indev_t *); - -#endif - -/** @} - */ Index: kernel/genarch/include/drivers/dsrln/dsrlnout.h =================================================================== --- kernel/genarch/include/drivers/dsrln/dsrlnout.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2009 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Dummy serial line output. - */ - -#ifndef KERN_DSRLNOUT_H_ -#define KERN_DSRLNOUT_H_ - -#include -#include - -extern outdev_t *dsrlnout_init(ioport8_t *); - -#endif - -/** @} - */ Index: kernel/genarch/include/drivers/ega/ega.h =================================================================== --- kernel/genarch/include/drivers/ega/ega.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,55 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch_drivers - * @{ - */ -/** @file - */ - -#ifndef KERN_EGA_H_ -#define KERN_EGA_H_ - -#include -#include - -#define EGA_COLS 80 -#define EGA_ROWS 25 -#define EGA_SCREEN (EGA_COLS * EGA_ROWS) -#define EGA_VRAM_SIZE (2 * EGA_SCREEN) - -/* EGA device registers. */ -#define EGA_INDEX_REG 0 -#define EGA_DATA_REG 1 - -extern outdev_t *ega_init(ioport8_t *, uintptr_t); - -#endif - -/** @} - */ Index: kernel/genarch/include/drivers/i8042/i8042.h =================================================================== --- kernel/genarch/include/drivers/i8042/i8042.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,61 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** @file - */ - -#ifndef KERN_I8042_H_ -#define KERN_I8042_H_ - -#include -#include -#include - -typedef struct { - ioport8_t data; - uint8_t pad[3]; - ioport8_t status; -} __attribute__ ((packed)) i8042_t; - -typedef struct { - irq_t irq; - i8042_t *i8042; - indev_t *kbrdin; -} i8042_instance_t; - -extern i8042_instance_t *i8042_init(i8042_t *, inr_t); -extern void i8042_wire(i8042_instance_t *, indev_t *); -extern void i8042_cpu_reset(i8042_t *); - -#endif - -/** @} - */ Index: kernel/genarch/include/drivers/legacy/ia32/io.h =================================================================== --- kernel/genarch/include/drivers/legacy/ia32/io.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2009 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - * @brief This file contains definitions used by architectures with the - * ia32 legacy I/O space (i.e. ia32, amd64 and ia64). - */ - -#ifndef KERN_LEGACY_IA32_IO_H -#define KERN_LEGACY_IA32_IO_H - -#include - -#define I8042_BASE ((ioport8_t *) 0x60) -#define EGA_BASE ((ioport8_t *) 0x3d4) -#define NS16550_BASE ((ioport8_t *) 0x3f8) - -#define EGA_VIDEORAM 0xb8000 - -#endif - -/** @} - */ Index: kernel/genarch/include/drivers/ns16550/ns16550.h =================================================================== --- kernel/genarch/include/drivers/ns16550/ns16550.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,76 +1,0 @@ -/* - * Copyright (c) 2001-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Headers for NS 16550 serial controller. - */ - -#ifndef KERN_NS16550_H_ -#define KERN_NS16550_H_ - -#include -#include -#include - -#define IER_ERBFI 0x01 /** Enable Receive Buffer Full Interrupt. */ - -#define LCR_DLAB 0x80 /** Divisor Latch Access bit. */ - -#define MCR_OUT2 0x08 /** OUT2. */ - -/** NS16550 registers. */ -typedef struct { - ioport8_t rbr; /**< Receiver Buffer Register. */ - ioport8_t ier; /**< Interrupt Enable Register. */ - union { - ioport8_t iir; /**< Interrupt Ident Register (read). */ - ioport8_t fcr; /**< FIFO control register (write). */ - } __attribute__ ((packed)); - ioport8_t lcr; /**< Line Control register. */ - ioport8_t mcr; /**< Modem Control Register. */ - ioport8_t lsr; /**< Line Status Register. */ -} __attribute__ ((packed)) ns16550_t; - -/** Structure representing the ns16550 device. */ -typedef struct { - irq_t irq; - ns16550_t *ns16550; - indev_t *kbrdin; -} ns16550_instance_t; - -extern ns16550_instance_t *ns16550_init(ns16550_t *, inr_t, cir_t, void *); -extern void ns16550_wire(ns16550_instance_t *, indev_t *); - -#endif - -/** @} - */ Index: kernel/genarch/include/drivers/pl050/pl050.h =================================================================== --- kernel/genarch/include/drivers/pl050/pl050.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,104 +1,0 @@ -/* - * Copyright (c) 2009 Vineeth Pillai - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** @file - * @brief Describes the pl050 keyboard/mouse controller - */ - -/** - * This file implements pl050 specific functions for keyboard and mouse - */ - -#ifndef KERN_genarch_PL050_H -#define KERN_genarch_PL050_H - -#include -#include -#include - - -/* - * pl050 register offsets from the base address - */ -#define PL050_CR 0x00 -#define PL050_STAT 0x04 -#define PL050_DATA 0x08 -#define PL050_CLOCKDIV 0x0C -#define PL050_INTRSTAT 0x10 - -/* - * Control Register Bits - */ -#define PL050_CR_TYPE (1 << 5) /* Type 0: PS2/AT mode, 1: No Line control bit mode */ -#define PL050_CR_RXINTR (1 << 4) /* Recieve Interrupt Enable */ -#define PL050_CR_TXINTR (1 << 3) /* Transmit Interrupt Enable */ -#define PL050_CR_INTR (1 << 2) /* Interrupt Enable */ -#define PL050_CR_FKMID (1 << 1) /* Force KMI Data Low */ -#define PL050_CR_FKMIC 1 /* Force KMI Clock Low */ - -/* - * Status register bits - */ -#define PL050_STAT_TXEMPTY (1 << 6) /* 1: Transmit register empty */ -#define PL050_STAT_TXBUSY (1 << 5) /* 1: Busy, sending data */ -#define PL050_STAT_RXFULL (1 << 4) /* 1: register Full */ -#define PL050_STAT_RXBUSY (1 << 3) /* 1: Busy, recieving Data */ -#define PL050_STAT_RXPARITY (1 << 2) /* odd parity of the last bit received */ -#define PL050_STAT_KMIC (1 << 1) /* status of KMICLKIN */ -#define PL050_STAT_KMID 1 /* status of KMIDATAIN */ - -/* - * Interrupt status register bits. - */ -#define PL050_TX_INTRSTAT (1 << 1) /* Transmit intr asserted */ -#define PL050_RX_INTRSTAT 1 /* Recieve intr asserted */ - -typedef struct { - ioport8_t *base; - ioport8_t *data; - ioport8_t *status; - ioport8_t *ctrl; -} pl050_t; - -typedef struct { - irq_t irq; - pl050_t *pl050; - indev_t *kbrdin; -} pl050_instance_t; - -extern pl050_instance_t *pl050_init(pl050_t *, inr_t); -extern void pl050_wire(pl050_instance_t *, indev_t *); - - -#endif - -/** @} - */ Index: kernel/genarch/include/drivers/s3c24xx_irqc/s3c24xx_irqc.h =================================================================== --- kernel/genarch/include/drivers/s3c24xx_irqc/s3c24xx_irqc.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,137 +1,0 @@ -/* - * Copyright (c) 2010 Jiri Svoboda - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Samsung S3C24xx on-chip interrupt controller driver. - */ - -#ifndef KERN_S3C24XX_IRQC_H_ -#define KERN_S3C24XX_IRQC_H_ - -#include - -/** Physical address where S3C24XX Interrupt controller is mapped */ -#define S3C24XX_IRQC_ADDRESS 0x4a000000 - -/** S3C24xx on-chip interrupt controller registers */ -typedef struct { - ioport32_t srcpnd; /**< Source pending */ - ioport32_t intmod; /**< Interrupt mode */ - ioport32_t intmsk; /**< Interrupt mask */ - ioport32_t priority; /**< Priority */ - ioport32_t intpnd; /**< Interrupt pending */ - ioport32_t intoffset; /**< Interrupt offset */ - ioport32_t subsrcpnd; /**< Sub source pending */ - ioport32_t intsubmsk; /** Interrupt sub mask */ -} s3c24xx_irqc_regs_t; - -/** S3C24xx Interrupt source numbers. - * - * These correspond to bit numbers in srcpnd, intmod, intmsk and intpnd - * registers as well as to the values read from the intoffset register. - */ -enum s3c24xx_int_source { - S3C24XX_INT_ADC = 31, - S3C24XX_INT_RTC = 30, - S3C24XX_INT_SPI1 = 29, - S3C24XX_INT_UART0 = 28, - S3C24XX_INT_IIC = 27, - S3C24XX_INT_USBH = 26, - S3C24XX_INT_USBD = 25, - S3C24XX_INT_NFCON = 24, - S3C24XX_INT_UART1 = 23, - S3C24XX_INT_SPI0 = 22, - S3C24XX_INT_SDI = 21, - S3C24XX_INT_DMA3 = 20, - S3C24XX_INT_DMA2 = 19, - S3C24XX_INT_DMA1 = 18, - S3C24XX_INT_DMA0 = 17, - S3C24XX_INT_LCD = 16, - S3C24XX_INT_UART2 = 15, - S3C24XX_INT_TIMER4 = 14, - S3C24XX_INT_TIMER3 = 13, - S3C24XX_INT_TIMER2 = 12, - S3C24XX_INT_TIMER1 = 11, - S3C24XX_INT_TIMER0 = 10, - S3C24XX_INT_WDT_AC97 = 9, - S3C24XX_INT_TICK = 8, - S3C24XX_nBATT_FLT = 7, - S3C24XX_INT_CAM = 6, - S3C24XX_EINT8_23 = 5, - S3C24XX_EINT4_7 = 4, - S3C24XX_EINT3 = 3, - S3C24XX_EINT2 = 2, - S3C24XX_EINT1 = 1, - S3C24XX_EINT0 = 0 -}; - -/** S3C24xx Interrupt sub-source numbers. - * - * These correspond to bit numbers in the intsubmsk register. - */ -enum s3c24xx_int_subsource { - S3C24XX_SUBINT_AC97 = 14, - S3C24XX_SUBINT_WDT = 13, - S3C24XX_SUBINT_CAM_P = 12, - S3C24XX_SUBINT_CAM_C = 11, - S3C24XX_SUBINT_ADC_S = 10, - S3C24XX_SUBINT_TC = 9, - S3C24XX_SUBINT_ERR2 = 8, - S3C24XX_SUBINT_TXD2 = 7, - S3C24XX_SUBINT_RXD2 = 6, - S3C24XX_SUBINT_ERR1 = 5, - S3C24XX_SUBINT_TXD1 = 4, - S3C24XX_SUBINT_RXD1 = 3, - S3C24XX_SUBINT_ERR0 = 2, - S3C24XX_SUBINT_TXD0 = 1, - S3C24XX_SUBINT_RXD0 = 0 -}; - -#define S3C24XX_INT_BIT(source) (1 << (source)) -#define S3C24XX_SUBINT_BIT(subsource) (1 << (subsource)) - -typedef struct { - s3c24xx_irqc_regs_t *regs; -} s3c24xx_irqc_t; - -extern void s3c24xx_irqc_init(s3c24xx_irqc_t *, s3c24xx_irqc_regs_t *); -extern unsigned s3c24xx_irqc_inum_get(s3c24xx_irqc_t *); -extern void s3c24xx_irqc_clear(s3c24xx_irqc_t *, unsigned); -extern void s3c24xx_irqc_src_enable(s3c24xx_irqc_t *, unsigned); -extern void s3c24xx_irqc_src_disable(s3c24xx_irqc_t *, unsigned); -extern void s3c24xx_irqc_subsrc_enable(s3c24xx_irqc_t *, unsigned); -extern void s3c24xx_irqc_subsrc_disable(s3c24xx_irqc_t *, unsigned); - -#endif - -/** @} - */ Index: kernel/genarch/include/drivers/s3c24xx_timer/s3c24xx_timer.h =================================================================== --- kernel/genarch/include/drivers/s3c24xx_timer/s3c24xx_timer.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,90 +1,0 @@ -/* - * Copyright (c) 2010 Jiri Svoboda - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Samsung S3C24xx on-chip PWM timer driver. - */ - -#ifndef KERN_S3C24XX_TIMER_H_ -#define KERN_S3C24XX_TIMER_H_ - -#include - -/** Physical address where S3C24XX on-chip PWM timer is mapped */ -#define S3C24XX_TIMER_ADDRESS 0x51000000 - -/** S3C24xx on-chip PWM timer registers */ -typedef struct { - ioport32_t tcfg0; /**< Timer configuration register 0 */ - ioport32_t tcfg1; /**< Timer configuration register 1 */ - ioport32_t tcon; /**< Timer control register */ - - struct { - ioport32_t cntb; /**< Count buffer register */ - ioport32_t cmpb; /**< Compare buffer register */ - ioport32_t cnto; /**< Count observation register */ - } timer[5]; -} s3c24xx_timer_t; - -/** Bits in the S3C24xx PWM timer TCON register. */ -enum s3c24xx_tcon_bits { - TCON_T0_START = (1 << 0), /**< Timer 0 start */ - TCON_T0_MUPDATE = (1 << 1), /**< Timer 0 manual update */ - TCON_T0_INVERT = (1 << 2), /**< Timer 0 inverter on */ - TCON_T0_AUTO_RLD = (1 << 3), /**< Timer 0 auto reload */ - - TCON_DEAD_ZONE = (1 << 4), /**< Dead zone enable */ - - TCON_T1_START = (1 << 8), /**< Timer 1 start */ - TCON_T1_MUPDATE = (1 << 9), /**< Timer 1 manual update */ - TCON_T1_INVERT = (1 << 10), /**< Timer 1 inverter on */ - TCON_T1_AUTO_RLD = (1 << 11), /**< Timer 1 auto reload */ - - TCON_T2_START = (1 << 12), /**< Timer 2 start */ - TCON_T2_MUPDATE = (1 << 13), /**< Timer 2 manual update */ - TCON_T2_INVERT = (1 << 14), /**< Timer 2 inverter on */ - TCON_T2_AUTO_RLD = (1 << 15), /**< Timer 2 auto reload */ - - TCON_T3_START = (1 << 16), /**< Timer 3 start */ - TCON_T3_MUPDATE = (1 << 17), /**< Timer 3 manual update */ - TCON_T3_INVERT = (1 << 18), /**< Timer 3 inverter on */ - TCON_T3_AUTO_RLD = (1 << 19), /**< Timer 3 auto reload */ - - TCON_T4_START = (1 << 20), /**< Timer 4 start */ - TCON_T4_MUPDATE = (1 << 21), /**< Timer 4 manual update */ - TCON_T4_AUTO_RLD = (1 << 22) /**< Timer 4 auto reload */ -}; - -#endif - -/** @} - */ Index: kernel/genarch/include/drivers/s3c24xx_uart/s3c24xx_uart.h =================================================================== --- kernel/genarch/include/drivers/s3c24xx_uart/s3c24xx_uart.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,96 +1,0 @@ -/* - * Copyright (c) 2010 Jiri Svoboda - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Samsung S3C24xx on-chip UART driver. - */ - -#ifndef KERN_S3C24XX_UART_H_ -#define KERN_S3C24XX_UART_H_ - -#include -#include -#include -#include - -/** S3C24xx UART I/O */ -typedef struct { - uint32_t ulcon; - uint32_t ucon; - uint32_t ufcon; - uint32_t umcon; - - uint32_t utrstat; - uint32_t uerstat; - uint32_t ufstat; - uint32_t umstat; - - uint32_t utxh; - uint32_t urxh; - - uint32_t ubrdiv; -} s3c24xx_uart_io_t; - -/* Bits in UTRSTAT register */ -#define S3C24XX_UTRSTAT_TX_EMPTY 0x4 -#define S3C24XX_UTRSTAT_RDATA 0x1 - -/* Bits in UFSTAT register */ -#define S3C24XX_UFSTAT_TX_FULL 0x4000 -#define S3C24XX_UFSTAT_RX_FULL 0x0040 -#define S3C24XX_UFSTAT_RX_COUNT 0x002f - -/* Bits in UCON register */ -#define UCON_RX_INT_LEVEL 0x100 - -/* Bits in UFCON register */ -#define UFCON_TX_FIFO_TLEVEL_EMPTY 0x00 -#define UFCON_RX_FIFO_TLEVEL_1B 0x00 -#define UFCON_FIFO_ENABLE 0x01 - - -/** S3C24xx UART instance */ -typedef struct { - s3c24xx_uart_io_t *io; - indev_t *indev; - irq_t irq; - parea_t parea; -} s3c24xx_uart_t; - -extern outdev_t *s3c24xx_uart_init(uintptr_t, inr_t inr); -extern void s3c24xx_uart_input_wire(s3c24xx_uart_t *, - indev_t *); - -#endif - -/** @} - */ Index: kernel/genarch/include/drivers/via-cuda/cuda.h =================================================================== --- kernel/genarch/include/drivers/via-cuda/cuda.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,123 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** @file - */ - -#ifndef KERN_CUDA_H_ -#define KERN_CUDA_H_ - -#include -#include -#include -#include - -typedef struct { - uint8_t b; - uint8_t pad0[0x1ff]; - - uint8_t a; - uint8_t pad1[0x1ff]; - - uint8_t dirb; - uint8_t pad2[0x1ff]; - - uint8_t dira; - uint8_t pad3[0x1ff]; - - uint8_t t1cl; - uint8_t pad4[0x1ff]; - - uint8_t t1ch; - uint8_t pad5[0x1ff]; - - uint8_t t1ll; - uint8_t pad6[0x1ff]; - - uint8_t t1lh; - uint8_t pad7[0x1ff]; - - uint8_t t2cl; - uint8_t pad8[0x1ff]; - - uint8_t t2ch; - uint8_t pad9[0x1ff]; - - uint8_t sr; - uint8_t pad10[0x1ff]; - - uint8_t acr; - uint8_t pad11[0x1ff]; - - uint8_t pcr; - uint8_t pad12[0x1ff]; - - uint8_t ifr; - uint8_t pad13[0x1ff]; - - uint8_t ier; - uint8_t pad14[0x1ff]; - - uint8_t anh; - uint8_t pad15[0x1ff]; -} cuda_t; - -enum { - CUDA_RCV_BUF_SIZE = 5 -}; - -enum cuda_xfer_state { - cx_listen, - cx_receive, - cx_rcv_end, - cx_send_start, - cx_send -}; - -typedef struct { - irq_t irq; - cuda_t *cuda; - indev_t *kbrdin; - uint8_t rcv_buf[CUDA_RCV_BUF_SIZE]; - uint8_t snd_buf[CUDA_RCV_BUF_SIZE]; - size_t bidx; - size_t snd_bytes; - enum cuda_xfer_state xstate; - SPINLOCK_DECLARE(dev_lock); -} cuda_instance_t; - -extern cuda_instance_t *cuda_init(cuda_t *, inr_t, cir_t, void *); -extern void cuda_wire(cuda_instance_t *, indev_t *); - -#endif - -/** @} - */ Index: kernel/genarch/include/fb/bfb.h =================================================================== --- kernel/genarch/include/fb/bfb.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,60 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Vana - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** @file - */ - -#ifndef KERN_BFB_H_ -#define KERN_BFB_H_ - -#include - -extern uintptr_t bfb_addr; -extern uint32_t bfb_width; -extern uint32_t bfb_height; -extern uint16_t bfb_bpp; -extern uint32_t bfb_scanline; - -extern uint8_t bfb_red_pos; -extern uint8_t bfb_red_size; - -extern uint8_t bfb_green_pos; -extern uint8_t bfb_green_size; - -extern uint8_t bfb_blue_pos; -extern uint8_t bfb_blue_size; - -extern bool bfb_init(void); - -#endif - -/** @} - */ Index: kernel/genarch/include/fb/fb.h =================================================================== --- kernel/genarch/include/fb/fb.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,73 +1,0 @@ -/* - * Copyright (c) 2006 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** @file - */ - -#ifndef KERN_FB_H_ -#define KERN_FB_H_ - -#include -#include -#include - -/** - * Properties of the framebuffer device. - */ -typedef struct fb_properties { - /** Physical address of the framebuffer device. */ - uintptr_t addr; - - /** - * Address where the first (top left) pixel is mapped, - * relative to "addr". - */ - unsigned int offset; - - /** Screen width in pixels. */ - unsigned int x; - - /** Screen height in pixels. */ - unsigned int y; - - /** Bytes per one scanline. */ - unsigned int scan; - - /** Color model. */ - visual_t visual; -} fb_properties_t; - -outdev_t *fb_init(fb_properties_t *props); - -#endif - -/** @} - */ Index: kernel/genarch/include/fb/font-8x16.h =================================================================== --- kernel/genarch/include/fb/font-8x16.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** @file - */ - -#ifndef KERN_FONT_8X16_H_ -#define KERN_FONT_8X16_H_ - -#define FONT_GLYPHS 2899 -#define FONT_WIDTH 8 -#define FONT_SCANLINES 16 - -#include - -extern uint16_t fb_font_glyph(const wchar_t ch); -extern uint8_t fb_font[FONT_GLYPHS][FONT_SCANLINES]; - -#endif - -/** @} - */ Index: kernel/genarch/include/fb/logo-196x66.h =================================================================== --- kernel/genarch/include/fb/logo-196x66.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2008 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** @file - */ - -#ifndef KERN_LOGO_196X66_H_ -#define KERN_LOGO_196X66_H_ - -#define LOGO_WIDTH 196 -#define LOGO_HEIGHT 66 -#define LOGO_COLOR 0xffffff - -#include - -extern uint32_t fb_logo[LOGO_WIDTH * LOGO_HEIGHT]; - -#endif - -/** @} - */ Index: kernel/genarch/include/genarch/acpi/acpi.h =================================================================== --- kernel/genarch/include/genarch/acpi/acpi.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/acpi/acpi.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,94 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** @file + */ + +#ifndef KERN_ACPI_H_ +#define KERN_ACPI_H_ + +#include + +/* Root System Description Pointer */ +struct acpi_rsdp { + uint8_t signature[8]; + uint8_t checksum; + uint8_t oemid[6]; + uint8_t revision; + uint32_t rsdt_address; + uint32_t length; + uint64_t xsdt_address; + uint32_t ext_checksum; + uint8_t reserved[3]; +} __attribute__ ((packed)); + +/* System Description Table Header */ +struct acpi_sdt_header { + uint8_t signature[4]; + uint32_t length; + uint8_t revision; + uint8_t checksum; + uint8_t oemid[6]; + uint8_t oem_table_id[8]; + uint32_t oem_revision; + uint32_t creator_id; + uint32_t creator_revision; +} __attribute__ ((packed)); + +struct acpi_signature_map { + uint8_t *signature; + struct acpi_sdt_header **sdt_ptr; + const char *description; +}; + +/* Root System Description Table */ +struct acpi_rsdt { + struct acpi_sdt_header header; + uint32_t entry[]; +} __attribute__ ((packed)); + +/* Extended System Description Table */ +struct acpi_xsdt { + struct acpi_sdt_header header; + uint64_t entry[]; +} __attribute__ ((packed)); + +extern struct acpi_rsdp *acpi_rsdp; +extern struct acpi_rsdt *acpi_rsdt; +extern struct acpi_xsdt *acpi_xsdt; + +extern void acpi_init(void); +extern int acpi_sdt_check(uint8_t *sdt); + +#endif /* KERN_ACPI_H_ */ + +/** @} + */ Index: kernel/genarch/include/genarch/acpi/madt.h =================================================================== --- kernel/genarch/include/genarch/acpi/madt.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/acpi/madt.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,148 @@ +/* + * Copyright (c) 2005 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** @file + */ + +#ifndef KERN_MADT_H_ +#define KERN_MADT_H_ + +#include +#include +#include + +#define MADT_L_APIC 0 +#define MADT_IO_APIC 1 +#define MADT_INTR_SRC_OVRD 2 +#define MADT_NMI_SRC 3 +#define MADT_L_APIC_NMI 4 +#define MADT_L_APIC_ADDR_OVRD 5 +#define MADT_IO_SAPIC 6 +#define MADT_L_SAPIC 7 +#define MADT_PLATFORM_INTR_SRC 8 +#define MADT_RESERVED_SKIP_BEGIN 9 +#define MADT_RESERVED_SKIP_END 127 +#define MADT_RESERVED_OEM_BEGIN 128 + +struct madt_apic_header { + uint8_t type; + uint8_t length; +} __attribute__ ((packed)); + +/* Multiple APIC Description Table */ +struct acpi_madt { + struct acpi_sdt_header header; + uint32_t l_apic_address; + uint32_t flags; + struct madt_apic_header apic_header[]; +} __attribute__ ((packed)); + +struct madt_l_apic { + struct madt_apic_header header; + uint8_t acpi_id; + uint8_t apic_id; + uint32_t flags; +} __attribute__ ((packed)); + +struct madt_io_apic { + struct madt_apic_header header; + uint8_t io_apic_id; + uint8_t reserved; + uint32_t io_apic_address; + uint32_t global_intr_base; +} __attribute__ ((packed)); + +struct madt_intr_src_ovrd { + struct madt_apic_header header; + uint8_t bus; + uint8_t source; + uint32_t global_int; + uint16_t flags; +} __attribute__ ((packed)); + +struct madt_nmi_src { + struct madt_apic_header header; + uint16_t flags; + uint32_t global_intr; +} __attribute__ ((packed)); + +struct madt_l_apic_nmi { + struct madt_apic_header header; + uint8_t acpi_id; + uint16_t flags; + uint8_t l_apic_lint; +} __attribute__ ((packed)); + +struct madt_l_apic_addr_ovrd { + struct madt_apic_header header; + uint16_t reserved; + uint64_t l_apic_address; +} __attribute__ ((packed)); + +struct madt_io_sapic { + struct madt_apic_header header; + uint8_t io_apic_id; + uint8_t reserved; + uint32_t global_intr_base; + uint64_t io_apic_address; +} __attribute__ ((packed)); + +struct madt_l_sapic { + struct madt_apic_header header; + uint8_t acpi_id; + uint8_t sapic_id; + uint8_t sapic_eid; + uint8_t reserved[3]; + uint32_t flags; + uint32_t acpi_processor_uid_value; + uint8_t acpi_processor_uid_str[1]; +} __attribute__ ((packed)); + +struct madt_platform_intr_src { + struct madt_apic_header header; + uint16_t flags; + uint8_t intr_type; + uint8_t processor_id; + uint8_t processor_eid; + uint8_t io_sapic_vector; + uint32_t global_intr; + uint32_t platform_intr_src_flags; +} __attribute__ ((packed)); + +extern struct acpi_madt *acpi_madt; +extern struct smp_config_operations madt_config_operations; + +extern void acpi_madt_parse(void); + +#endif /* KERN_MADT_H_ */ + +/** @} + */ Index: kernel/genarch/include/genarch/drivers/am335x/cm_dpll.h =================================================================== --- kernel/genarch/include/genarch/drivers/am335x/cm_dpll.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/am335x/cm_dpll.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2013 Maurizio Lombardi + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Texas Instruments AM335x DPLL. + */ + +#ifndef _KERN_AM335X_CM_DPLL_H_ +#define _KERN_AM335X_CM_DPLL_H_ + +#include "cm_dpll_regs.h" +#include "timer.h" + +#define AM335x_CM_DPLL_BASE_ADDRESS 0x44E00500 +#define AM335x_CM_DPLL_SIZE 256 + +static ioport32_t *am335x_cm_dpll_timer_reg_get(am335x_cm_dpll_regs_t *cm, + am335x_timer_id_t id) +{ + switch (id) { + default: + return NULL; + case DMTIMER2: + return &cm->clksel_timer2; + case DMTIMER3: + return &cm->clksel_timer3; + case DMTIMER4: + return &cm->clksel_timer4; + case DMTIMER5: + return &cm->clksel_timer5; + case DMTIMER6: + return &cm->clksel_timer6; + case DMTIMER7: + return &cm->clksel_timer7; + } +} + +static void am335x_clock_source_select(am335x_cm_dpll_regs_t *cm, + am335x_timer_id_t id, am335x_clk_src_t src) +{ + ioport32_t *reg = am335x_cm_dpll_timer_reg_get(cm, id); + if (!reg) + return; + + *reg = (*reg & ~0x03) | src; +} + +#endif + +/** + * @} + */ + Index: kernel/genarch/include/genarch/drivers/am335x/cm_dpll_regs.h =================================================================== --- kernel/genarch/include/genarch/drivers/am335x/cm_dpll_regs.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/am335x/cm_dpll_regs.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2013 Maurizio Lombardi + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Texas Instruments AM335x DPLL registers. + */ + +#ifndef _KERN_AM335X_CM_DPLL_REGS_H_ +#define _KERN_AM335X_CM_DPLL_REGS_H_ + +typedef enum { + CLK_SRC_TCLKIN = 0x00, + CLK_SRC_M_OSC, + CLK_SRC_32_KHZ +} am335x_clk_src_t; + +typedef struct am335x_cm_dpll_regs { + + ioport32_t const pad0; + + ioport32_t clksel_timer7; + ioport32_t clksel_timer2; + ioport32_t clksel_timer3; + ioport32_t clksel_timer4; + + ioport32_t clksel_mac; +#define AM335x_CM_CLKSEL_MII_FLAG (1 << 2) + + ioport32_t clksel_timer5; + ioport32_t clksel_timer6; + + ioport32_t clksel_cpts_rft; + + ioport32_t const pad1; + + ioport32_t clksel_timer1ms; +#define AM335x_CM_CLKSEL_TIMER1MS_CLKMOSC 0x00 +#define AM335x_CM_CLKSEL_TIMER1MS_CLK32KHZ 0x01 +#define AM335x_CM_CLKSEL_TIMER1MS_TCLKIN 0x02 +#define AM335x_CM_CLKSEL_TIMER1MS_CLKRC32KHZ 0x03 +#define AM335x_CM_CLKSEL_TIMER1MS_32KHZCRYSTAL 0x04 + + ioport32_t clksel_gfx_fclk; +#define AM335x_CM_CLKSEL_GFX_FCLK_CLKDIV_FLAG (1 << 0) +#define AM335x_CM_CLKSEL_GFX_FCLK_CLKSEL_FLAG (1 << 1) + + ioport32_t clksel_pru_icss_ocp; + ioport32_t clksel_lcdc_pixel; + ioport32_t clksel_wdt1; + ioport32_t clksel_gpio0_db; + +} am335x_cm_dpll_regs_t; + +#endif + +/** + * @} + */ Index: kernel/genarch/include/genarch/drivers/am335x/cm_per.h =================================================================== --- kernel/genarch/include/genarch/drivers/am335x/cm_per.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/am335x/cm_per.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2013 Maurizio Lombardi + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Texas Instruments AM335x clock module. + */ + +#ifndef _KERN_AM335X_CM_PER_H_ +#define _KERN_AM335X_CM_PER_H_ + +#include +#include "cm_per_regs.h" +#include "timer.h" + +#define AM335x_CM_PER_BASE_ADDRESS 0x44E00000 +#define AM335x_CM_PER_SIZE 1024 + +static ioport32_t *am335x_clock_clkctrl_reg_get(am335x_cm_per_regs_t *cm, + am335x_timer_id_t id) +{ + switch (id) { + default: + return NULL; + case DMTIMER2: + return &cm->timer2_clkctrl; + case DMTIMER3: + return &cm->timer3_clkctrl; + case DMTIMER4: + return &cm->timer4_clkctrl; + case DMTIMER5: + return &cm->timer5_clkctrl; + case DMTIMER6: + return &cm->timer6_clkctrl; + case DMTIMER7: + return &cm->timer7_clkctrl; + } + +} + +static void am335x_clock_module_enable(am335x_cm_per_regs_t *cm, + am335x_timer_id_t timer_id) +{ + ioport32_t *tmr_reg = am335x_clock_clkctrl_reg_get(cm, timer_id); + if (tmr_reg == NULL) + return; + + /* Enable the clock module */ + *tmr_reg = (*tmr_reg & ~0x03) | 0x02; + + /* Wait for completion */ + while ((*tmr_reg & 0x03) != 0x02); +} + +#endif + +/** + * @} + */ + Index: kernel/genarch/include/genarch/drivers/am335x/cm_per_regs.h =================================================================== --- kernel/genarch/include/genarch/drivers/am335x/cm_per_regs.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/am335x/cm_per_regs.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,137 @@ +/* + * Copyright (c) 2013 Maurizio Lombardi + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Texas Instruments AM335x clock module registers. + */ + +#ifndef _KERN_AM335X_CM_PER_REGS_H_ +#define _KERN_AM335X_CM_PER_REGS_H_ + +#include + +typedef struct am335x_cm_per_regs { + + ioport32_t l4ls_clkstctrl; + ioport32_t l3ls_clkstctrl; + ioport32_t l4fw_clkstctrl; + ioport32_t l3_clkstctrl; + + ioport32_t const pad0; + + ioport32_t cpgmac0_clkctrl; + ioport32_t lcdc_clkctrl; + ioport32_t usb0_clkctrl; + + ioport32_t const pad1; + + ioport32_t tptc0_clkctrl; + ioport32_t emif_clkctrl; + ioport32_t ocmcram_clkctrl; + ioport32_t gpmc_clkctrl; + ioport32_t mcasp0_clkctrl; + ioport32_t uart5_clkctrl; + ioport32_t mmc0_clkctrl; + ioport32_t elm_clkctrl; + ioport32_t i2c2_clkctrl; + ioport32_t i2c1_clkctrl; + ioport32_t spi0_clkctrl; + ioport32_t spi1_clkctrl; + + ioport32_t const pad2[3]; + + ioport32_t l4ls_clkctrl; + ioport32_t l4fw_clkctrl; + ioport32_t mcasp1_clkctrl; + ioport32_t uart1_clkctrl; + ioport32_t uart2_clkctrl; + ioport32_t uart3_clkctrl; + ioport32_t uart4_clkctrl; + ioport32_t timer7_clkctrl; + ioport32_t timer2_clkctrl; + ioport32_t timer3_clkctrl; + ioport32_t timer4_clkctrl; + + ioport32_t const pad3[8]; + + ioport32_t gpio1_clkctrl; + ioport32_t gpio2_clkctrl; + ioport32_t gpio3_clkctrl; + + ioport32_t const pad4; + + ioport32_t tpcc_clkctrl; + ioport32_t dcan0_clkctrl; + ioport32_t dcan1_clkctrl; + ioport32_t epwmss1_clkctrl; + ioport32_t emiffw_clkctrl; + ioport32_t epwmss0_clkctrl; + ioport32_t epwmss2_clkctrl; + ioport32_t l3instr_clkctrl; + ioport32_t l3_clkctrl; + ioport32_t ieee5000_clkctrl; + ioport32_t pruicss_clkctrl; + ioport32_t timer5_clkctrl; + ioport32_t timer6_clkctrl; + ioport32_t mmc1_clkctrl; + ioport32_t mmc2_clkctrl; + ioport32_t tptc1_clkctrl; + ioport32_t tptc2_clkctrl; + + ioport32_t const pad5[2]; + + ioport32_t spinlock_clkctrl; + ioport32_t mailbox0_clkctrl; + + ioport32_t const pad6[2]; + + ioport32_t l4hs_clkstctrl; + ioport32_t l4hs_clkctrl; + + ioport32_t const pad7[2]; + + ioport32_t ocpwp_l3_clkstctrl; + ioport32_t ocpwp_clkctrl; + + ioport32_t const pad8[3]; + + ioport32_t pruicss_clkstctrl; + ioport32_t cpsw_clkstctrl; + ioport32_t lcdc_clkstctrl; + ioport32_t clkdiv32_clkctrl; + ioport32_t clk24mhz_clkstctrl; +} am335x_cm_per_regs_t; + +#endif + +/** + * @} + */ Index: kernel/genarch/include/genarch/drivers/am335x/ctrl_module.h =================================================================== --- kernel/genarch/include/genarch/drivers/am335x/ctrl_module.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/am335x/ctrl_module.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2013 Maurizio Lombardi + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Texas Instruments AM335x control module. + */ + +#ifndef _KERN_AM335X_CTRL_MODULE_H_ +#define _KERN_AM335X_CTRL_MODULE_H_ + +#include +#include +#include "ctrl_module_regs.h" + +#define AM335x_CTRL_MODULE_BASE_ADDRESS 0x44E10000 +#define AM335x_CTRL_MODULE_SIZE 131072 /* 128 Kb */ + +typedef ioport32_t am335x_ctrl_module_t; + +static int +am335x_ctrl_module_clock_freq_get(am335x_ctrl_module_t *base, unsigned *freq) +{ + unsigned const control_status = AM335x_CTRL_MODULE_REG_VALUE(base, + CONTROL_STATUS); + + /* Get the sysboot1 field at control_status[22,23] */ + unsigned const sysboot1 = (control_status >> 22) & 0x03; + + switch (sysboot1) { + default: + return EINVAL; + case 0: + *freq = 19200000; /* 19.2 Mhz */ + break; + case 1: + *freq = 24000000; /* 24 Mhz */ + break; + case 2: + *freq = 25000000; /* 25 Mhz */ + break; + case 3: + *freq = 26000000; /* 26 Mhz */ + break; + } + + return EOK; +} + +#endif + +/** + * @} + */ Index: kernel/genarch/include/genarch/drivers/am335x/ctrl_module_regs.h =================================================================== --- kernel/genarch/include/genarch/drivers/am335x/ctrl_module_regs.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/am335x/ctrl_module_regs.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,280 @@ +/* + * Copyright (c) 2013 Maurizio Lombardi + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Texas Instruments AM335x control module registers. + */ + +#ifndef _KERN_AM335X_CTRL_MODULE_REGS_H_ +#define _KERN_AM335X_CTRL_MODULE_REGS_H_ + +#include + +#define AM335x_CTRL_MODULE_REG_VALUE(base, name) \ + (*((ioport32_t *)(AM335x_CTRL_MODULE_##name##_OFFSET + \ + ((ioport8_t *) base)))) + +#define AM335x_CTRL_MODULE_CONTROL_REVISION_OFFSET 0x00 +#define AM335x_CTRL_MODULE_CONTROL_HWINFO_OFFSET 0x04 +#define AM335x_CTRL_MODULE_CONTROL_SYSCONFIG_OFFSET 0x10 +#define AM335x_CTRL_MODULE_CONTROL_STATUS_OFFSET 0x40 +#define AM335x_CTRL_MODULE_CONTROL_EMIF_SDRAM_CONFIG_OFFSET 0x110 +#define AM335x_CTRL_MODULE_CORTEX_VBBLDO_CTRL_OFFSET 0x41C +#define AM335x_CTRL_MODULE_CORE_SLDO_CTRL_OFFSET 0x428 +#define AM335x_CTRL_MODULE_MPU_SLDO_CTRL_OFFSET 0x42C +#define AM335x_CTRL_MODULE_CLK32KDIVRATIO_CTRL_OFFSET 0x444 +#define AM335x_CTRL_MODULE_BANDGAP_CTRL_OFFSET 0x448 +#define AM335x_CTRL_MODULE_BANDGAP_TRIM_OFFSET 0x44C +#define AM335x_CTRL_MODULE_PLL_CLKINPULOW_CTRL_OFFSET 0x458 +#define AM335x_CTRL_MODULE_MOSC_CTRL_OFFSET 0x468 +#define AM335x_CTRL_MODULE_ROSC_CTRL_OFFSET 0x46C +#define AM335x_CTRL_MODULE_DEEPSLEEP_CTRL_OFFSET 0x470 +#define AM335x_CTRL_MODULE_DEVICE_ID_OFFSET 0x600 +#define AM335x_CTRL_MODULE_DEV_FEATURE_OFFSET 0x604 +#define AM335x_CTRL_MODULE_INIT_PRIORITY_0_OFFSET 0x608 +#define AM335x_CTRL_MODULE_INIT_PRIORITY_1_OFFSET 0x60C +#define AM335x_CTRL_MODULE_MMU_CFG_OFFSET 0x610 +#define AM335x_CTRL_MODULE_TPTC_CFG_OFFSET 0x614 +#define AM335x_CTRL_MODULE_USB_CTRL0_OFFSET 0x620 +#define AM335x_CTRL_MODULE_USB_STS0_OFFSET 0x624 +#define AM335x_CTRL_MODULE_USB_CTRL1_OFFSET 0x628 +#define AM335x_CTRL_MODULE_USB_STS1_OFFSET 0x62C +#define AM335x_CTRL_MODULE_MAC_ID0_LO_OFFSET 0x630 +#define AM335x_CTRL_MODULE_MAC_ID0_HI_OFFSET 0x634 +#define AM335x_CTRL_MODULE_MAC_ID1_LO_OFFSET 0x638 +#define AM335x_CTRL_MODULE_MAC_ID1_HI_OFFSET 0x63C +#define AM335x_CTRL_MODULE_DCAN_RAMINIT_OFFSET 0x644 +#define AM335x_CTRL_MODULE_USB_WKUP_CTRL_OFFSET 0x648 +#define AM335x_CTRL_MODULE_GMII_SEL_OFFSET 0x650 +#define AM335x_CTRL_MODULE_PWMSS_CTRL_OFFSET 0x664 +#define AM335x_CTRL_MODULE_MREQPRIO_0_OFFSET 0x670 +#define AM335x_CTRL_MODULE_MREQPRIO_1_OFFSET 0x674 +#define AM335x_CTRL_MODULE_HW_EVENT_SEL_GRP1_OFFSET 0x690 +#define AM335x_CTRL_MODULE_HW_EVENT_SEL_GRP2_OFFSET 0x694 +#define AM335x_CTRL_MODULE_HW_EVENT_SEL_GRP3_OFFSET 0x698 +#define AM335x_CTRL_MODULE_HW_EVENT_SEL_GRP4_OFFSET 0x69C +#define AM335x_CTRL_MODULE_SMRT_CTRL_OFFSET 0x6A0 +#define AM335x_CTRL_MODULE_MPUSS_HW_DEBUG_SEL_OFFSET 0x6A4 +#define AM335x_CTRL_MODULE_MPUSS_HW_DBG_INFO_OFFSET 0x6A8 +#define AM335x_CTRL_MODULE_VDD_MPU_OPP_050_OFFSET 0x770 +#define AM335x_CTRL_MODULE_VDD_MPU_OPP_100_OFFSET 0x774 +#define AM335x_CTRL_MODULE_VDD_MPU_OPP_120_OFFSET 0x778 +#define AM335x_CTRL_MODULE_VDD_MPU_OPP_TURBO_OFFSET 0x77C +#define AM335x_CTRL_MODULE_VDD_CORE_OPP_050_OFFSET 0x7B8 +#define AM335x_CTRL_MODULE_VDD_CORE_OPP_100_OFFSET 0x7BC +#define AM335x_CTRL_MODULE_BB_SCALE_OFFSET 0x7D0 +#define AM335x_CTRL_MODULE_USB_VID_PID_OFFSET 0x7F4 +#define AM335x_CTRL_MODULE_CONF_GPMC_AD0_OFFSET 0x800 +#define AM335x_CTRL_MODULE_CONF_GPMC_AD1_OFFSET 0x804 +#define AM335x_CTRL_MODULE_CONF_GPMC_AD2_OFFSET 0x808 +#define AM335x_CTRL_MODULE_CONF_GPMC_AD3_OFFSET 0x80C +#define AM335x_CTRL_MODULE_CONF_GPMC_AD4_OFFSET 0x810 +#define AM335x_CTRL_MODULE_CONF_GPMC_AD5_OFFSET 0x814 +#define AM335x_CTRL_MODULE_CONF_GPMC_AD6_OFFSET 0x818 +#define AM335x_CTRL_MODULE_CONF_GPMC_AD7_OFFSET 0x81C +#define AM335x_CTRL_MODULE_CONF_GPMC_AD8_OFFSET 0x820 +#define AM335x_CTRL_MODULE_CONF_GPMC_AD9_OFFSET 0x824 +#define AM335x_CTRL_MODULE_CONF_GPMC_AD10_OFFSET 0x828 +#define AM335x_CTRL_MODULE_CONF_GPMC_AD11_OFFSET 0x82C +#define AM335x_CTRL_MODULE_CONF_GPMC_AD12_OFFSET 0x830 +#define AM335x_CTRL_MODULE_CONF_GPMC_AD13_OFFSET 0x834 +#define AM335x_CTRL_MODULE_CONF_GPMC_AD14_OFFSET 0x838 +#define AM335x_CTRL_MODULE_CONF_GPMC_AD15_OFFSET 0x83C +#define AM335x_CTRL_MODULE_CONF_GPMC_A0_OFFSET 0x840 +#define AM335x_CTRL_MODULE_CONF_GPMC_A1_OFFSET 0x844 +#define AM335x_CTRL_MODULE_CONF_GPMC_A2_OFFSET 0x848 +#define AM335x_CTRL_MODULE_CONF_GPMC_A3_OFFSET 0x84C +#define AM335x_CTRL_MODULE_CONF_GPMC_A4_OFFSET 0x850 +#define AM335x_CTRL_MODULE_CONF_GPMC_A5_OFFSET 0x854 +#define AM335x_CTRL_MODULE_CONF_GPMC_A6_OFFSET 0x858 +#define AM335x_CTRL_MODULE_CONF_GPMC_A7_OFFSET 0x85C +#define AM335x_CTRL_MODULE_CONF_GPMC_A8_OFFSET 0x860 +#define AM335x_CTRL_MODULE_CONF_GPMC_A9_OFFSET 0x864 +#define AM335x_CTRL_MODULE_CONF_GPMC_A10_OFFSET 0x868 +#define AM335x_CTRL_MODULE_CONF_GPMC_A11_OFFSET 0x86C +#define AM335x_CTRL_MODULE_CONF_GPMC_WAIT0_OFFSET 0x870 +#define AM335x_CTRL_MODULE_CONF_GPMC_WPN_OFFSET 0x874 +#define AM335x_CTRL_MODULE_CONF_GPMC_BEN1_OFFSET 0x878 +#define AM335x_CTRL_MODULE_CONF_GPMC_CSN0_OFFSET 0x87C +#define AM335x_CTRL_MODULE_CONF_GPMC_CSN1_OFFSET 0x880 +#define AM335x_CTRL_MODULE_CONF_GPMC_CSN2_OFFSET 0x884 +#define AM335x_CTRL_MODULE_CONF_GPMC_CSN3_OFFSET 0x888 +#define AM335x_CTRL_MODULE_CONF_GPMC_CLK_OFFSET 0x88C +#define AM335x_CTRL_MODULE_CONF_GPMC_ADVN_ALE_OFFSET 0x890 +#define AM335x_CTRL_MODULE_CONF_GPMC_OEN_REN_OFFSET 0x894 +#define AM335x_CTRL_MODULE_CONF_GPMC_WEN_OFFSET 0x898 +#define AM335x_CTRL_MODULE_CONF_GPMC_BEN0_CLE_OFFSET 0x89C +#define AM335x_CTRL_MODULE_CONF_LCD_DATA0_OFFSET 0x8A0 +#define AM335x_CTRL_MODULE_CONF_LCD_DATA1_OFFSET 0x8A4 +#define AM335x_CTRL_MODULE_CONF_LCD_DATA2_OFFSET 0x8A8 +#define AM335x_CTRL_MODULE_CONF_LCD_DATA3_OFFSET 0x8AC +#define AM335x_CTRL_MODULE_CONF_LCD_DATA4_OFFSET 0x8B0 +#define AM335x_CTRL_MODULE_CONF_LCD_DATA5_OFFSET 0x8B4 +#define AM335x_CTRL_MODULE_CONF_LCD_DATA6_OFFSET 0x8B8 +#define AM335x_CTRL_MODULE_CONF_LCD_DATA7_OFFSET 0x8BC +#define AM335x_CTRL_MODULE_CONF_LCD_DATA8_OFFSET 0x8C0 +#define AM335x_CTRL_MODULE_CONF_LCD_DATA9_OFFSET 0x8C4 +#define AM335x_CTRL_MODULE_CONF_LCD_DATA10_OFFSET 0x8C8 +#define AM335x_CTRL_MODULE_CONF_LCD_DATA11_OFFSET 0x8CC +#define AM335x_CTRL_MODULE_CONF_LCD_DATA12_OFFSET 0x8D0 +#define AM335x_CTRL_MODULE_CONF_LCD_DATA13_OFFSET 0x8D4 +#define AM335x_CTRL_MODULE_CONF_LCD_DATA14_OFFSET 0x8D8 +#define AM335x_CTRL_MODULE_CONF_LCD_DATA15_OFFSET 0x8DC +#define AM335x_CTRL_MODULE_CONF_LCD_VSYNC_OFFSET 0x8E0 +#define AM335x_CTRL_MODULE_CONF_LCD_HSYNC_OFFSET 0x8E4 +#define AM335x_CTRL_MODULE_CONF_LCD_PCLK_OFFSET 0x8E8 +#define AM335x_CTRL_MODULE_CONF_LCD_AC_BIAS_EN_OFFSET 0x8EC +#define AM335x_CTRL_MODULE_CONF_MMC0_DAT3_OFFSET 0x8F0 +#define AM335x_CTRL_MODULE_CONF_MMC0_DAT2_OFFSET 0x8F4 +#define AM335x_CTRL_MODULE_CONF_MMC0_DAT1_OFFSET 0x8F8 +#define AM335x_CTRL_MODULE_CONF_MMC0_DAT0_OFFSET 0x8FC +#define AM335x_CTRL_MODULE_CONF_MMC0_CLK_OFFSET 0x900 +#define AM335x_CTRL_MODULE_CONF_MMC0_CMD_OFFSET 0x904 +#define AM335x_CTRL_MODULE_CONF_MII1_COL_OFFSET 0x908 +#define AM335x_CTRL_MODULE_CONF_MII1_CRS_OFFSET 0x90C +#define AM335x_CTRL_MODULE_CONF_MII1_RX_ER_OFFSET 0x910 +#define AM335x_CTRL_MODULE_CONF_MII1_TX_EN_OFFSET 0x914 +#define AM335x_CTRL_MODULE_CONF_MII1_RX_DV_OFFSET 0x918 +#define AM335x_CTRL_MODULE_CONF_MII1_TXD3_OFFSET 0x91C +#define AM335x_CTRL_MODULE_CONF_MII1_TXD2_OFFSET 0x920 +#define AM335x_CTRL_MODULE_CONF_MII1_TXD1_OFFSET 0x924 +#define AM335x_CTRL_MODULE_CONF_MII1_TXD0_OFFSET 0x928 +#define AM335x_CTRL_MODULE_CONF_MII1_TX_CLK_OFFSET 0x92C +#define AM335x_CTRL_MODULE_CONF_MII1_RX_CLK_OFFSET 0x930 +#define AM335x_CTRL_MODULE_CONF_MII1_RXD3_OFFSET 0x934 +#define AM335x_CTRL_MODULE_CONF_MII1_RXD2_OFFSET 0x938 +#define AM335x_CTRL_MODULE_CONF_MII1_RXD1_OFFSET 0x93C +#define AM335x_CTRL_MODULE_CONF_MII1_RXD0_OFFSET 0x940 +#define AM335x_CTRL_MODULE_CONF_RMII1_REF_CLK_OFFSET 0x944 +#define AM335x_CTRL_MODULE_CONF_MDIO_OFFSET 0x948 +#define AM335x_CTRL_MODULE_CONF_MDC_OFFSET 0x94C +#define AM335x_CTRL_MODULE_CONF_SPI0_SCLK_OFFSET 0x950 +#define AM335x_CTRL_MODULE_CONF_SPI0_D0_OFFSET 0x954 +#define AM335x_CTRL_MODULE_CONF_SPI0_D1_OFFSET 0x958 +#define AM335x_CTRL_MODULE_CONF_SPI0_CS0_OFFSET 0x95C +#define AM335x_CTRL_MODULE_CONF_SPI0_CS1_OFFSET 0x960 +#define AM335x_CTRL_MODULE_CONF_ECAP0_IN_PWM0_OUT_OFFSET 0x964 +#define AM335x_CTRL_MODULE_CONF_UART0_CTSN_OFFSET 0x968 +#define AM335x_CTRL_MODULE_CONF_UART0_RTSN_OFFSET 0x96C +#define AM335x_CTRL_MODULE_CONF_UART0_RXD_OFFSET 0x970 +#define AM335x_CTRL_MODULE_CONF_UART0_TXD_OFFSET 0x974 +#define AM335x_CTRL_MODULE_CONF_UART1_CTSN_OFFSET 0x978 +#define AM335x_CTRL_MODULE_CONF_UART1_RTSN_OFFSET 0x97C +#define AM335x_CTRL_MODULE_CONF_UART1_RXD_OFFSET 0x980 +#define AM335x_CTRL_MODULE_CONF_UART1_TXD_OFFSET 0x984 +#define AM335x_CTRL_MODULE_CONF_I2C0_SDA_OFFSET 0x988 +#define AM335x_CTRL_MODULE_CONF_I2C0_SCL_OFFSET 0x98C +#define AM335x_CTRL_MODULE_CONF_MCASP0_ACLKX_OFFSET 0x990 +#define AM335x_CTRL_MODULE_CONF_MCASP0_FSX_OFFSET 0x994 +#define AM335x_CTRL_MODULE_CONF_MCASP0_AXR0_OFFSET 0x998 +#define AM335x_CTRL_MODULE_CONF_MCASP0_AHCLKR_OFFSET 0x99C +#define AM335x_CTRL_MODULE_CONF_MCASP0_ACLKR_OFFSET 0x9A0 +#define AM335x_CTRL_MODULE_CONF_MCASP0_FSR_OFFSET 0x9A4 +#define AM335x_CTRL_MODULE_CONF_MCASP0_AXR1_OFFSET 0x9A8 +#define AM335x_CTRL_MODULE_CONF_MCASP0_AHCLKX_OFFSET 0x9AC +#define AM335x_CTRL_MODULE_CONF_XDMA_EVENT_INTR0_OFFSET 0x9B0 +#define AM335x_CTRL_MODULE_CONF_XDMA_EVENT_INTR1_OFFSET 0x9B4 +#define AM335x_CTRL_MODULE_CONF_WARMRSTN_OFFSET 0x9B8 +#define AM335x_CTRL_MODULE_CONF_PWRONRSTN_OFFSET 0x9BC +#define AM335x_CTRL_MODULE_CONF_NNMI_OFFSET 0x9C0 +#define AM335x_CTRL_MODULE_CONF_XTALIN_OFFSET 0x9C4 +#define AM335x_CTRL_MODULE_CONF_XTALOUT_OFFSET 0x9C8 +#define AM335x_CTRL_MODULE_CONF_TMS_OFFSET 0x9D0 +#define AM335x_CTRL_MODULE_CONF_TDI_OFFSET 0x9D4 +#define AM335x_CTRL_MODULE_CONF_TDO_OFFSET 0x9D8 +#define AM335x_CTRL_MODULE_CONF_TCK_OFFSET 0x9DC +#define AM335x_CTRL_MODULE_CONF_TRSTN_OFFSET 0x9E0 +#define AM335x_CTRL_MODULE_CONF_EMU0_OFFSET 0x9E4 +#define AM335x_CTRL_MODULE_CONF_EMU1_OFFSET 0x9E8 +#define AM335x_CTRL_MODULE_CONF_RTC_XTALIN_OFFSET 0x9EC +#define AM335x_CTRL_MODULE_CONF_RTC_XTALOUT_OFFSET 0x9F0 +#define AM335x_CTRL_MODULE_CONF_RTC_PWRONRSTN_OFFSET 0x9F8 +#define AM335x_CTRL_MODULE_CONF_PMIC_POWER_EN_OFFSET 0x9FC +#define AM335x_CTRL_MODULE_CONF_EXT_WAKEUP_OFFSET 0xA00 +#define AM335x_CTRL_MODULE_CONF_RTC_KALDO_ENN_OFFSET 0xA04 +#define AM335x_CTRL_MODULE_CONF_USB0_DM_OFFSET 0xA08 +#define AM335x_CTRL_MODULE_CONF_USB0_DP_OFFSET 0xA0C +#define AM335x_CTRL_MODULE_CONF_USB0_CE_OFFSET 0xA10 +#define AM335x_CTRL_MODULE_CONF_USB0_ID_OFFSET 0xA14 +#define AM335x_CTRL_MODULE_CONF_USB0_VBUS_OFFSET 0xA18 +#define AM335x_CTRL_MODULE_CONF_USB0_DRVVBUS_OFFSET 0xA1C +#define AM335x_CTRL_MODULE_CONF_USB1_DM_OFFSET 0xA20 +#define AM335x_CTRL_MODULE_CONF_USB1_DP_OFFSET 0xA24 +#define AM335x_CTRL_MODULE_CONF_USB1_CE_OFFSET 0xA28 +#define AM335x_CTRL_MODULE_CONF_USB1_ID_OFFSET 0xA2C +#define AM335x_CTRL_MODULE_CONF_USB1_VBUS_OFFSET 0xA30 +#define AM335x_CTRL_MODULE_CONF_USB1_DRVVBUS_OFFSET 0xA34 +#define AM335x_CTRL_MODULE_CQDETECT_STATUS_OFFSET 0xE00 +#define AM335x_CTRL_MODULE_DDR_IO_CTRL_OFFSET 0xE04 +#define AM335x_CTRL_MODULE_VTP_CTRL_OFFSET 0xE0C +#define AM335x_CTRL_MODULE_VREF_CTRL_OFFSET 0xE14 +#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_0_3_OFFSET 0xF90 +#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_4_7_OFFSET 0xF94 +#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_8_11_OFFSET 0xF98 +#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_12_15_OFFSET 0xF9C +#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_16_19_OFFSET 0xFA0 +#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_20_23_OFFSET 0xFA4 +#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_24_27_OFFSET 0xFA8 +#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_28_31_OFFSET 0xFAC +#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_32_35_OFFSET 0xFB0 +#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_36_39_OFFSET 0xFB4 +#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_40_43_OFFSET 0xFB8 +#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_44_47_OFFSET 0xFBC +#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_48_51_OFFSET 0xFC0 +#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_52_55_OFFSET 0xFC4 +#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_56_59_OFFSET 0xFC8 +#define AM335x_CTRL_MODULE_TPCC_EVT_MUX_60_63_OFFSET 0xFCC +#define AM335x_CTRL_MODULE_TIMER_EVT_CAPT_OFFSET 0xFD0 +#define AM335x_CTRL_MODULE_ECAP_EVT_CAPT_OFFSET 0xFD4 +#define AM335x_CTRL_MODULE_ADC_EVT_CAPT_OFFSET 0xFD8 +#define AM335x_CTRL_MODULE_RESET_ISO_OFFSET 0x1000 +#define AM335x_CTRL_MODULE_DDR_CKE_CTRL_OFFSET 0x131C +#define AM335x_CTRL_MODULE_SMA2_OFFSET 0x1320 +#define AM335x_CTRL_MODULE_M3_TXEV_EOI_OFFSET 0x1324 +#define AM335x_CTRL_MODULE_IPC_MSG_REG0_OFFSET 0x1328 +#define AM335x_CTRL_MODULE_IPC_MSG_REG1_OFFSET 0x132C +#define AM335x_CTRL_MODULE_IPC_MSG_REG2_OFFSET 0x1330 +#define AM335x_CTRL_MODULE_IPC_MSG_REG3_OFFSET 0x1334 +#define AM335x_CTRL_MODULE_IPC_MSG_REG4_OFFSET 0x1338 +#define AM335x_CTRL_MODULE_IPC_MSG_REG5_OFFSET 0x133C +#define AM335x_CTRL_MODULE_IPC_MSG_REG6_OFFSET 0x1340 +#define AM335x_CTRL_MODULE_IPC_MSG_REG7_OFFSET 0x1344 +#define AM335x_CTRL_MODULE_DDR_CMD0_IOCTRL_OFFSET 0x1404 +#define AM335x_CTRL_MODULE_DDR_CMD1_IOCTRL_OFFSET 0x1408 +#define AM335x_CTRL_MODULE_DDR_CMD2_IOCTRL_OFFSET 0x140C +#define AM335x_CTRL_MODULE_DDR_DATA0_IOCTRL_OFFSET 0x1440 +#define AM335x_CTRL_MODULE_DDR_DATA1_IOCTRL_OFFSET 0x1444 + +#endif + +/** + * @} + */ Index: kernel/genarch/include/genarch/drivers/am335x/iomux.h =================================================================== --- kernel/genarch/include/genarch/drivers/am335x/iomux.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/am335x/iomux.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,268 @@ +/* + * Copyright (c) 2012 Matteo Facchinetti + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Texas Instruments AM335x CONTROL_MODULE: I/O multiplexing. + */ + +#ifndef KERN_AM335X_IOMUX_H_ +#define KERN_AM335X_IOMUX_H_ + +#include + +/* Pad Control Register for each configurable pin p. 876 */ +#define AM335X_IOMUX_SLEWRATE_SLOW_FLAG (1 << 6) +#define AM335X_IOMUX_RX_ENABLE_FLAG (1 << 5) +#define AM335X_IOMUX_PULLUP_FLAG (1 << 4) +#define AM335X_IOMUX_PULLUPDOWN_ENABLE_FLAG (1 << 3) +#define AM335X_IOMUX_MODE0 0 +#define AM335X_IOMUX_MODE1 1 +#define AM335X_IOMUX_MODE2 2 +#define AM335X_IOMUX_MODE3 3 +#define AM335X_IOMUX_MODE4 4 +#define AM335X_IOMUX_MODE5 5 +#define AM335X_IOMUX_MODE6 6 +#define AM335X_IOMUX_MODE7 7 + +/* AM335X CONTROL_MODULE configurable I/O pin. Table 9-10 at p. 886 */ +#define AM335X_IOMUX_CONF_BASE_ADDRESS 0x44E10800 + +typedef struct { + ioport32_t gpmc_ad1; + ioport32_t gpmc_ad2; + ioport32_t gpmc_ad3; + ioport32_t gpmc_ad4; + ioport32_t gpmc_ad5; + ioport32_t gpmc_ad6; + ioport32_t gpmc_ad7; + ioport32_t gpmc_ad8; + ioport32_t gpmc_ad9; + ioport32_t gpmc_ad10; + ioport32_t gpmc_ad11; + ioport32_t gpmc_ad12; + ioport32_t gpmc_ad13; + ioport32_t gpmc_ad14; + ioport32_t gpmc_ad15; + ioport32_t gpmc_a0; + ioport32_t gpmc_a1; + ioport32_t gpmc_a2; + ioport32_t gpmc_a3; + ioport32_t gpmc_a4; + ioport32_t gpmc_a5; + ioport32_t gpmc_a6; + ioport32_t gpmc_a7; + ioport32_t gpmc_a8; + ioport32_t gpmc_a9; + ioport32_t gpmc_a10; + ioport32_t gpmc_a11; + ioport32_t gpmc_wait0; + ioport32_t gpmc_wpn; + ioport32_t gpmc_be1n; + ioport32_t gpmc_csn0; + ioport32_t gpmc_csn1; + ioport32_t gpmc_csn2; + ioport32_t gpmc_csn3; + ioport32_t gpmc_clk; + ioport32_t gpmc_advn_ale; + ioport32_t gpmc_oen_ren; + ioport32_t gpmc_wen; + ioport32_t gpmc_be0n_cle; + ioport32_t lcd_data0; + ioport32_t lcd_data1; + ioport32_t lcd_data2; + ioport32_t lcd_data3; + ioport32_t lcd_data4; + ioport32_t lcd_data5; + ioport32_t lcd_data6; + ioport32_t lcd_data7; + ioport32_t lcd_data8; + ioport32_t lcd_data9; + ioport32_t lcd_data10; + ioport32_t lcd_data11; + ioport32_t lcd_data12; + ioport32_t lcd_data13; + ioport32_t lcd_data14; + ioport32_t lcd_data15; + ioport32_t lcd_vsync; + ioport32_t lcd_hsync; + ioport32_t lcd_pclk; + ioport32_t lcd_ac_bias_en; + ioport32_t mmc0_dat3; + ioport32_t mmc0_dat2; + ioport32_t mmc0_dat1; + ioport32_t mmc0_dat0; + ioport32_t mmc0_clk; + ioport32_t mmc0_cmd; + ioport32_t mii1_col; + ioport32_t mii1_crs; + ioport32_t mii1_rxerr; + ioport32_t mii1_txen; + ioport32_t mii1_rxdv; + ioport32_t mii1_txd3; + ioport32_t mii1_txd2; + ioport32_t mii1_txd1; + ioport32_t mii1_txd0; + ioport32_t mii1_txclk; + ioport32_t mii1_rxclk; + ioport32_t mii1_rxd3; + ioport32_t mii1_rxd2; + ioport32_t mii1_rxd1; + ioport32_t mii1_rxd0; + ioport32_t rmii1_refclk; + ioport32_t mdio_data; + ioport32_t mdio_clk; + ioport32_t spi0_sclk; + ioport32_t spi0_d0; + ioport32_t spi0_d1; + ioport32_t spi0_cs0; + ioport32_t spi0_cs1; + ioport32_t ecap0_in_pwm0_out; + ioport32_t uart0_ctsn; + ioport32_t uart0_rtsn; + ioport32_t uart0_rxd; + ioport32_t uart0_txd; + ioport32_t uart1_ctsn; + ioport32_t uart1_rtsn; + ioport32_t uart1_rxd; + ioport32_t uart1_txd; + ioport32_t i2c0_sda; + ioport32_t i2c0_scl; + ioport32_t mcasp0_aclkx; + ioport32_t mcasp0_fsx; + ioport32_t mcasp0_axr0; + ioport32_t mcasp0_ahclkr; + ioport32_t mcasp0_aclkr; + ioport32_t mcasp0_fsr; + ioport32_t mcasp0_axr1; + ioport32_t mcasp0_ahclkx; + ioport32_t xdma_event_intr0; + ioport32_t xdma_event_intr1; + ioport32_t nresetin_out; + ioport32_t porz; + ioport32_t nnmi; + ioport32_t osc0_in; + ioport32_t osc0_out; + ioport32_t osc0_vss; + ioport32_t tms; + ioport32_t tdi; + ioport32_t tdo; + ioport32_t tck; + ioport32_t ntrst; + ioport32_t emu0; + ioport32_t emu1; + ioport32_t osc1_in; + ioport32_t osc1_out; + ioport32_t osc1_vss; + ioport32_t rtc_porz; + ioport32_t pmic_power_en; + ioport32_t ext_wakeup; + ioport32_t enz_kaldo_1p8v; + ioport32_t usb0_dm; + ioport32_t usb0_dp; + ioport32_t usb0_ce; + ioport32_t usb0_id; + ioport32_t usb0_vbus; + ioport32_t usb0_drvvbus; + ioport32_t usb1_dm; + ioport32_t usb1_dp; + ioport32_t usb1_ce; + ioport32_t usb1_id; + ioport32_t usb1_vbus; + ioport32_t usb1_drvvbus; + ioport32_t ddr_resetn; + ioport32_t ddr_csn0; + ioport32_t ddr_cke; + ioport32_t ddr_ck; + ioport32_t ddr_nck; + ioport32_t ddr_casn; + ioport32_t ddr_rasn; + ioport32_t ddr_wen; + ioport32_t ddr_ba0; + ioport32_t ddr_ba1; + ioport32_t ddr_ba2; + ioport32_t ddr_a0; + ioport32_t ddr_a1; + ioport32_t ddr_a2; + ioport32_t ddr_a3; + ioport32_t ddr_a4; + ioport32_t ddr_a5; + ioport32_t ddr_a6; + ioport32_t ddr_a7; + ioport32_t ddr_a8; + ioport32_t ddr_a9; + ioport32_t ddr_a10; + ioport32_t ddr_a11; + ioport32_t ddr_a12; + ioport32_t ddr_a13; + ioport32_t ddr_a14; + ioport32_t ddr_a15; + ioport32_t ddr_odt; + ioport32_t ddr_d0; + ioport32_t ddr_d1; + ioport32_t ddr_d2; + ioport32_t ddr_d3; + ioport32_t ddr_d4; + ioport32_t ddr_d5; + ioport32_t ddr_d6; + ioport32_t ddr_d7; + ioport32_t ddr_d8; + ioport32_t ddr_d9; + ioport32_t ddr_d10; + ioport32_t ddr_d11; + ioport32_t ddr_d12; + ioport32_t ddr_d13; + ioport32_t ddr_d14; + ioport32_t ddr_d15; + ioport32_t ddr_dqm0; + ioport32_t ddr_dqm1; + ioport32_t ddr_dqs0; + ioport32_t ddr_dqsn0; + ioport32_t ddr_dqs1; + ioport32_t ddr_dqsn1; + ioport32_t ddr_vref; + ioport32_t ddr_vtp; + ioport32_t ain7; + ioport32_t ain6; + ioport32_t ain5; + ioport32_t ain4; + ioport32_t ain3; + ioport32_t ain2; + ioport32_t ain1; + ioport32_t ain0; + ioport32_t vrefp; + ioport32_t vrefn; + ioport32_t avdd; + ioport32_t avss; + ioport32_t iforce; + ioport32_t vsense; + ioport32_t testout; +} am335x_iomux_conf_regs_t; +#endif /* KERN_AM335X_IOMUX_H_ */ Index: kernel/genarch/include/genarch/drivers/am335x/irc.h =================================================================== --- kernel/genarch/include/genarch/drivers/am335x/irc.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/am335x/irc.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,255 @@ +/* + * Copyright (c) 2012 Maurizio Lombardi + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup genarch + * @{ + */ + +/** + * @file + * @brief Texas Instruments AM335x MPU on-chip interrupt controller driver. + */ + +#ifndef KERN_AM335x_IRQC_H_ +#define KERN_AM335x_IRQC_H_ + +#define AM335x_IRC_BASE_ADDRESS 0x48200000 +#define AM335x_IRC_SIZE 4096 + +#define AM335x_IRC_IRQ_COUNT 128 + +#include + +typedef struct { + const ioport32_t revision; +#define AM335x_IRC_REV_MASK 0xFF + + const uint8_t padd0[12]; + + /* This register controls the various parameters + * of the OCP interface. + */ + ioport32_t sysconfig; +#define AM335x_IRC_SYSCONFIG_AUTOIDLE_FLAG (1 << 0) +#define AM335x_IRC_SYSCONFIG_SOFTRESET_FLAG (1 << 1) + + /* This register provides status information about the module */ + const ioport32_t sysstatus; +#define AM335x_IRC_SYSSTATUS_RESET_DONE_FLAG (1 << 0) + + const uint8_t padd1[40]; + + /* This register supplies the currently active IRQ interrupt number */ + ioport32_t sir_irq; +#define AM335x_IRC_SIR_IRQ_ACTIVEIRQ_MASK 0x7F +#define AM335x_IRC_SIR_IRQ_SPURIOUSIRQFLAG_MASK 0xFFFFFFF8 + + /* This register supplies the currently active FIQ interrupt number */ + const ioport32_t sir_fiq; +#define AM335x_IRC_FIQ_IRQ_ACTIVEFIQ_MASK 0x7F +#define AM335x_IRC_FIQ_IRQ_SPURIOUSFIQFLAG_MASK 0xFFFFFFF8 + + /* This register contains the new interrupt agreement bits */ + ioport32_t control; +#define AM335x_IRC_CONTROL_NEWIRQAGR_FLAG (1 << 0) +#define AM335x_IRC_CONTROL_NEWFIQAGR_FLAG (1 << 1) + + /* This register controls protection of the other registers. + * This register can only be accessed in priviledged mode, regardless + * of the current value of the protection bit. + */ + ioport32_t protection; +#define AM335x_IRC_PROTECTION_FLAG (1 << 0) + + /* This register controls the clock auto-idle for the functional + * clock and the input synchronizers. + */ + ioport32_t idle; +#define AM335x_IRC_IDLE_FUNCIDLE_FLAG (1 << 0) +#define AM335x_IRC_IDLE_TURBO_FLAG (1 << 1) + + const uint8_t padd2[12]; + + /* This register supplies the currently active IRQ priority level */ + const ioport32_t irq_priority; +#define AM335x_IRC_IRQ_PRIORITY_IRQPRIORITY_MASK 0x7F +#define AM335x_IRC_IRQ_PRIORITY_SPURIOUSIRQFLAG_MASK 0xFFFFFFF8 + + /* This register supplies the currently active FIQ priority level */ + const ioport32_t fiq_priority; +#define AM335x_IRC_FIQ_PRIORITY_FIQPRIORITY_MASK 0x7F +#define AM335x_IRC_FIQ_PRIORITY_SPURIOUSIRQFLAG_MASK 0xFFFFFFF8 + + /* This register sets the priority threshold */ + ioport32_t threshold; +#define AM335x_IRC_THRESHOLD_PRIORITYTHRESHOLD_MASK 0xFF +#define AM335x_IRC_THRESHOLD_PRIORITYTHRESHOLD_ENABLED 0x00 +#define AM335x_IRC_THRESHOLD_PRIORITYTHRESHOLD_DISABLED 0xFF + + const uint8_t padd[20]; + + struct { + /* Raw interrupt input status before masking */ + const ioport32_t itr; + + /* Interrupt mask */ + ioport32_t mir; + + /* This register is used to clear the interrupt mask bits, + * Write 1 clears the mask bit to 0. + */ + ioport32_t mir_clear; + + /* This register is used to set the interrupt mask bits, + * Write 1 sets the mask bit to 1. + */ + ioport32_t mir_set; + + /* This register is used to set the software interrupt bits, + * it is also used to read the current active software + * interrupts. + * Write 1 sets the software interrups bits to 1. + */ + ioport32_t isr_set; + + /* This register is used to clear the software interrups bits. + * Write 1 clears the software interrupt bits to 0. + */ + ioport32_t isr_clear; + + /* This register contains the IRQ status after masking. */ + const ioport32_t pending_irq; + + /* This register contains the FIQ status after masking. */ + const ioport32_t pending_fiq; + } interrupts[4]; + + /* These registers contain the priority for the interrups and + * the FIQ/IRQ steering. + */ + ioport32_t ilr[AM335x_IRC_IRQ_COUNT]; +/* 0 = Interrupt routed to IRQ, 1 = interrupt routed to FIQ */ +#define AM335x_IRC_ILR_FIQNIRQ_FLAG (1 << 0) +#define AM335x_IRC_ILR_PRIORITY_MASK 0x3F +#define AM335x_IRC_ILR_PRIORITY_SHIFT 2 + +} am335x_irc_regs_t; + +static inline void am335x_irc_init(am335x_irc_regs_t *regs) +{ + int i; + + /* Initialization sequence */ + + /* 1 - Program the SYSCONFIG register: if necessary, enable the + * autogating by setting the AUTOIDLE bit. + */ + regs->sysconfig &= ~AM335x_IRC_SYSCONFIG_AUTOIDLE_FLAG; + + /* 2 - Program the IDLE register: if necessary, disable functional + * clock autogating or enable synchronizer autogating by setting + * the FUNCIDLE bit or the TURBO bit accordingly. + */ + regs->idle &= ~AM335x_IRC_IDLE_FUNCIDLE_FLAG; + regs->idle &= ~AM335x_IRC_IDLE_TURBO_FLAG; + + /* 3 - Program ILRm register for each interrupt line: Assign a + * priority level and set the FIQNIRQ bit for an FIQ interrupt + * (by default, interrupts are mapped to IRQ and + * priority is 0 (highest). + */ + + for (i = 0; i < AM335x_IRC_IRQ_COUNT; ++i) + regs->ilr[i] = 0; + + /* 4 - Program the MIRn register: Enable interrupts (by default, + * all interrupt lines are masked). + */ + for (i = 0; i < 4; ++i) + regs->interrupts[i].mir_set = 0xFFFFFFFF; +} + +/** Get the currently active IRQ interrupt number + * + * @param regs Pointer to the irc memory mapped registers + * + * @return The active IRQ interrupt number + */ +static inline unsigned am335x_irc_inum_get(am335x_irc_regs_t *regs) +{ + return regs->sir_irq & AM335x_IRC_SIR_IRQ_ACTIVEIRQ_MASK; +} + +/** Reset IRQ output and enable new IRQ generation + * + * @param regs Pointer to the irc memory mapped registers + */ +static inline void am335x_irc_irq_ack(am335x_irc_regs_t *regs) +{ + regs->control = AM335x_IRC_CONTROL_NEWIRQAGR_FLAG; +} + +/** Reset FIQ output and enable new FIQ generation + * + * @param regs Pointer to the irc memory mapped registers + */ +static inline void am335x_irc_fiq_ack(am335x_irc_regs_t *regs) +{ + regs->control = AM335x_IRC_CONTROL_NEWFIQAGR_FLAG; +} + +/** Clear an interrupt mask bit + * + * @param regs Pointer to the irc memory mapped registers + * @param inum The interrupt to be enabled + */ +static inline void am335x_irc_enable(am335x_irc_regs_t *regs, unsigned inum) +{ + ASSERT(inum < AM335x_IRC_IRQ_COUNT); + const unsigned set = inum / 32; + const unsigned pos = inum % 32; + regs->interrupts[set].mir_clear = (1 << pos); +} + +/** Set an interrupt mask bit + * + * @param regs Pointer to the irc memory mapped registers + * @param inum The interrupt to be disabled + */ +static inline void am335x_irc_disable(am335x_irc_regs_t *regs, unsigned inum) +{ + ASSERT(inum < AM335x_IRC_IRQ_COUNT); + const unsigned set = inum / 32; + const unsigned pos = inum % 32; + regs->interrupts[set].mir_set = (1 << pos); +} + +#endif + +/** + * @} + */ Index: kernel/genarch/include/genarch/drivers/am335x/timer.h =================================================================== --- kernel/genarch/include/genarch/drivers/am335x/timer.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/am335x/timer.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,100 @@ +/* + * Copyright (c) 2012 Maurizio Lombardi + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Texas Instruments AM335x timer driver. + */ + +#ifndef _KERN_AM335X_TIMER_H_ +#define _KERN_AM335X_TIMER_H_ + +#include + +#define AM335x_DMTIMER0_BASE_ADDRESS 0x44E05000 +#define AM335x_DMTIMER0_SIZE 4096 +#define AM335x_DMTIMER0_IRQ 66 + +#define AM335x_DMTIMER2_BASE_ADDRESS 0x48040000 +#define AM335x_DMTIMER2_SIZE 4096 +#define AM335x_DMTIMER2_IRQ 68 + +#define AM335x_DMTIMER3_BASE_ADDRESS 0x48042000 +#define AM335x_DMTIMER3_SIZE 4096 +#define AM335x_DMTIMER3_IRQ 69 + +#define AM335x_DMTIMER4_BASE_ADDRESS 0x48044000 +#define AM335x_DMTIMER4_SIZE 4096 +#define AM335x_DMTIMER4_IRQ 92 + +#define AM335x_DMTIMER5_BASE_ADDRESS 0x48046000 +#define AM335x_DMTIMER5_SIZE 4096 +#define AM335x_DMTIMER5_IRQ 93 + +#define AM335x_DMTIMER6_BASE_ADDRESS 0x48048000 +#define AM335x_DMTIMER6_SIZE 4096 +#define AM335x_DMTIMER6_IRQ 94 + +#define AM335x_DMTIMER7_BASE_ADDRESS 0x4804A000 +#define AM335x_DMTIMER7_SIZE 4096 +#define AM335x_DMTIMER7_IRQ 95 + +typedef enum { + DMTIMER0 = 0, + DMTIMER1_1MS, + DMTIMER2, + DMTIMER3, + DMTIMER4, + DMTIMER5, + DMTIMER6, + DMTIMER7, + + TIMERS_MAX +} am335x_timer_id_t; + +typedef struct am335x_timer { + am335x_timer_regs_t *regs; + am335x_timer_id_t id; +} am335x_timer_t; + +extern int am335x_timer_init(am335x_timer_t *timer, am335x_timer_id_t id, + unsigned hz, unsigned srcclk_hz); +extern void am335x_timer_intr_ack(am335x_timer_t *timer); +extern void am335x_timer_reset(am335x_timer_t *timer); +extern void am335x_timer_start(am335x_timer_t *timer); +extern void am335x_timer_stop(am335x_timer_t *timer); + + +#endif + +/** + * @} + */ + Index: kernel/genarch/include/genarch/drivers/am335x/timer_regs.h =================================================================== --- kernel/genarch/include/genarch/drivers/am335x/timer_regs.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/am335x/timer_regs.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,159 @@ +/* + * Copyright (c) 2012 Maurizio Lombardi + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Texas Instruments AM335x DMTIMER memory mapped registers. + */ + +#ifndef _KERN_AM335X_TIMER_REGS_H_ +#define _KERN_AM335X_TIMER_REGS_H_ + +#include + +typedef struct am335x_timer_regs { + + /* This read only register contains the + * revision number of the module + */ + ioport32_t const tidr; +#define AM335x_TIMER_TIDR_MINOR_MASK 0x3F +#define AM335x_TIMER_TIDR_MINOR_SHIFT 0 +#define AM335x_TIMER_TIDR_CUSTOM_MASK 0x03 +#define AM335x_TIMER_TIDR_CUSTOM_SHIFT 6 +#define AM335x_TIMER_TIDR_MAJOR_MASK 0x07 +#define AM335x_TIMER_TIDR_MAJOR_SHIFT 8 +#define AM335x_TIMER_TIDR_RTL_MASK 0x1F +#define AM335x_TIMER_TIDR_RTL_SHIFT 11 +#define AM335x_TIMER_TIDR_FUNC_MASK 0xFFF +#define AM335x_TIMER_TIDR_FUNC_SHIFT 16 +#define AM335x_TIMER_TIDR_SCHEME_MASK 0x03 +#define AM335x_TIMER_TIDR_SCHEME_SHIFT 30 + + ioport32_t const pad1[3]; + + /* This register allows controlling various + * parameters of the OCP interface. + */ + ioport32_t tiocp_cfg; +#define AM335x_TIMER_TIOCPCFG_SOFTRESET_FLAG (1 << 0) +#define AM335x_TIMER_TIOCPCFG_EMUFREE_FLAG (1 << 1) + +#define AM335x_TIMER_TIOCPCFG_IDLEMODE_MASK 0x02 +#define AM335x_TIMER_TIOCPCFG_IDLEMODE_SHIFT 2 +# define AM335x_TIMER_TIOCCPCFG_IDLEMODE_FORCE 0x00 +# define AM335x_TIMER_TIOCCPCFG_IDLEMODE_DISABLED 0x01 +# define AM335x_TIMER_TIOCCPCFG_IDLEMODE_SMART 0x02 +# define AM335x_TIMER_TIOCCPCFG_IDLEMODE_SMART_WAKEUP 0x03 + + ioport32_t const pad2[4]; + + ioport32_t irqstatus_raw; +#define AM335x_TIMER_IRQSTATUS_RAW_MAT_FLAG (1 << 0) +#define AM335x_TIMER_IRQSTATUS_RAW_OVF_FLAG (1 << 1) +#define AM335x_TIMER_IRQSTATUS_RAW_TCAR_FLAG (1 << 2) + + ioport32_t irqstatus; +#define AM335x_TIMER_IRQSTATUS_MAT_FLAG (1 << 0) +#define AM335x_TIMER_IRQSTATUS_OVF_FLAG (1 << 1) +#define AM335x_TIMER_IRQSTATUS_TCAR_FLAG (1 << 2) + + ioport32_t irqenable_set; +#define AM335x_TIMER_IRQENABLE_SET_MAT_FLAG (1 << 0) +#define AM335x_TIMER_IRQENABLE_SET_OVF_FLAG (1 << 1) +#define AM335x_TIMER_IRQENABLE_SET_TCAR_FLAG (1 << 2) + + ioport32_t irqenable_clr; +#define AM335x_TIMER_IRQENABLE_CLR_MAT_FLAG (1 << 0) +#define AM335x_TIMER_IRQENABLE_CLR_OVF_FLAG (1 << 1) +#define AM335x_TIMER_IRQENABLE_CLR_TCAR_FLAG (1 << 2) + + /* Timer IRQ wakeup enable register */ + ioport32_t irqwakeen; +#define AM335x_TIMER_IRQWAKEEN_MAT_FLAG (1 << 0) +#define AM335x_TIMER_IRQWAKEEN_OVF_FLAG (1 << 1) +#define AM335x_TIMER_IRQWAKEEN_TCAR_FLAG (1 << 2) + + /* Timer control register */ + ioport32_t tclr; +#define AM335x_TIMER_TCLR_ST_FLAG (1 << 0) +#define AM335x_TIMER_TCLR_AR_FLAG (1 << 1) +#define AM335x_TIMER_TCLR_PTV_MASK 0x07 +#define AM335x_TIMER_TCLR_PTV_SHIFT 2 +#define AM335x_TIMER_TCLR_PRE_FLAG (1 << 5) +#define AM335x_TIMER_TCLR_CE_FLAG (1 << 6) +#define AM335x_TIMER_TCLR_SCPWM_FLAG (1 << 7) +#define AM335x_TIMER_TCLR_TCM_MASK 0x03 +#define AM335x_TIMER_TCLR_TCM_SHIFT 8 +#define AM335x_TIMER_TCLR_TGR_MASK 0x03 +#define AM335x_TIMER_TCLR_TGR_SHIFT 10 +#define AM335x_TIMER_TCLR_PT_FLAG (1 << 12) +#define AM335x_TIMER_TCLR_CAPT_MODE_FLAG (1 << 13) +#define AM335x_TIMER_TCLR_GPO_CFG_FLAG (1 << 14) + + /* Timer counter register */ + ioport32_t tcrr; + + /* Timer load register */ + ioport32_t tldr; + + /* Timer trigger register */ + ioport32_t const ttgr; + + /* Timer write posted status register */ + ioport32_t twps; +#define AM335x_TIMER_TWPS_PEND_TCLR (1 << 0) +#define AM335x_TIMER_TWPS_PEND_TCRR (1 << 1) +#define AM335x_TIMER_TWPS_PEND_TLDR (1 << 2) +#define AM335x_TIMER_TWPS_PEND_TTGR (1 << 3) +#define AM335x_TIMER_TWPS_PEND_TMAR (1 << 4) + + /* Timer match register */ + ioport32_t tmar; + + /* Timer capture register */ + ioport32_t tcar1; + + /* Timer synchronous interface control register */ + ioport32_t tsicr; +#define AM335x_TIMER_TSICR_SFT_FLAG (1 << 1) +#define AM335x_TIMER_TSICR_POSTED_FLAG (1 << 2) + + /* Timer capture register */ + ioport32_t tcar2; + +} am335x_timer_regs_t; + +#endif + +/** + * @} + */ + Index: kernel/genarch/include/genarch/drivers/am335x/uart.h =================================================================== --- kernel/genarch/include/genarch/drivers/am335x/uart.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/am335x/uart.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,90 @@ +/* + * Copyright (c) Maurizio Lombardi + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Texas Instruments AM335x UART driver. + */ + +#ifndef _KERN_AM335X_UART_H_ +#define _KERN_AM335X_UART_H_ + +#include "uart_regs.h" + +#define AM335x_UART0_BASE_ADDRESS 0x44E09000 +#define AM335x_UART0_SIZE 4096 +#define AM335x_UART0_IRQ 72 + +#define AM335x_UART1_BASE_ADDRESS 0x48022000 +#define AM335x_UART1_SIZE 4096 +#define AM335x_UART1_IRQ 73 + +#define AM335x_UART2_BASE_ADDRESS 0x48024000 +#define AM335x_UART2_SIZE 4096 +#define AM335x_UART2_IRQ 74 + +#define AM335x_UART3_BASE_ADDRESS 0x481A6000 +#define AM335x_UART3_SIZE 4096 +#define AM335x_UART3_IRQ 44 + +#define AM335x_UART4_BASE_ADDRESS 0x481A8000 +#define AM335x_UART4_SIZE 4096 +#define AM335x_UART4_IRQ 45 + +#define AM335x_UART5_BASE_ADDRESS 0x481AA000 +#define AM335x_UART5_SIZE 4096 +#define AM335x_UART5_IRQ 46 + +typedef struct { + am335x_uart_regs_t *regs; + indev_t *indev; + outdev_t outdev; + irq_t irq; +} am335x_uart_t; + +#ifdef CONFIG_AM335X_UART +extern bool am335x_uart_init(am335x_uart_t *uart, inr_t interrupt, + uintptr_t addr, size_t size); + +extern void am335x_uart_input_wire(am335x_uart_t *uart, indev_t *indev); +#else +static bool am335x_uart_init(am335x_uart_t *uart, inr_t interrupt, + uintptr_t addr, size_t size) +{ return true; } + +static void am335x_uart_input_wire(am335x_uart_t *uart, indev_t *indev) {} +#endif + +#endif + +/** + * @} + */ + Index: kernel/genarch/include/genarch/drivers/am335x/uart_regs.h =================================================================== --- kernel/genarch/include/genarch/drivers/am335x/uart_regs.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/am335x/uart_regs.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,431 @@ +/* + * Copyright (c) 2012 Jan Vesely + * Copyright (c) 2012 Maurizio Lombardi + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Texas Instruments AM335x UART memory mapped registers. + */ + +#ifndef _KERN_AM335X_UART_REGS_H_ +#define _KERN_AM335X_UART_REGS_H_ + +#include +#include +#include + +typedef struct { + union { + /** Stores lower part of the 14-bit baud divisor */ + ioport32_t dll; +#define AM335x_UART_DLL_MASK (0xff) + + /** Receive holding register */ + const ioport32_t rhr; +#define AM335x_UART_RHR_MASK (0xff) + + /** Transmit holding register */ + ioport32_t thr; +#define AM335x_UART_THR_MASK (0xff) + }; + + union { + /** Stores higher part of the 14-bit baud divisor */ + ioport32_t dlh; +#define AM335x_UART_DLH_MASK (0x1f) + + /** Interrupt enable registers */ + ioport32_t ier; +#define AM335x_UART_IER_RHR_IRQ_FLAG (1 << 0) +#define AM335x_UART_IER_THR_IRQ_FLAG (1 << 1) +#define AM335x_UART_IER_LINE_STS_IRQ_FLAG (1 << 2) +#define AM335x_UART_IER_MODEM_STS_IRQ_FLAG (1 << 3) +#define AM335x_UART_IER_SLEEP_MODE_FLAG (1 << 4) +#define AM335x_UART_IER_XOFF_IRQ_FLAG (1 << 5) +#define AM335x_UART_IER_RTS_IRQ_FLAG (1 << 6) +#define AM335x_UART_IER_CTS_IRQ_FLAG (1 << 7) + +#define AM335x_CIR_IER_RHR_IRQ_FLAG (1 << 0) +#define AM335x_CIR_IER_THR_IRQ_FLAG (1 << 1) +#define AM335x_CIR_IER_RX_STOP_IRQ_FLAG (1 << 2) +#define AM335x_CIR_IER_RX_OVERRUN_IRQ_FLAG (1 << 3) +#define AM335x_CIR_IER_TX_STS_IRQ_FLAG (1 << 5) + +#define AM335x_IRDA_IER_RHR_IRQ_FLAG (1 << 0) +#define AM335x_IRDA_IER_THR_IRQ_FLAG (1 << 1) +#define AM335x_IRDA_IER_LAST_RX_BYTE_IRQ_FLAG (1 << 2) +#define AM335x_IRDA_IER_RX_OVERRUN_IRQ_FLAG (1 << 3) +#define AM335x_IRDA_IER_STS_FIFO_TRIG_IRQ_FLAG (1 << 4) +#define AM335x_IRDA_IER_TX_STS_IRQ_FLAG (1 << 5) +#define AM335x_IRDA_IER_LINE_STS_IRQ_FLAG (1 << 6) +#define AM335x_IRDA_IER_EOF_IRQ_FLAG (1 << 7) + }; + + union { + /** Interrupt identification register */ + const ioport32_t iir; +#define AM335x_UART_IIR_IRQ_PENDING_FLAG (1 << 0) +#define AM335x_UART_IIR_TYPE_MASK (0x1f) +#define AM335x_UART_IIR_TYPE_SHIFT (1) +#define AM335x_UART_IIR_FCR_MASK (0x3) +#define AM335x_UART_IIR_FCR_SHIFT (6) + +#define AM335x_CIR_IIR_RHR_IRQ_FLAG (1 << 0) +#define AM335x_CIR_IIR_THR_IRQ_FLAG (1 << 1) +#define AM335x_CIR_IIR_RX_STOP_IRQ_FLAG (1 << 2) +#define AM335x_CIR_IIR_RX_OE_IRQ_FLAG (1 << 3) +#define AM335x_CIR_IIR_TX_STS_IRQ_FLAG (1 << 5) + +#define AM335x_IRDA_IIR_RHR_IRQ_FLAG (1 << 0) +#define AM335x_IRDA_IIR_THR_IRQ_FLAG (1 << 1) +#define AM335x_IRDA_IIR_RX_FIFO_LB_IRQ_FLAG (1 << 2) +#define AM335x_IRDA_IIR_RX_OE_IRQ_FLAG (1 << 3) +#define AM335x_IRDA_IIR_STS_FIFO_IRQ_FLAG (1 << 4) +#define AM335x_IRDA_IIR_TX_STS_IRQ_FLAG (1 << 5) +#define AM335x_IRDA_IIR_LINE_STS_IRQ_FLAG (1 << 6) +#define AM335x_IRDA_IIR_EOF_IRQ_FLAG (1 << 7) + + /** FIFO control register */ + ioport32_t fcr; +#define AM335x_UART_FCR_FIFO_EN_FLAG (1 << 0) +#define AM335x_UART_FCR_RX_FIFO_CLR_FLAG (1 << 1) +#define AM335x_UART_FCR_TX_FIFO_CLR_FLAG (1 << 3) +#define AM335x_UART_FCR_DMA_MODE_FLAG (1 << 4) + +#define AM335x_UART_FCR_TX_FIFO_TRIG_MASK (0x3) +#define AM335x_UART_FCR_TX_FIFO_TRIG_SHIFT (4) + +#define AM335x_UART_FCR_RX_FIFO_TRIG_MASK (0x3) +#define AM335x_UART_FCR_RX_FIFO_TRIG_SHIFT (6) + + /** Enhanced feature register */ + ioport32_t efr; +#define AM335x_UART_EFR_SW_FLOW_CTRL_RX_MASK (0x3) +#define AM335x_UART_EFR_SW_FLOW_CTRL_RX_SHIFT (0) +#define AM335x_UART_EFR_SW_FLOW_CTRL_TX_MASK (0x3) +#define AM335x_UART_EFR_SW_FLOW_CTRL_TX_SHIFT (2) + +#define AM335x_UART_EFR_SW_FLOW_CTRL_NONE (0x0) +#define AM335x_UART_EFR_SW_FLOW_CTRL_X2 (0x1) +#define AM335x_UART_EFR_SW_FLOW_CTRL_X1 (0x2) +#define AM335x_UART_EFR_SW_FLOW_CTRL_XBOTH (0x3) + +#define AM335x_UART_EFR_ENH_FLAG (1 << 4) +#define AM335x_UART_EFR_SPEC_CHAR_FLAG (1 << 5) +#define AM335x_UART_EFR_AUTO_RTS_EN_FLAG (1 << 6) +#define AM335x_UART_EFR_AUTO_CTS_EN_FLAG (1 << 7) + }; + + /** Line control register */ + ioport32_t lcr; +#define AM335x_UART_LCR_CHAR_LENGTH_MASK (0x3) +#define AM335x_UART_LCR_CHAR_LENGTH_SHIFT (0) +#define AM335x_UART_LCR_CHAR_LENGTH_5BITS (0x0) +#define AM335x_UART_LCR_CHAR_LENGTH_6BITS (0x1) +#define AM335x_UART_LCR_CHAR_LENGTH_7BITS (0x2) +#define AM335x_UART_LCR_CHAR_LENGTH_8BITS (0x3) +#define AM335x_UART_LCR_NB_STOP_FLAG (1 << 2) +#define AM335x_UART_LCR_PARITY_EN_FLAG (1 << 3) +#define AM335x_UART_LCR_PARITY_TYPE1_FLAG (1 << 4) +#define AM335x_UART_LCR_PARITY_TYPE2_FLAG (1 << 5) +#define AM335x_UART_LCR_BREAK_EN_FLAG (1 << 6) +#define AM335x_UART_LCR_DIV_EN_FLAG (1 << 7) + + + union { + /** Modem control register */ + ioport32_t mcr; +#define AM335x_UART_MCR_DTR_FLAG (1 << 0) +#define AM335x_UART_MCR_RTS_FLAG (1 << 1) +#define AM335x_UART_MCR_RI_STS_CH_FLAG (1 << 2) +#define AM335x_UART_MCR_CD_STS_CH_FLAG (1 << 3) +#define AM335x_UART_MCR_LOOPBACK_EN_FLAG (1 << 4) +#define AM335x_UART_MCR_XON_EN_FLAG (1 << 5) +#define AM335x_UART_MCR_TCR_TLR_FLAG (1 << 6) + + /** UART: XON1 char, IRDA: ADDR1 address */ + ioport32_t xon1_addr1; +#define AM335x_UART_XON1_ADDR1_MASK (0xff) + }; + + union { + /** Line status register */ + const ioport32_t lsr; +#define AM335x_UART_LSR_RX_FIFO_E_FLAG (1 << 0) +#define AM335x_UART_LSR_RX_OE_FLAG (1 << 1) +#define AM335x_UART_LSR_RX_PE_FLAG (1 << 2) +#define AM335x_UART_LSR_RX_FE_FLAG (1 << 3) +#define AM335x_UART_LSR_RX_BI_FLAG (1 << 4) +#define AM335x_UART_LSR_TX_FIFO_E_FLAG (1 << 5) +#define AM335x_UART_LSR_TX_SR_E_FLAG (1 << 6) +#define AM335x_UART_LSR_RX_FIFO_STS_FLAG (1 << 7) + +#define AM335x_CIR_LSR_RX_FIFO_E_FLAG (1 << 0) +#define AM335x_CIR_LSR_RX_STOP_FLAG (1 << 5) +#define AM335x_CIR_LSR_THR_EMPTY_FLAG (1 << 7) + +#define AM335x_IRDA_LSR_RX_FIFO_E_FLAG (1 << 0) +#define AM335x_IRDA_LSR_STS_FIFO_E_FLAG (1 << 1) +#define AM335x_IRDA_LSR_CRC_FLAG (1 << 2) +#define AM335x_IRDA_LSR_ABORT_FLAG (1 << 3) +#define AM335x_IRDA_LSR_FTL_FLAG (1 << 4) +#define AM335x_IRDA_LSR_RX_LAST_FLAG (1 << 5) +#define AM335x_IRDA_LSR_STS_FIFO_FULL_FLAG (1 << 6) +#define AM335x_IRDA_LSR_THR_EMPTY_FLAG (1 << 7) + + /** UART: XON2 char, IRDA: ADDR2 address */ + ioport32_t xon2_addr2; + }; + + union { + /** Modem status register */ + const ioport32_t msr; +#define AM335x_UART_MSR_CTS_STS_FLAG (1 << 0) +#define AM335x_UART_MSR_DSR_STS_FLAG (1 << 1) +#define AM335x_UART_MSR_RI_STS_FLAG (1 << 2) +#define AM335x_UART_MSR_DCD_STS_FLAG (1 << 3) +#define AM335x_UART_MSR_NCTS_STS_FLAG (1 << 4) +#define AM335x_UART_MSR_NDSR_STS_FLAG (1 << 5) +#define AM335x_UART_MSR_NRI_STS_FLAG (1 << 6) +#define AM335x_UART_MSR_NCD_STS_FLAG (1 << 7) + + /** Transmission control register */ + ioport32_t tcr; +#define AM335x_UART_TCR_FIFO_TRIG_MASK (0xf) +#define AM335x_UART_TCR_FIFO_TRIG_HALT_SHIFT (0) +#define AM335x_UART_TCR_FIFO_TRIG_START_SHIFT (4) + + /** UART: XOFF1 char */ + ioport32_t xoff1; +#define AM335x_UART_XOFF1_MASK (0xff) + }; + + union { + /* Scratchpad register, does nothing */ + ioport32_t spr; +#define AM335x_UART_SPR_MASK (0xff) + + /* Trigger level register */ + ioport32_t tlr; +#define AM335x_UART_TLR_LEVEL_MASK (0xf) +#define AM335x_UART_TLR_TX_FIFO_TRIG_SHIFT (0) +#define AM335x_UART_TLR_RX_FIFO_TRIG_SHIFT (4) + + /** UART: XOFF2 char */ + ioport32_t xoff2; +#define AM335x_UART_XOFF2_MASK (0xff) + }; + + /** Mode definition register. */ + ioport32_t mdr1; +#define AM335x_UART_MDR_MS_MASK (0x7) +#define AM335x_UART_MDR_MS_SHIFT (0) +#define AM335x_UART_MDR_MS_UART16 (0x0) +#define AM335x_UART_MDR_MS_SIR (0x1) +#define AM335x_UART_MDR_MS_UART16_AUTO (0x2) +#define AM335x_UART_MDR_MS_UART13 (0x3) +#define AM335x_UART_MDR_MS_MIR (0x4) +#define AM335x_UART_MDR_MS_FIR (0x5) +#define AM335x_UART_MDR_MS_CIR (0x6) +#define AM335x_UART_MDR_MS_DISABLE (0x7) + +#define AM335x_UART_MDR_IR_SLEEP_FLAG (1 << 3) +#define AM335x_UART_MDR_SET_TXIR_FLAG (1 << 4) +#define AM335x_UART_MDR_SCT_FLAG (1 << 5) +#define AM335x_UART_MDR_SIP_FLAG (1 << 6) +#define AM335x_UART_MDR_FRAME_END_MODE_FLAG (1 << 7) + + /** Mode definition register */ + ioport32_t mdr2; +#define AM335x_UART_MDR_IRTX_UNDERRUN_FLAG (1 << 0) +#define AM335x_UART_MDR_STS_FIFO_TRIG_MASK (0x3) +#define AM335x_UART_MDR_STS_FIFO_TRIG_SHIFT (1) +#define AM335x_UART_MDR_PULSE_SHAPING_FLAG (1 << 3) +#define AM335x_UART_MDR_CIR_PULSE_MODE_MASK (0x3) +#define AM335x_UART_MDR_CIR_PULSE_MODE_SHIFT (4) +#define AM335x_UART_MDR_IRRXINVERT_FLAG (1 << 6) + + union { + /** Status FIFO line status register (IrDA only) */ + const ioport32_t sflsr; +#define AM335x_IRDA_SFLSR_CRC_ERROR_FLAG (1 << 1) +#define AM335x_IRDA_SFLSR_ABORT_FLAG (1 << 2) +#define AM335x_IRDA_SFLSR_FTL_FLAG (1 << 3) +#define AM335x_IRDA_SFLSR_OE_FLAG (1 << 4) + + /** Transmit frame length low (IrDA only) */ + ioport32_t txfll; +#define AM335x_UART_TXFLL_MASK (0xff) + }; + + union { + /** Dummy register to restart TX or RX (IrDA only) */ + const ioport32_t resume; + /** Transmit frame length high (IrDA only) */ + ioport32_t txflh; +#define AM335x_UART_TXFLH_MASK (0xff) + }; + + union { + /** Status FIFO register low (IrDA only) */ + const ioport32_t sfregl; +#define AM335x_UART_SFREGL_MASK (0xff) + /** Received frame length low (IrDA only) */ + ioport32_t rxfll; +#define AM335x_UART_RXFLL_MASK (0xff) + }; + + union { + /** Status FIFO register high (IrDA only) */ + const ioport32_t sfregh; +#define AM335x_UART_SFREGH_MASK (0xf) + /** Received frame length high (IrDA only) */ + ioport32_t rxflh; +#define AM335x_UART_RXFLH_MASK (0xf) + }; + + union { + /** UART autobauding status register */ + const ioport32_t uasr; +#define AM335x_UART_UASR_SPEED_MASK (0x1f) +#define AM335x_UART_UASR_SPEED_SHIFT (0) +#define AM335x_UART_UASR_8BIT_CHAR_FLAG (1 << 5) +#define AM335x_UART_UASR_PARITY_MASK (0x3) +#define AM335x_UART_UASR_PARITY_SHIFT (6) + + /** BOF control register (IrDA only) */ + ioport32_t blr; +#define AM335x_IRDA_BLR_XBOF_TYPE_FLAG (1 << 6) +#define AM335x_IRDA_BLR_STS_FIFO_RESET (1 << 7) + }; + + /** Auxiliary control register (IrDA only) */ + ioport32_t acreg; +#define AM335x_IRDA_ACREG_EOT_EN_FLAG (1 << 0) +#define AM335x_IRDA_ACREG_ABORT_EN_FLAG (1 << 1) +#define AM335x_IRDA_ACREG_SCTX_EN_FLAG (1 << 2) +#define AM335x_IRDA_ACREG_SEND_SIP_FLAG (1 << 3) +#define AM335x_IRDA_ACREG_DIS_TX_UNDERRUN_FLAG (1 << 4) +#define AM335x_IRDA_ACREG_DIS_IR_RX_FLAG (1 << 5) +#define AM335x_IRDA_ACREG_SD_MOD_FLAG (1 << 6) +#define AM335x_IRDA_ACREG_PULSE_TYPE_FLAG (1 << 7) + + /** Supplementary control register */ + ioport32_t scr; +#define AM335x_UART_SCR_DMA_MODE_CTL_FLAG (1 << 0) +#define AM335x_UART_SCR_DMA_MODE_MASK (0x3) +#define AM335x_UART_SCR_DMA_MODE_SHIFT (1) +#define AM335x_UART_SCR_TX_EMPTY_CTL_IRQ_FLAG (1 << 3) +#define AM335x_UART_SCR_RX_CTS_WU_EN_FLAG (1 << 4) +#define AM335x_UART_SCR_TX_TRIG_GRANU1_FLAG (1 << 6) +#define AM335x_UART_SCR_RX_TRIG_GRANU1_FLAG (1 << 7) + + /** Supplementary status register */ + const ioport32_t ssr; +#define AM335x_UART_SSR_TX_FIFO_FULL_FLAG (1 << 0) +#define AM335x_UART_SSR_RX_CTS_WU_STS_FLAG (1 << 1) +#define AM335x_UART_SSR_DMA_COUNTER_RESET_FLAG (1 << 2) + + /** BOF Length register (IrDA only)*/ + ioport32_t eblr; +#define AM335x_IRDA_EBLR_DISABLED (0x00) +#define AM335x_IRDA_EBLR_RX_STOP_BITS(bits) (bits & 0xff) + + uint32_t padd0_; + + /** Module version register */ + const ioport32_t mvr; +#define AM335x_UART_MVR_MINOR_MASK (0xf) +#define AM335x_UART_MVR_MINOR_SHIFT (0) +#define AM335x_UART_MVR_MAJOR_MASK (0xf) +#define AM335x_UART_MVR_MAJOR_SHIFT (4) + + /** System configuration register */ + ioport32_t sysc; +#define AM335x_UART_SYSC_AUTOIDLE_FLAG (1 << 0) +#define AM335x_UART_SYSC_SOFTRESET_FLAG (1 << 1) +#define AM335x_UART_SYSC_ENWAKEUP_FLAG (1 << 2) +#define AM335x_UART_SYSC_IDLE_MODE_MASK (0x3) +#define AM335x_UART_SYSC_IDLE_MODE_SHIFT (3) +#define AM335x_UART_SYSC_IDLE_MODE_FORCE (0x0) +#define AM335x_UART_SYSC_IDLE_MODE_NO (0x1) +#define AM335x_UART_SYSC_IDLE_MODE_SMART (0x2) + + /** System status register */ + const ioport32_t syss; +#define AM335x_UART_SYSS_RESETDONE_FLAG (1 << 0) + + /** Wake-up enable register */ + ioport32_t wer; +#define AM335x_UART_WER_CTS_ACTIVITY_FLAG (1 << 0) +#define AM335x_UART_WER_RI_ACTIVITY_FLAG (1 << 2) +#define AM335x_UART_WER_RX_ACTIVITY_FLAG (1 << 4) +#define AM335x_UART_WER_RHR_IRQ_FLAG (1 << 5) +#define AM335x_UART_WER_RLS_IRQ_FLAG (1 << 6) +#define AM335x_UART_WER_TX_WAKEUP_EN_FLAG (1 << 7) + + /** Carrier frequency prescaler */ + ioport32_t cfps; +#define AM335x_UART_CFPS_MASK (0xff) + + /** Number of bytes in RX fifo */ + const ioport32_t rx_fifo_lvl; +#define AM335x_UART_RX_FIFO_LVL_MASK (0xff) + + /** Number of bytes in TX fifo */ + const ioport32_t tx_fifo_lvl; +#define AM335x_UART_TX_FIFO_LVL_MASK (0xff) + + /** RX/TX empty interrupts */ + ioport32_t ier2; +#define AM335x_UART_IER2_RX_FIFO_EMPTY_IRQ_EN_FLAG (1 << 0) +#define AM335x_UART_IER2_TX_FIFO_EMPTY_IRQ_EN_FLAG (1 << 1) + + /** RX/TX empty status */ + ioport32_t isr2; +#define AM335x_UART_ISR2_RX_FIFO_EMPTY_FLAG (1 << 0) +#define AM335x_UART_ISR2_TX_FIFO_EMPTY_FLAG (1 << 1) + + /** Set the sample per bit if non default frequency is used */ + ioport32_t freq_sel; +#define AM335x_UART_FREQ_SEL_MASK (0x000000FF) + + uint32_t padd2_[2]; + + /** Mode definition register 3 */ + ioport32_t mdr3; +#define AM335x_UART_MDR3_DIS_CIR_RX_DEMOD_FLAG (1 << 0) +} am335x_uart_regs_t; + +#endif + +/** + * @} + */ Index: kernel/genarch/include/genarch/drivers/amdm37x/gpt.h =================================================================== --- kernel/genarch/include/genarch/drivers/amdm37x/gpt.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/amdm37x/gpt.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,255 @@ +/* + * Copyright (c) 2012 Jan Vesely + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Texas Instruments AM/DM37x MPU general purpose timer driver. + */ + +#ifndef KERN_AMDM37x_GPT_H_ +#define KERN_AMDM37x_GPT_H_ + +#include +#include + +/* AMDM37x TRM p. 2740 */ +#define AMDM37x_GPT1_BASE_ADDRESS 0x48318000 +#define AMDM37x_GPT1_SIZE 4096 +#define AMDM37x_GPT1_IRQ 37 +#define AMDM37x_GPT2_BASE_ADDRESS 0x49032000 +#define AMDM37x_GPT2_SIZE 4096 +#define AMDM37x_GPT2_IRQ 38 +#define AMDM37x_GPT3_BASE_ADDRESS 0x49034000 +#define AMDM37x_GPT3_SIZE 4096 +#define AMDM37x_GPT3_IRQ 39 +#define AMDM37x_GPT4_BASE_ADDRESS 0x49036000 +#define AMDM37x_GPT4_SIZE 4096 +#define AMDM37x_GPT4_IRQ 40 +#define AMDM37x_GPT5_BASE_ADDRESS 0x49038000 +#define AMDM37x_GPT5_SIZE 4096 +#define AMDM37x_GPT5_IRQ 41 +#define AMDM37x_GPT6_BASE_ADDRESS 0x4903a000 +#define AMDM37x_GPT6_SIZE 4096 +#define AMDM37x_GPT6_IRQ 42 +#define AMDM37x_GPT7_BASE_ADDRESS 0x4903c000 +#define AMDM37x_GPT7_SIZE 4096 +#define AMDM37x_GPT7_IRQ 43 +#define AMDM37x_GPT8_BASE_ADDRESS 0x4903e000 +#define AMDM37x_GPT8_SIZE 4096 +#define AMDM37x_GPT8_IRQ 44 +#define AMDM37x_GPT9_BASE_ADDRESS 0x49040000 +#define AMDM37x_GPT9_SIZE 4096 +#define AMDM37x_GPT9_IRQ 45 +#define AMDM37x_GPT10_BASE_ADDRESS 0x48086000 +#define AMDM37x_GPT10_SIZE 4096 +#define AMDM37x_GPT10_IRQ 46 +#define AMDM37x_GPT11_BASE_ADDRESS 0x48088000 +#define AMDM37x_GPT11_SIZE 4096 +#define AMDM37x_GPT11_IRQ 47 + + +/** GPT register map AMDM37x TRM p. 2740 */ +typedef struct { + /** IP revision */ + const ioport32_t tidr; +#define AMDM37x_GPT_TIDR_MINOR_MASK (0xf) +#define AMDM37x_GPT_TIDR_MINOR_SHIFT (0) +#define AMDM37x_GPT_TIDR_MAJOR_MASK (0xf) +#define AMDM37x_GPT_TIDR_MAJOR_SHIFT (4) + uint32_t padd0_[3]; + + /** L4 Interface parameters */ + ioport32_t tiocp_cfg; +#define AMDM37x_GPT_TIOCP_CFG_AUTOIDLE_FLAG (1 << 0) +#define AMDM37x_GPT_TIOCP_CFG_SOFTRESET_FLAG (1 << 1) +#define AMDM37x_GPT_TIOCP_CFG_ENWAKEUP_FLAG (1 << 2) +#define AMDM37x_GPT_TIOCP_CFG_IDLEMODE_MASK (0x3) +#define AMDM37x_GPT_TIOCP_CFG_IDLEMODE_SHIFT (3) +#define AMDM37x_GPT_TIOCP_CFG_EMUFREE_FlAG (1 << 5) +#define AMDM37x_GPT_TIOCP_CFG_CLOCKACTIVITY_MASK (0x3) +#define AMDM37x_GPT_TIOCP_CFG_CLOCKACTIVITY_SHIFT (8) + + /** Module status information, excluding irq */ + const ioport32_t tistat; +#define AMDM37x_GPT_TISTAT_RESET_DONE_FLAG (1 << 0) + + /** Interrupt status register */ + ioport32_t tisr; +#define AMDM37x_GPT_TISR_MAT_IRQ_FLAG (1 << 0) +#define AMDM37x_GPT_TISR_OVF_IRQ_FLAG (1 << 1) +#define AMDM37x_GPT_TISR_TCAR_IRQ_FLAG (1 << 2) + + /* Interrupt enable register */ + ioport32_t tier; +#define AMDM37x_GPT_TIER_MAT_IRQ_FLAG (1 << 0) +#define AMDM37x_GPT_TIER_OVF_IRQ_FLAG (1 << 1) +#define AMDM37x_GPT_TIER_TCAR_IRQ_FLAG (1 << 2) + + /** Wakeup enable register */ + ioport32_t twer; +#define AMDM37x_GPT_TWER_MAT_IRQ_FLAG (1 << 0) +#define AMDM37x_GPT_TWER_OVF_IRQ_FLAG (1 << 1) +#define AMDM37x_GPT_TWER_TCAR_IRQ_FLAG (1 << 2) + + /** Optional features control register */ + ioport32_t tclr; +#define AMDM37x_GPT_TCLR_ST_FLAG (1 << 0) +#define AMDM37x_GPT_TCLR_AR_FLAG (1 << 1) +#define AMDM37x_GPT_TCLR_PTV_MASK (0x7) +#define AMDM37x_GPT_TCLR_PTV_SHIFT (2) +#define AMDM37x_GPT_TCLR_PRE_FLAG (1 << 5) +#define AMDM37x_GPT_TCLR_CE_FLAG (1 << 6) +#define AMDM37x_GPT_TCLR_SCPWM (1 << 7) +#define AMDM37x_GPT_TCLR_TCM_MASK (0x3) +#define AMDM37x_GPT_TCLR_TCM_SHIFT (8) +#define AMDM37x_GPT_TCLR_TRG_MASK (0x3) +#define AMDM37x_GPT_TCLR_TRG_SHIFT (10) +#define AMDM37x_GPT_TCLR_PT_FLAG (1 << 12) +#define AMDM37x_GPT_TCLR_CAPT_MODE_FLAG (1 << 13) +#define AMDM37x_GPT_TCLR_GPO_CFG_FLAG (1 << 14) + + /** Value of timer counter */ + ioport32_t tccr; + + /** Timer load register */ + ioport32_t tldr; + + /** Timer trigger register */ + ioport32_t ttgr; + + /** Write-posted pending register */ + const ioport32_t twps; +#define AMDM37x_GPT_TWPS_TCLR_FLAG (1 << 0) +#define AMDM37x_GPT_TWPS_TCRR_FLAG (1 << 1) +#define AMDM37x_GPT_TWPS_TLDR_FLAG (1 << 2) +#define AMDM37x_GPT_TWPS_TTGR_FLAG (1 << 3) +#define AMDM37x_GPT_TWPS_TMAR_FLAG (1 << 4) +#define AMDM37x_GPT_TWPS_TPIR_FLAG (1 << 5) +#define AMDM37x_GPT_TWPS_TNIR_FLAG (1 << 6) +#define AMDM37x_GPT_TWPS_TCVR_FLAG (1 << 7) +#define AMDM37x_GPT_TWPS_TOCR_FLAG (1 << 8) +#define AMDM37x_GPT_TWPS_TOWR_FLAG (1 << 9) + + /** Timer match register */ + ioport32_t tmar; + + /** Capture value 1 register */ + const ioport32_t tcar1; + + /** Software interface control register */ + ioport32_t tsicr; +#define AMDM37x_GPT_TSICR_SFT_FLAG (1 << 1) +#define AMDM37x_GPT_TSICR_POSTED_FLAG (1 << 2) + + /** Capture value 2 register */ + const ioport32_t tcar2; + + /* GPT1,2,10 only (used for 1ms time period generation)*/ + + /** Positive increment register */ + ioport32_t tpir; + + /** Negative increment register */ + ioport32_t tnir; + + /** Counter value register */ + ioport32_t tcvr; + + /** Mask the tick interrupt for selected number of ticks */ + ioport32_t tocr; + + /** Number of masked overflow interrupts */ + ioport32_t towr; +} amdm37x_gpt_regs_t; + +typedef struct { + amdm37x_gpt_regs_t *regs; + bool special_available; +} amdm37x_gpt_t; + +static inline void amdm37x_gpt_timer_ticks_init( + amdm37x_gpt_t* timer, uintptr_t ioregs, size_t iosize, unsigned hz) +{ + /* Set 32768 Hz clock as source */ + // TODO find a nicer way to setup 32kHz clock source for timer1 + // reg 0x48004C40 is CM_CLKSEL_WKUP see page 485 of the manual + ioport32_t *clksel = (void*) km_map(0x48004C40, 4, PAGE_NOT_CACHEABLE); + *clksel &= ~1; + km_unmap((uintptr_t)clksel, 4); + + ASSERT(timer); + /* Map control register */ + timer->regs = (void*) km_map(ioregs, iosize, PAGE_NOT_CACHEABLE); + + /* Set autoreload */ + timer->regs->tclr = AMDM37x_GPT_TCLR_AR_FLAG; + + timer->special_available = ( + (ioregs == AMDM37x_GPT1_BASE_ADDRESS) || + (ioregs == AMDM37x_GPT2_BASE_ADDRESS) || + (ioregs == AMDM37x_GPT10_BASE_ADDRESS)); + timer->regs->tldr = 0xffffffff - (32768 / hz) + 1; + timer->regs->tccr = 0xffffffff - (32768 / hz) + 1; + if (timer->special_available) { + /* Set values for according to formula (manual p. 2733) */ + /* Use temporary variables for easier debugging */ + const uint32_t tpir = + ((32768 / hz + 1) * 1000000) - (32768000L * (1000 / hz)); + const uint32_t tnir = + ((32768 / hz) * 1000000) - (32768000 * (1000 / hz)); + timer->regs->tpir = tpir; + timer->regs->tnir = tnir; + } + +} + +static inline void amdm37x_gpt_timer_ticks_start(amdm37x_gpt_t* timer) +{ + ASSERT(timer); + ASSERT(timer->regs); + /* Enable overflow interrupt */ + timer->regs->tier |= AMDM37x_GPT_TIER_OVF_IRQ_FLAG; + /* Start timer */ + timer->regs->tclr |= AMDM37x_GPT_TCLR_ST_FLAG; +} + +static inline void amdm37x_gpt_irq_ack(amdm37x_gpt_t* timer) +{ + ASSERT(timer); + ASSERT(timer->regs); + /* Clear all pending interrupts */ + timer->regs->tisr = timer->regs->tisr; +} + +#endif + +/** + * @} + */ Index: kernel/genarch/include/genarch/drivers/amdm37x/irc.h =================================================================== --- kernel/genarch/include/genarch/drivers/amdm37x/irc.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/amdm37x/irc.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,206 @@ +/* + * Copyright (c) 2012 Jan Vesely + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Texas Instruments AM/DM37x MPU on-chip interrupt controller driver. + */ + +#ifndef KERN_AMDM37x_IRQC_H_ +#define KERN_AMDM37x_IRQC_H_ + +/* AMDM37x TRM p. 1079 */ +#define AMDM37x_IRC_BASE_ADDRESS 0x48200000 +#define AMDM37x_IRC_SIZE 4096 + +#define AMDM37x_IRC_IRQ_COUNT 96 + +#include + +typedef struct { + const ioport32_t revision; /**< Revision */ +#define AMDM37x_IRC_REV_MASK (0xff) + + uint8_t padd0_[12]; + + ioport32_t sysconfig; /**< SYS config */ +#define AMDM37x_IRC_SYSCONFIG_AUTOIDLE_FLAG (1 << 0) +#define AMDM37x_IRC_SYSCONFIG_SOFTRESET_FLAG (1 << 1) + + const ioport32_t sysstatus; /**< SYS status */ +#define AMDM37x_IRC_SYSSTATUS_RESET_DONE_FLAG (1 << 0) + + uint8_t padd1_[40]; + + const ioport32_t sir_irq; /**< Currently active irq number */ +#define AMDM37x_IRC_SIR_IRQ_ACTIVEIRQ_MASK (0x7f) +#define AMDM37x_IRC_SIR_IRQ_SPURIOUSIRQFLAG_MASK (0xfffffff8) + + const ioport32_t sir_fiq; +#define AMDM37x_IRC_SIR_FIQ_ACTIVEIRQ_MASK (0x7f) +#define AMDM37x_IRC_SIR_FIQ_SPURIOUSIRQFLAG_MASK (0xfffffff8) + + ioport32_t control; /**< New interrupt agreement. */ +#define AMDM37x_IRC_CONTROL_NEWIRQAGR_FLAG (1 << 0) +#define AMDM37x_IRC_CONTROL_NEWFIQAGR_FLAG (1 << 1) + + ioport32_t protection; /**< Protect other registers. */ +#define AMDM37x_IRC_PROTECTION_PROETCTION_FLAG (1 << 0) + + ioport32_t idle; /**< Idle and autogating */ +#define AMDM37x_IRC_IDLE_FUNCIDLE_FLAG (1 << 0) +#define AMDM37x_IRC_IDLE_TURBO_FLAG (1 << 1) + + uint8_t padd2_[12]; + + ioport32_t irq_priority; /**< Active IRQ priority */ +#define AMDM37x_IRC_IRQ_PRIORITY_IRQPRIORITY_MASK (0x7f) +#define AMDM37x_IRC_IRQ_PRIORITY_SPURIOUSIRQFLAG_MASK (0xfffffff8) + + ioport32_t fiq_priority; /**< Active FIQ priority */ +#define AMDM37x_IRC_FIQ_PRIORITY_FIQPRIORITY_MASK (0x7f) +#define AMDM37x_IRC_FIQ_PRIORITY_SPURIOUSFIQFLAG_MASK (0xfffffff8) + + ioport32_t threshold; /**< Priority threshold */ +#define AMDM37x_IRC_THRESHOLD_PRIORITYTHRESHOLD_MASK (0xff) +#define AMDM37x_IRC_THRESHOLD_PRIORITYTHRESHOLD_ENABLED (0x00) +#define AMDM37x_IRC_THRESHOLD_PRIORITYTHRESHOLD_DISABLED (0xff) + + uint8_t padd3__[20]; + + struct { + const ioport32_t itr; /**< Interrupt input status before masking */ + ioport32_t mir; /**< Interrupt mask */ + ioport32_t mir_clear; /**< Clear mir mask bits */ + ioport32_t mir_set; /**< Set mir mask bits */ + ioport32_t isr_set; /**< Set software interrupt bits */ + ioport32_t isr_clear; /**< Clear software interrupt bits */ + const ioport32_t pending_irq; /**< IRQ status after masking */ + const ioport32_t pending_fiq; /**< FIQ status after masking */ + } interrupts[3]; + + uint8_t padd4_[32]; + + ioport32_t ilr[96]; /**< FIQ/IRQ steering */ +#define AMDM37x_IRC_ILR_FIQNIRQ (1 << 0) +#define AMDM37x_IRC_ILR_PRIORITY_MASK (0x3f) +#define AMDM37x_IRC_ILR_PRIORITY_SHIFT (2) + +} amdm37x_irc_regs_t; + +static inline void amdm37x_irc_dump(amdm37x_irc_regs_t *regs) +{ +#define DUMP_REG(name) \ + printf("%s %p(%x).\n", #name, ®s->name, regs->name); + + DUMP_REG(revision); + DUMP_REG(sysconfig); + DUMP_REG(sysstatus); + DUMP_REG(sir_irq); + DUMP_REG(sir_fiq); + DUMP_REG(control); + DUMP_REG(protection); + DUMP_REG(idle); + DUMP_REG(irq_priority); + DUMP_REG(fiq_priority); + DUMP_REG(threshold); + + for (int i = 0; i < 3; ++i) { + DUMP_REG(interrupts[i].itr); + DUMP_REG(interrupts[i].mir); + DUMP_REG(interrupts[i].isr_set); + DUMP_REG(interrupts[i].pending_irq); + DUMP_REG(interrupts[i].pending_fiq); + } + for (int i = 0; i < AMDM37x_IRC_IRQ_COUNT; ++i) { + DUMP_REG(ilr[i]); + } + +#undef DUMP_REG +} + +static inline void amdm37x_irc_init(amdm37x_irc_regs_t *regs) +{ + /* AMDM37x TRM sec 12.5.1 p. 2425 */ + /* Program system config register */ + //TODO enable this when you know the meaning + //regs->sysconfig |= AMDM37x_IRC_SYSCONFIG_AUTOIDLE_FLAG; + + /* Program idle register */ + //TODO enable this when you know the meaning + //regs->sysconfig |= AMDM37x_IRC_IDLE_TURBO_FLAG; + + /* Program ilr[m] assign priority, decide fiq */ + for (unsigned i = 0; i < AMDM37x_IRC_IRQ_COUNT; ++i) { + regs->ilr[i] = 0; /* highest prio(default) route to irq */ + } + + /* Disable all interrupts */ + regs->interrupts[0].mir_set = 0xffffffff; + regs->interrupts[1].mir_set = 0xffffffff; + regs->interrupts[2].mir_set = 0xffffffff; +} + +static inline unsigned amdm37x_irc_inum_get(amdm37x_irc_regs_t *regs) +{ + return regs->sir_irq & AMDM37x_IRC_SIR_IRQ_ACTIVEIRQ_MASK; +} + +static inline void amdm37x_irc_irq_ack(amdm37x_irc_regs_t *regs) +{ + regs->control = AMDM37x_IRC_CONTROL_NEWIRQAGR_FLAG; +} + +static inline void amdm37x_irc_fiq_ack(amdm37x_irc_regs_t *regs) +{ + regs->control = AMDM37x_IRC_CONTROL_NEWFIQAGR_FLAG; +} + +static inline void amdm37x_irc_enable(amdm37x_irc_regs_t *regs, unsigned inum) +{ + ASSERT(inum < AMDM37x_IRC_IRQ_COUNT); + const unsigned set = inum / 32; + const unsigned pos = inum % 32; + regs->interrupts[set].mir_clear = (1 << pos); +} + +static inline void amdm37x_irc_disable(amdm37x_irc_regs_t *regs, unsigned inum) +{ + ASSERT(inum < AMDM37x_IRC_IRQ_COUNT); + const unsigned set = inum / 32; + const unsigned pos = inum % 32; + regs->interrupts[set].mir_set = (1 << pos); +} + +#endif + +/** + * @} + */ Index: kernel/genarch/include/genarch/drivers/amdm37x/uart.h =================================================================== --- kernel/genarch/include/genarch/drivers/amdm37x/uart.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/amdm37x/uart.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2012 Jan Vesely + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Texas Instruments AMDM37x UART driver + */ + +#ifndef _AMDM37x_UART_H_ +#define _AMDM37x_UART_H_ + +#include "uart_regs.h" + +/* AMDM37x TRM p. 2950 */ +#define AMDM37x_UART1_BASE_ADDRESS 0x4806a000 +#define AMDM37x_UART1_SIZE 1024 +#define AMDM37x_UART1_IRQ 72 /* AMDM37x TRM p. 2418 */ + +#define AMDM37x_UART2_BASE_ADDRESS 0x4806b000 +#define AMDM37x_UART2_SIZE 1024 +#define AMDM37x_UART2_IRQ 73 /* AMDM37x TRM p. 2418 */ + +#define AMDM37x_UART3_BASE_ADDRESS 0x49020000 +#define AMDM37x_UART3_SIZE 1024 +#define AMDM37x_UART3_IRQ 74 /* AMDM37x TRM p. 2418 */ + +#define AMDM37x_UART4_BASE_ADDRESS 0x49042000 +#define AMDM37x_UART4_SIZE 1024 +#define AMDM37x_UART4_IRQ 80 /* AMDM37x TRM p. 2418 */ + +typedef struct { + amdm37x_uart_regs_t *regs; + indev_t *indev; + outdev_t outdev; + irq_t irq; +} amdm37x_uart_t; + + +bool amdm37x_uart_init(amdm37x_uart_t *, inr_t, uintptr_t, size_t); +void amdm37x_uart_input_wire(amdm37x_uart_t *, indev_t *); + +#endif + +/** + * @} + */ Index: kernel/genarch/include/genarch/drivers/amdm37x/uart_regs.h =================================================================== --- kernel/genarch/include/genarch/drivers/amdm37x/uart_regs.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/amdm37x/uart_regs.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,431 @@ +/* + * Copyright (c) 2012 Jan Vesely + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Texas Instruments AMDM37x UART memory mapped registers. + */ + +#ifndef KERN_AMDM37x_UART_H_ +#define KERN_AMDM37x_UART_H_ + +#include +#include +#include + +typedef struct { + union { + /** Stores lower part of the 14-bit baud divisor */ + ioport32_t dll; +#define AMDM37x_UART_DLL_MASK (0xff) + + /** Receive holding register */ + const ioport32_t rhr; +#define AMDM37x_UART_RHR_MASK (0xff) + + /** Transmit holding register */ + ioport32_t thr; +#define AMDM37x_UART_THR_MASK (0xff) + }; + + union { + /** Stores higher part of the 14-bit baud divisor */ + ioport32_t dlh; +#define AMDM37x_UART_DLH_MASK (0x1f) + + /** Interrupt enable registers */ + ioport32_t ier; +#define AMDM37x_UART_IER_RHR_IRQ_FLAG (1 << 0) +#define AMDM37x_UART_IER_THR_IRQ_FLAG (1 << 1) +#define AMDM37x_UART_IER_LINE_STS_IRQ_FLAG (1 << 2) +#define AMDM37x_UART_IER_MODEM_STS_IRQ_FLAG (1 << 3) +#define AMDM37x_UART_IER_SLEEP_MODE_FLAG (1 << 4) +#define AMDM37x_UART_IER_XOFF_IRQ_FLAG (1 << 5) +#define AMDM37x_UART_IER_RTS_IRQ_FLAG (1 << 6) +#define AMDM37x_UART_IER_CTS_IRQ_FLAG (1 << 7) + +#define AMDM37x_CIR_IER_RHR_IRQ_FLAG (1 << 0) +#define AMDM37x_CIR_IER_THR_IRQ_FLAG (1 << 1) +#define AMDM37x_CIR_IER_RX_STOP_IRQ_FLAG (1 << 2) +#define AMDM37x_CIR_IER_RX_OVERRUN_IRQ_FLAG (1 << 3) +#define AMDM37x_CIR_IER_TX_STS_IRQ_FLAG (1 << 5) + +#define AMDM37x_IRDA_IER_RHR_IRQ_FLAG (1 << 0) +#define AMDM37x_IRDA_IER_THR_IRQ_FLAG (1 << 1) +#define AMDM37x_IRDA_IER_LAST_RX_BYTE_IRQ_FLAG (1 << 2) +#define AMDM37x_IRDA_IER_RX_OVERRUN_IRQ_FLAG (1 << 3) +#define AMDM37x_IRDA_IER_STS_FIFO_TRIG_IRQ_FLAG (1 << 4) +#define AMDM37x_IRDA_IER_TX_STS_IRQ_FLAG (1 << 5) +#define AMDM37x_IRDA_IER_LINE_STS_IRQ_FLAG (1 << 6) +#define AMDM37x_IRDA_IER_EOF_IRQ_FLAG (1 << 7) + }; + + union { + /** Interrupt identification register */ + const ioport32_t iir; +#define AMDM37x_UART_IIR_IRQ_PENDING_FLAG (1 << 0) +#define AMDM37x_UART_IIR_TYPE_MASK (0x1f) +#define AMDM37x_UART_IIR_TYPE_SHIFT (1) +#define AMDM37x_UART_IIR_FCR_MASK (0x3) +#define AMDM37x_UART_IIR_FCR_SHIFT (6) + +#define AMDM37x_CIR_IIR_RHR_IRQ_FLAG (1 << 0) +#define AMDM37x_CIR_IIR_THR_IRQ_FLAG (1 << 1) +#define AMDM37x_CIR_IIR_RX_STOP_IRQ_FLAG (1 << 2) +#define AMDM37x_CIR_IIR_RX_OE_IRQ_FLAG (1 << 3) +#define AMDM37x_CIR_IIR_TX_STS_IRQ_FLAG (1 << 5) + +#define AMDM37x_IRDA_IIR_RHR_IRQ_FLAG (1 << 0) +#define AMDM37x_IRDA_IIR_THR_IRQ_FLAG (1 << 1) +#define AMDM37x_IRDA_IIR_RX_FIFO_LB_IRQ_FLAG (1 << 2) +#define AMDM37x_IRDA_IIR_RX_OE_IRQ_FLAG (1 << 3) +#define AMDM37x_IRDA_IIR_STS_FIFO_IRQ_FLAG (1 << 4) +#define AMDM37x_IRDA_IIR_TX_STS_IRQ_FLAG (1 << 5) +#define AMDM37x_IRDA_IIR_LINE_STS_IRQ_FLAG (1 << 6) +#define AMDM37x_IRDA_IIR_EOF_IRQ_FLAG (1 << 7) + + /** FIFO control register */ + ioport32_t fcr; +#define AMDM37x_UART_FCR_FIFO_EN_FLAG (1 << 0) +#define AMDM37x_UART_FCR_RX_FIFO_CLR_FLAG (1 << 1) +#define AMDM37x_UART_FCR_TX_FIFO_CLR_FLAG (1 << 3) +#define AMDM37x_UART_FCR_DMA_MODE_FLAG (1 << 4) + +#define AMDM37x_UART_FCR_TX_FIFO_TRIG_MASK (0x3) +#define AMDM37x_UART_FCR_TX_FIFO_TRIG_SHIFT (4) + +#define AMDM37x_UART_FCR_RX_FIFO_TRIG_MASK (0x3) +#define AMDM37x_UART_FCR_RX_FIFO_TRIG_SHIFT (6) + + /** Enhanced feature register */ + ioport32_t efr; +#define AMDM37x_UART_EFR_SW_FLOW_CTRL_RX_MASK (0x3) +#define AMDM37x_UART_EFR_SW_FLOW_CTRL_RX_SHIFT (0) +#define AMDM37x_UART_EFR_SW_FLOW_CTRL_TX_MASK (0x3) +#define AMDM37x_UART_EFR_SW_FLOW_CTRL_TX_SHIFT (2) + +#define AMDM37x_UART_EFR_SW_FLOW_CTRL_NONE (0x0) +#define AMDM37x_UART_EFR_SW_FLOW_CTRL_X2 (0x1) +#define AMDM37x_UART_EFR_SW_FLOW_CTRL_X1 (0x2) +#define AMDM37x_UART_EFR_SW_FLOW_CTRL_XBOTH (0x3) + +#define AMDM37x_UART_EFR_ENH_FLAG (1 << 4) +#define AMDM37x_UART_EFR_SPEC_CHAR_FLAG (1 << 5) +#define AMDM37x_UART_EFR_AUTO_RTS_EN_FLAG (1 << 6) +#define AMDM37x_UART_EFR_AUTO_CTS_EN_FLAG (1 << 7) + }; + + /** Line control register */ + ioport32_t lcr; +#define AMDM37x_UART_LCR_CHAR_LENGTH_MASK (0x3) +#define AMDM37x_UART_LCR_CHAR_LENGTH_SHIFT (0) +#define AMDM37x_UART_LCR_CHAR_LENGTH_5BITS (0x0) +#define AMDM37x_UART_LCR_CHAR_LENGTH_6BITS (0x1) +#define AMDM37x_UART_LCR_CHAR_LENGTH_7BITS (0x2) +#define AMDM37x_UART_LCR_CHAR_LENGTH_8BITS (0x3) +#define AMDM37x_UART_LCR_NB_STOP_FLAG (1 << 2) +#define AMDM37x_UART_LCR_PARITY_EN_FLAG (1 << 3) +#define AMDM37x_UART_LCR_PARITY_TYPE1_FLAG (1 << 4) +#define AMDM37x_UART_LCR_PARITY_TYPE2_FLAG (1 << 5) +#define AMDM37x_UART_LCR_BREAK_EN_FLAG (1 << 6) +#define AMDM37x_UART_LCR_DIV_EN_FLAG (1 << 7) + + + union { + /** Modem control register */ + ioport32_t mcr; +#define AMDM37x_UART_MCR_DTR_FLAG (1 << 0) +#define AMDM37x_UART_MCR_RTS_FLAG (1 << 1) +#define AMDM37x_UART_MCR_RI_STS_CH_FLAG (1 << 2) +#define AMDM37x_UART_MCR_CD_STS_CH_FLAG (1 << 3) +#define AMDM37x_UART_MCR_LOOPBACK_EN_FLAG (1 << 4) +#define AMDM37x_UART_MCR_XON_EN_FLAG (1 << 5) +#define AMDM37x_UART_MCR_TCR_TLR_FLAG (1 << 6) + + /** UART: XON1 char, IRDA: ADDR1 address */ + ioport32_t xon1_addr1; +#define AMDM37x_UART_XON1_ADDR1_MASK (0xff) + }; + + union { + /** Line status register */ + const ioport32_t lsr; +#define AMDM37x_UART_LSR_RX_FIFO_E_FLAG (1 << 0) +#define AMDM37x_UART_LSR_RX_OE_FLAG (1 << 1) +#define AMDM37x_UART_LSR_RX_PE_FLAG (1 << 2) +#define AMDM37x_UART_LSR_RX_FE_FLAG (1 << 3) +#define AMDM37x_UART_LSR_RX_BI_FLAG (1 << 4) +#define AMDM37x_UART_LSR_TX_FIFO_E_FLAG (1 << 5) +#define AMDM37x_UART_LSR_TX_SR_E_FLAG (1 << 6) +#define AMDM37x_UART_LSR_RX_FIFO_STS_FLAG (1 << 7) + +#define AMDM37x_CIR_LSR_RX_FIFO_E_FLAG (1 << 0) +#define AMDM37x_CIR_LSR_RX_STOP_FLAG (1 << 5) +#define AMDM37x_CIR_LSR_THR_EMPTY_FLAG (1 << 7) + +#define AMDM37x_IRDA_LSR_RX_FIFO_E_FLAG (1 << 0) +#define AMDM37x_IRDA_LSR_STS_FIFO_E_FLAG (1 << 1) +#define AMDM37x_IRDA_LSR_CRC_FLAG (1 << 2) +#define AMDM37x_IRDA_LSR_ABORT_FLAG (1 << 3) +#define AMDM37x_IRDA_LSR_FTL_FLAG (1 << 4) +#define AMDM37x_IRDA_LSR_RX_LAST_FLAG (1 << 5) +#define AMDM37x_IRDA_LSR_STS_FIFO_FULL_FLAG (1 << 6) +#define AMDM37x_IRDA_LSR_THR_EMPTY_FLAG (1 << 7) + + /** UART: XON2 char, IRDA: ADDR2 address */ + ioport32_t xon2_addr2; + }; + + union { + /** Modem status register */ + const ioport32_t msr; +#define AMDM37x_UART_MSR_CTS_STS_FLAG (1 << 0) +#define AMDM37x_UART_MSR_DSR_STS_FLAG (1 << 1) +#define AMDM37x_UART_MSR_RI_STS_FLAG (1 << 2) +#define AMDM37x_UART_MSR_DCD_STS_FLAG (1 << 3) +#define AMDM37x_UART_MSR_NCTS_STS_FLAG (1 << 4) +#define AMDM37x_UART_MSR_NDSR_STS_FLAG (1 << 5) +#define AMDM37x_UART_MSR_NRI_STS_FLAG (1 << 6) +#define AMDM37x_UART_MSR_NCD_STS_FLAG (1 << 7) + + /** Transmission control register */ + ioport32_t tcr; +#define AMDM37x_UART_TCR_FIFO_TRIG_MASK (0xf) +#define AMDM37x_UART_TCR_FIFO_TRIG_HALT_SHIFT (0) +#define AMDM37x_UART_TCR_FIFO_TRIG_START_SHIFT (4) + + /** UART: XOFF1 char */ + ioport32_t xoff1; +#define AMDM37x_UART_XOFF1_MASK (0xff) + }; + + union { + /* Scratchpad register, does nothing */ + ioport32_t spr; +#define AMDM37x_UART_SPR_MASK (0xff) + + /* Trigger level register */ + ioport32_t tlr; +#define AMDM37x_UART_TLR_LEVEL_MASK (0xf) +#define AMDM37x_UART_TLR_TX_FIFO_TRIG_SHIFT (0) +#define AMDM37x_UART_TLR_RX_FIFO_TRIG_SHIFT (4) + + /** UART: XOFF2 char */ + ioport32_t xoff2; +#define AMDM37x_UART_XOFF2_MASK (0xff) + }; + + /** Mode definition register. */ + ioport32_t mdr1; +#define AMDM37x_UART_MDR_MS_MASK (0x7) +#define AMDM37x_UART_MDR_MS_SHIFT (0) +#define AMDM37x_UART_MDR_MS_UART16 (0x0) +#define AMDM37x_UART_MDR_MS_SIR (0x1) +#define AMDM37x_UART_MDR_MS_UART16_AUTO (0x2) +#define AMDM37x_UART_MDR_MS_UART13 (0x3) +#define AMDM37x_UART_MDR_MS_MIR (0x4) +#define AMDM37x_UART_MDR_MS_FIR (0x5) +#define AMDM37x_UART_MDR_MS_CIR (0x6) +#define AMDM37x_UART_MDR_MS_DISABLE (0x7) + +#define AMDM37x_UART_MDR_IR_SLEEP_FLAG (1 << 3) +#define AMDM37x_UART_MDR_SET_TXIR_FLAG (1 << 4) +#define AMDM37x_UART_MDR_SCT_FLAG (1 << 5) +#define AMDM37x_UART_MDR_SIP_FLAG (1 << 6) +#define AMDM37x_UART_MDR_FRAME_END_MODE_FLAG (1 << 7) + + /** Mode definition register */ + ioport32_t mdr2; +#define AMDM37x_UART_MDR_IRTX_UNDERRUN_FLAG (1 << 0) +#define AMDM37x_UART_MDR_STS_FIFO_TRIG_MASK (0x3) +#define AMDM37x_UART_MDR_STS_FIFO_TRIG_SHIFT (1) +#define AMDM37x_UART_MDR_PULSE_SHAPING_FLAG (1 << 3) +#define AMDM37x_UART_MDR_CIR_PULSE_MODE_MASK (0x3) +#define AMDM37x_UART_MDR_CIR_PULSE_MODE_SHIFT (4) +#define AMDM37x_UART_MDR_IRRXINVERT_FLAG (1 << 6) + + + /* UART3 specific */ + union { + /** Status FIFO line status register (IrDA only) */ + const ioport32_t sflsr; +#define AMDM37x_IRDA_SFLSR_CRC_ERROR_FLAG (1 << 1) +#define AMDM37x_IRDA_SFLSR_ABORT_FLAG (1 << 2) +#define AMDM37x_IRDA_SFLSR_FTL_FLAG (1 << 3) +#define AMDM37x_IRDA_SFLSR_OE_FLAG (1 << 4) + + /** Transmit frame length low (IrDA only) */ + ioport32_t txfll; +#define AMDM37x_UART_TXFLL_MASK (0xff) + }; + + /* UART3 specific */ + union { + /** Dummy register to restart TX or RX (IrDA only) */ + const ioport32_t resume; + /** Transmit frame length high (IrDA only) */ + ioport32_t txflh; +#define AMDM37x_UART_TXFLH_MASK (0xff) + }; + + /* UART3 specific */ + union { + /** Status FIFO register low (IrDA only) */ + const ioport32_t sfregl; +#define AMDM37x_UART_SFREGL_MASK (0xff) + /** Received frame length low (IrDA only) */ + ioport32_t rxfll; +#define AMDM37x_UART_RXFLL_MASK (0xff) + }; + + /* UART3 specific */ + union { + /** Status FIFO register high (IrDA only) */ + const ioport32_t sfregh; +#define AMDM37x_UART_SFREGH_MASK (0xf) + /** Received frame length high (IrDA only) */ + ioport32_t rxflh; +#define AMDM37x_UART_RXFLH_MASK (0xf) + }; + + union { + /** UART autobauding status register */ + const ioport32_t uasr; +#define AMDM37x_UART_UASR_SPEED_MASK (0x1f) +#define AMDM37x_UART_UASR_SPEED_SHIFT (0) +#define AMDM37x_UART_UASR_8BIT_CHAR_FLAG (1 << 5) +#define AMDM37x_UART_UASR_PARITY_MASK (0x3) +#define AMDM37x_UART_UASR_PARITY_SHIFT (6) + + /** BOF control register (IrDA only) */ + ioport32_t blr; /* UART3 specific */ +#define AMDM37x_IRDA_BLR_XBOF_TYPE_FLAG (1 << 6) +#define AMDM37x_IRDA_BLR_STS_FIFO_RESET (1 << 7) + }; + + /** Auxiliary control register (IrDA only) */ + ioport32_t acreg; /* UART3 specific */ +#define AMDM37x_IRDA_ACREG_EOT_EN_FLAG (1 << 0) +#define AMDM37x_IRDA_ACREG_ABORT_EN_FLAG (1 << 1) +#define AMDM37x_IRDA_ACREG_SCTX_EN_FLAG (1 << 2) +#define AMDM37x_IRDA_ACREG_SEND_SIP_FLAG (1 << 3) +#define AMDM37x_IRDA_ACREG_DIS_TX_UNDERRUN_FLAG (1 << 4) +#define AMDM37x_IRDA_ACREG_DIS_IR_RX_FLAG (1 << 5) +#define AMDM37x_IRDA_ACREG_SD_MOD_FLAG (1 << 6) +#define AMDM37x_IRDA_ACREG_PULSE_TYPE_FLAG (1 << 7) + + /** Supplementary control register */ + ioport32_t scr; +#define AMDM37x_UART_SCR_DMA_MODE_CTL_FLAG (1 << 0) +#define AMDM37x_UART_SCR_DMA_MODE_MASK (0x3) +#define AMDM37x_UART_SCR_DMA_MODE_SHIFT (1) +#define AMDM37x_UART_SCR_TX_EMPTY_CTL_IRQ_FLAG (1 << 3) +#define AMDM37x_UART_SCR_RX_CTS_WU_EN_FLAG (1 << 4) +#define AMDM37x_UART_SCR_TX_TRIG_GRANU1_FLAG (1 << 6) +#define AMDM37x_UART_SCR_RX_TRIG_GRANU1_FLAG (1 << 7) + + /** Supplementary status register */ + const ioport32_t ssr; +#define AMDM37x_UART_SSR_TX_FIFO_FULL_FLAG (1 << 0) +#define AMDM37x_UART_SSR_RX_CTS_WU_STS_FLAG (1 << 1) +#define AMDM37x_UART_SSR_DMA_COUNTER_RESET_FLAG (1 << 2) + + /** BOF Length register (IrDA only)*/ + ioport32_t eblr; /* UART3 specific */ +#define AMDM37x_IRDA_EBLR_DISABLED (0x00) +#define AMDM37x_IRDA_EBLR_RX_STOP_BITS(bits) (bits & 0xff) + + uint32_t padd0_; + + /** Module version register */ + const ioport32_t mvr; +#define AMDM37x_UART_MVR_MINOR_MASK (0xf) +#define AMDM37x_UART_MVR_MINOR_SHIFT (0) +#define AMDM37x_UART_MVR_MAJOR_MASK (0xf) +#define AMDM37x_UART_MVR_MAJOR_SHIFT (4) + + /** System configuration register */ + ioport32_t sysc; +#define AMDM37x_UART_SYSC_AUTOIDLE_FLAG (1 << 0) +#define AMDM37x_UART_SYSC_SOFTRESET_FLAG (1 << 1) +#define AMDM37x_UART_SYSC_ENWAKEUP_FLAG (1 << 2) +#define AMDM37x_UART_SYSC_IDLE_MODE_MASK (0x3) +#define AMDM37x_UART_SYSC_IDLE_MODE_SHIFT (3) +#define AMDM37x_UART_SYSC_IDLE_MODE_FORCE (0x0) +#define AMDM37x_UART_SYSC_IDLE_MODE_NO (0x1) +#define AMDM37x_UART_SYSC_IDLE_MODE_SMART (0x2) + + /** System status register */ + const ioport32_t syss; +#define AMDM37x_UART_SYSS_RESETDONE_FLAG (1 << 0) + + /** Wake-up enable register */ + ioport32_t wer; +#define AMDM37x_UART_WER_CTS_ACTIVITY_FLAG (1 << 0) +#define AMDM37x_UART_WER_RI_ACTIVITY_FLAG (1 << 2) +#define AMDM37x_UART_WER_RX_ACTIVITY_FLAG (1 << 4) +#define AMDM37x_UART_WER_RHR_IRQ_FLAG (1 << 5) +#define AMDM37x_UART_WER_RLS_IRQ_FLAG (1 << 6) +#define AMDM37x_UART_WER_TX_WAKEUP_EN_FLAG (1 << 7) + + /** Carrier frequency prescaler */ + ioport32_t cfps; /* UART3 specific */ +#define AMDM37x_UART_CFPS_MASK (0xff) + + /** Number of bytes in RX fifo */ + const ioport32_t rx_fifo_lvl; +#define AMDM37x_UART_RX_FIFO_LVL_MASK (0xff) + + /** Number of bytes in TX fifo */ + const ioport32_t tx_fifo_lvl; +#define AMDM37x_UART_TX_FIFO_LVL_MASK (0xff) + + /** RX/TX empty interrupts */ + ioport32_t ier2; +#define AMDM37x_UART_IER2_RX_FIFO_EMPTY_IRQ_EN_FLAG (1 << 0) +#define AMDM37x_UART_IER2_TX_FIFO_EMPTY_IRQ_EN_FLAG (1 << 1) + + /** RX/TX empty status */ + ioport32_t isr2; +#define AMDM37x_UART_ISR2_RX_FIFO_EMPTY_FLAG (1 << 0) +#define AMDM37x_UART_ISR2_TX_FIFO_EMPTY_FLAG (1 << 1) + + uint32_t padd2_[3]; + + /** Mode definition register 3 */ + ioport32_t mdr3; +#define AMDM37x_UART_MDR3_DIS_CIR_RX_DEMOD_FLAG (1 << 0) +} amdm37x_uart_regs_t; + +#endif + +/** + * @} + */ Index: kernel/genarch/include/genarch/drivers/arm926_uart/arm926_uart.h =================================================================== --- kernel/genarch/include/genarch/drivers/arm926_uart/arm926_uart.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/arm926_uart/arm926_uart.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,169 @@ +/* + * Copyright (c) 2012 Jan Vesely + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief ARM926 on-chip UART (PrimeCell UART, PL011) driver. + */ + +#ifndef KERN_ARM926_UART_H_ +#define KERN_ARM926_UART_H_ + +#include +#include +#include + + +/** ARM926 User Guide ch. 4.8.5 (p. 106 in the pdf) */ +#define ARM926_UART0_BASE_ADDRESS 0x16000000 +#define ARM926_UART1_BASE_ADDRESS 0x16000000 + +/** ARM926 User Guide ch. A.1 (p. 124 in the pdf) */ +#define ARM926_UART0_IRQ 1 +#define ARM926_UART1_IRQ 2 + +/** PrimeCell UART TRM ch. 3.3 (p. 49 in the pdf) */ +typedef struct { + /** UART data register */ + ioport32_t data; +#define ARM926_UART_DATA_DATA_MASK 0xff +#define ARM926_UART_DATA_FE_FLAG (1 << 7) +#define ARM926_UART_DATA_PE_FLAG (1 << 9) +#define ARM926_UART_DATA_BE_FLAG (1 << 10) +#define ARM926_UART_DATA_OE_FLAG (1 << 11) + + union { + /* Same values that are in upper bits of data register*/ + const ioport32_t status; +#define ARM926_UART_STATUS_FE_FLAG (1 << 0) +#define ARM926_UART_STATUS_PE_FLAG (1 << 1) +#define ARM926_UART_STATUS_BE_FLAG (1 << 2) +#define ARM926_UART_STATUS_OE_FLAG (1 << 3) + /* Writing anything clears all errors */ + ioport32_t error_clear; + }; + uint32_t padd0_[4]; + + const ioport32_t flag; +#define ARM926_UART_FLAG_CTS_FLAG (1 << 0) +#define ARM926_UART_FLAG_DSR_FLAG (1 << 1) +#define ARM926_UART_FLAG_DCD_FLAG (1 << 2) +#define ARM926_UART_FLAG_BUSY_FLAG (1 << 3) +#define ARM926_UART_FLAG_RXFE_FLAG (1 << 4) +#define ARM926_UART_FLAG_TXFF_FLAG (1 << 5) +#define ARM926_UART_FLAG_RXFF_FLAG (1 << 6) +#define ARM926_UART_FLAG_TXFE_FLAG (1 << 7) +#define ARM926_UART_FLAG_RI_FLAG (1 << 8) + uint32_t padd1_; + + ioport32_t irda_low_power; +#define ARM926_UART_IRDA_LOW_POWER_MASK 0xff + + ioport32_t int_baud_divisor; +#define ARM926_UART_INT_BAUD_DIVISOR_MASK 0xffff + + ioport32_t fract_baud_divisor; +#define ARM926_UART_FRACT_BAUD_DIVISOR_MASK 0x1f + + ioport32_t line_control_high; +#define ARM926_UART_CONTROLHI_BRK_FLAG (1 << 0) +#define ARM926_UART_CONTROLHI_PEN_FLAG (1 << 1) +#define ARM926_UART_CONTROLHI_EPS_FLAG (1 << 2) +#define ARM926_UART_CONTROLHI_STP2_FLAG (1 << 3) +#define ARM926_UART_CONTROLHI_FEN_FLAG (1 << 4) +#define ARM926_UART_CONTROLHI_WLEN_MASK 0x3 +#define ARM926_UART_CONTROLHI_WLEN_SHIFT 5 +#define ARM926_UART_CONTROLHI_SPS_FLAG (1 << 5) + + ioport32_t control; +#define ARM926_UART_CONTROL_UARTEN_FLAG (1 << 0) +#define ARM926_UART_CONTROL_SIREN_FLAG (1 << 1) +#define ARM926_UART_CONTROL_SIRLP_FLAG (1 << 2) +#define ARM926_UART_CONTROL_LBE_FLAG (1 << 7) +#define ARM926_UART_CONTROL_TXE_FLAG (1 << 8) +#define ARM926_UART_CONTROL_RXE_FLAG (1 << 9) +#define ARM926_UART_CONTROL_DTR_FLAG (1 << 10) +#define ARM926_UART_CONTROL_RTS_FLAG (1 << 11) +#define ARM926_UART_CONTROL_OUT1_FLAG (1 << 12) +#define ARM926_UART_CONTROL_OUT2_FLAG (1 << 13) +#define ARM926_UART_CONTROL_RTSE_FLAG (1 << 14) +#define ARM926_UART_CONTROL_CTSE_FLAG (1 << 15) + + ioport32_t interrupt_fifo; +#define ARM926_UART_INTERRUPTFIFO_TX_MASK 0x7 +#define ARM926_UART_INTERRUPTFIFO_TX_SHIFT 0 +#define ARM926_UART_INTERRUPTFIFO_RX_MASK 0x7 +#define ARM926_UART_INTERRUPTFIFO_RX_SHIFT 3 + + /** Interrupt mask register */ + ioport32_t interrupt_mask; + /** Pending interrupts before applying the mask */ + const ioport32_t raw_interrupt_status; + /** Pending interrupts after applying the mask */ + const ioport32_t masked_interrupt_status; + /** Write 1s to clear pending interrupts */ + ioport32_t interrupt_clear; +#define ARM926_UART_INTERRUPT_RIM_FLAG (1 << 0) +#define ARM926_UART_INTERRUPT_CTSM_FLAG (1 << 1) +#define ARM926_UART_INTERRUPT_DCDM_FLAG (1 << 2) +#define ARM926_UART_INTERRUPT_DSRM_FLAG (1 << 3) +#define ARM926_UART_INTERRUPT_RX_FLAG (1 << 4) +#define ARM926_UART_INTERRUPT_TX_FLAG (1 << 5) +#define ARM926_UART_INTERRUPT_RT_FLAG (1 << 6) +#define ARM926_UART_INTERRUPT_FE_FLAG (1 << 7) +#define ARM926_UART_INTERRUPT_PE_FLAG (1 << 8) +#define ARM926_UART_INTERRUPT_BE_FLAG (1 << 9) +#define ARM926_UART_INTERRUPT_OE_FLAG (1 << 10) +#define ARM926_UART_INTERRUPT_ALL 0x3ff + + ioport32_t dma_control; +#define ARM926_UART_DMACONTROL_RXDMAEN_FLAG (1 << 0) +#define ARM926_UART_DMACONTROL_TXDMAEN_FLAG (1 << 1) +#define ARM926_UART_DMACONTROL_DMAONERR_FLAG (1 << 2) + + // TODO There is some reserved space here followed by + // peripheral identification registers. +} arm926_uart_regs_t; + +typedef struct { + arm926_uart_regs_t *regs; + indev_t *indev; + outdev_t outdev; + irq_t irq; +} arm926_uart_t; + +bool arm926_uart_init(arm926_uart_t *, inr_t, uintptr_t, size_t); +void arm926_uart_input_wire(arm926_uart_t *, indev_t *); + +#endif +/** + * @} + */ Index: kernel/genarch/include/genarch/drivers/dsrln/dsrlnin.h =================================================================== --- kernel/genarch/include/genarch/drivers/dsrln/dsrlnin.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/dsrln/dsrlnin.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2009 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Dummy serial line input. + */ + +#ifndef KERN_DSRLNIN_H_ +#define KERN_DSRLNIN_H_ + +#include +#include +#include + +typedef struct { + ioport8_t data; +} __attribute__ ((packed)) dsrlnin_t; + +typedef struct { + irq_t irq; + dsrlnin_t *dsrlnin; + indev_t *srlnin; +} dsrlnin_instance_t; + +extern dsrlnin_instance_t *dsrlnin_init(dsrlnin_t *, inr_t); +extern void dsrlnin_wire(dsrlnin_instance_t *, indev_t *); + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/drivers/dsrln/dsrlnout.h =================================================================== --- kernel/genarch/include/genarch/drivers/dsrln/dsrlnout.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/dsrln/dsrlnout.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2009 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Dummy serial line output. + */ + +#ifndef KERN_DSRLNOUT_H_ +#define KERN_DSRLNOUT_H_ + +#include +#include + +extern outdev_t *dsrlnout_init(ioport8_t *); + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/drivers/ega/ega.h =================================================================== --- kernel/genarch/include/genarch/drivers/ega/ega.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/ega/ega.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch_drivers + * @{ + */ +/** @file + */ + +#ifndef KERN_EGA_H_ +#define KERN_EGA_H_ + +#include +#include + +#define EGA_COLS 80 +#define EGA_ROWS 25 +#define EGA_SCREEN (EGA_COLS * EGA_ROWS) +#define EGA_VRAM_SIZE (2 * EGA_SCREEN) + +/* EGA device registers. */ +#define EGA_INDEX_REG 0 +#define EGA_DATA_REG 1 + +extern outdev_t *ega_init(ioport8_t *, uintptr_t); + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/drivers/i8042/i8042.h =================================================================== --- kernel/genarch/include/genarch/drivers/i8042/i8042.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/i8042/i8042.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** @file + */ + +#ifndef KERN_I8042_H_ +#define KERN_I8042_H_ + +#include +#include +#include + +typedef struct { + ioport8_t data; + uint8_t pad[3]; + ioport8_t status; +} __attribute__ ((packed)) i8042_t; + +typedef struct { + irq_t irq; + i8042_t *i8042; + indev_t *kbrdin; +} i8042_instance_t; + +extern i8042_instance_t *i8042_init(i8042_t *, inr_t); +extern void i8042_wire(i8042_instance_t *, indev_t *); +extern void i8042_cpu_reset(i8042_t *); + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/drivers/legacy/ia32/io.h =================================================================== --- kernel/genarch/include/genarch/drivers/legacy/ia32/io.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/legacy/ia32/io.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2009 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup ia32 + * @{ + */ +/** @file + * @brief This file contains definitions used by architectures with the + * ia32 legacy I/O space (i.e. ia32, amd64 and ia64). + */ + +#ifndef KERN_LEGACY_IA32_IO_H +#define KERN_LEGACY_IA32_IO_H + +#include + +#define I8042_BASE ((ioport8_t *) 0x60) +#define EGA_BASE ((ioport8_t *) 0x3d4) +#define NS16550_BASE ((ioport8_t *) 0x3f8) + +#define EGA_VIDEORAM 0xb8000 + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/drivers/ns16550/ns16550.h =================================================================== --- kernel/genarch/include/genarch/drivers/ns16550/ns16550.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/ns16550/ns16550.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2001-2004 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Headers for NS 16550 serial controller. + */ + +#ifndef KERN_NS16550_H_ +#define KERN_NS16550_H_ + +#include +#include +#include + +#define IER_ERBFI 0x01 /** Enable Receive Buffer Full Interrupt. */ + +#define LCR_DLAB 0x80 /** Divisor Latch Access bit. */ + +#define MCR_OUT2 0x08 /** OUT2. */ + +/** NS16550 registers. */ +typedef struct { + ioport8_t rbr; /**< Receiver Buffer Register. */ + ioport8_t ier; /**< Interrupt Enable Register. */ + union { + ioport8_t iir; /**< Interrupt Ident Register (read). */ + ioport8_t fcr; /**< FIFO control register (write). */ + } __attribute__ ((packed)); + ioport8_t lcr; /**< Line Control register. */ + ioport8_t mcr; /**< Modem Control Register. */ + ioport8_t lsr; /**< Line Status Register. */ +} __attribute__ ((packed)) ns16550_t; + +/** Structure representing the ns16550 device. */ +typedef struct { + irq_t irq; + ns16550_t *ns16550; + indev_t *kbrdin; +} ns16550_instance_t; + +extern ns16550_instance_t *ns16550_init(ns16550_t *, inr_t, cir_t, void *); +extern void ns16550_wire(ns16550_instance_t *, indev_t *); + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/drivers/pl050/pl050.h =================================================================== --- kernel/genarch/include/genarch/drivers/pl050/pl050.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/pl050/pl050.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,104 @@ +/* + * Copyright (c) 2009 Vineeth Pillai + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** @file + * @brief Describes the pl050 keyboard/mouse controller + */ + +/** + * This file implements pl050 specific functions for keyboard and mouse + */ + +#ifndef KERN_genarch_PL050_H +#define KERN_genarch_PL050_H + +#include +#include +#include + + +/* + * pl050 register offsets from the base address + */ +#define PL050_CR 0x00 +#define PL050_STAT 0x04 +#define PL050_DATA 0x08 +#define PL050_CLOCKDIV 0x0C +#define PL050_INTRSTAT 0x10 + +/* + * Control Register Bits + */ +#define PL050_CR_TYPE (1 << 5) /* Type 0: PS2/AT mode, 1: No Line control bit mode */ +#define PL050_CR_RXINTR (1 << 4) /* Recieve Interrupt Enable */ +#define PL050_CR_TXINTR (1 << 3) /* Transmit Interrupt Enable */ +#define PL050_CR_INTR (1 << 2) /* Interrupt Enable */ +#define PL050_CR_FKMID (1 << 1) /* Force KMI Data Low */ +#define PL050_CR_FKMIC 1 /* Force KMI Clock Low */ + +/* + * Status register bits + */ +#define PL050_STAT_TXEMPTY (1 << 6) /* 1: Transmit register empty */ +#define PL050_STAT_TXBUSY (1 << 5) /* 1: Busy, sending data */ +#define PL050_STAT_RXFULL (1 << 4) /* 1: register Full */ +#define PL050_STAT_RXBUSY (1 << 3) /* 1: Busy, recieving Data */ +#define PL050_STAT_RXPARITY (1 << 2) /* odd parity of the last bit received */ +#define PL050_STAT_KMIC (1 << 1) /* status of KMICLKIN */ +#define PL050_STAT_KMID 1 /* status of KMIDATAIN */ + +/* + * Interrupt status register bits. + */ +#define PL050_TX_INTRSTAT (1 << 1) /* Transmit intr asserted */ +#define PL050_RX_INTRSTAT 1 /* Recieve intr asserted */ + +typedef struct { + ioport8_t *base; + ioport8_t *data; + ioport8_t *status; + ioport8_t *ctrl; +} pl050_t; + +typedef struct { + irq_t irq; + pl050_t *pl050; + indev_t *kbrdin; +} pl050_instance_t; + +extern pl050_instance_t *pl050_init(pl050_t *, inr_t); +extern void pl050_wire(pl050_instance_t *, indev_t *); + + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/drivers/s3c24xx_irqc/s3c24xx_irqc.h =================================================================== --- kernel/genarch/include/genarch/drivers/s3c24xx_irqc/s3c24xx_irqc.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/s3c24xx_irqc/s3c24xx_irqc.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,137 @@ +/* + * Copyright (c) 2010 Jiri Svoboda + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Samsung S3C24xx on-chip interrupt controller driver. + */ + +#ifndef KERN_S3C24XX_IRQC_H_ +#define KERN_S3C24XX_IRQC_H_ + +#include + +/** Physical address where S3C24XX Interrupt controller is mapped */ +#define S3C24XX_IRQC_ADDRESS 0x4a000000 + +/** S3C24xx on-chip interrupt controller registers */ +typedef struct { + ioport32_t srcpnd; /**< Source pending */ + ioport32_t intmod; /**< Interrupt mode */ + ioport32_t intmsk; /**< Interrupt mask */ + ioport32_t priority; /**< Priority */ + ioport32_t intpnd; /**< Interrupt pending */ + ioport32_t intoffset; /**< Interrupt offset */ + ioport32_t subsrcpnd; /**< Sub source pending */ + ioport32_t intsubmsk; /** Interrupt sub mask */ +} s3c24xx_irqc_regs_t; + +/** S3C24xx Interrupt source numbers. + * + * These correspond to bit numbers in srcpnd, intmod, intmsk and intpnd + * registers as well as to the values read from the intoffset register. + */ +enum s3c24xx_int_source { + S3C24XX_INT_ADC = 31, + S3C24XX_INT_RTC = 30, + S3C24XX_INT_SPI1 = 29, + S3C24XX_INT_UART0 = 28, + S3C24XX_INT_IIC = 27, + S3C24XX_INT_USBH = 26, + S3C24XX_INT_USBD = 25, + S3C24XX_INT_NFCON = 24, + S3C24XX_INT_UART1 = 23, + S3C24XX_INT_SPI0 = 22, + S3C24XX_INT_SDI = 21, + S3C24XX_INT_DMA3 = 20, + S3C24XX_INT_DMA2 = 19, + S3C24XX_INT_DMA1 = 18, + S3C24XX_INT_DMA0 = 17, + S3C24XX_INT_LCD = 16, + S3C24XX_INT_UART2 = 15, + S3C24XX_INT_TIMER4 = 14, + S3C24XX_INT_TIMER3 = 13, + S3C24XX_INT_TIMER2 = 12, + S3C24XX_INT_TIMER1 = 11, + S3C24XX_INT_TIMER0 = 10, + S3C24XX_INT_WDT_AC97 = 9, + S3C24XX_INT_TICK = 8, + S3C24XX_nBATT_FLT = 7, + S3C24XX_INT_CAM = 6, + S3C24XX_EINT8_23 = 5, + S3C24XX_EINT4_7 = 4, + S3C24XX_EINT3 = 3, + S3C24XX_EINT2 = 2, + S3C24XX_EINT1 = 1, + S3C24XX_EINT0 = 0 +}; + +/** S3C24xx Interrupt sub-source numbers. + * + * These correspond to bit numbers in the intsubmsk register. + */ +enum s3c24xx_int_subsource { + S3C24XX_SUBINT_AC97 = 14, + S3C24XX_SUBINT_WDT = 13, + S3C24XX_SUBINT_CAM_P = 12, + S3C24XX_SUBINT_CAM_C = 11, + S3C24XX_SUBINT_ADC_S = 10, + S3C24XX_SUBINT_TC = 9, + S3C24XX_SUBINT_ERR2 = 8, + S3C24XX_SUBINT_TXD2 = 7, + S3C24XX_SUBINT_RXD2 = 6, + S3C24XX_SUBINT_ERR1 = 5, + S3C24XX_SUBINT_TXD1 = 4, + S3C24XX_SUBINT_RXD1 = 3, + S3C24XX_SUBINT_ERR0 = 2, + S3C24XX_SUBINT_TXD0 = 1, + S3C24XX_SUBINT_RXD0 = 0 +}; + +#define S3C24XX_INT_BIT(source) (1 << (source)) +#define S3C24XX_SUBINT_BIT(subsource) (1 << (subsource)) + +typedef struct { + s3c24xx_irqc_regs_t *regs; +} s3c24xx_irqc_t; + +extern void s3c24xx_irqc_init(s3c24xx_irqc_t *, s3c24xx_irqc_regs_t *); +extern unsigned s3c24xx_irqc_inum_get(s3c24xx_irqc_t *); +extern void s3c24xx_irqc_clear(s3c24xx_irqc_t *, unsigned); +extern void s3c24xx_irqc_src_enable(s3c24xx_irqc_t *, unsigned); +extern void s3c24xx_irqc_src_disable(s3c24xx_irqc_t *, unsigned); +extern void s3c24xx_irqc_subsrc_enable(s3c24xx_irqc_t *, unsigned); +extern void s3c24xx_irqc_subsrc_disable(s3c24xx_irqc_t *, unsigned); + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/drivers/s3c24xx_timer/s3c24xx_timer.h =================================================================== --- kernel/genarch/include/genarch/drivers/s3c24xx_timer/s3c24xx_timer.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/s3c24xx_timer/s3c24xx_timer.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,90 @@ +/* + * Copyright (c) 2010 Jiri Svoboda + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Samsung S3C24xx on-chip PWM timer driver. + */ + +#ifndef KERN_S3C24XX_TIMER_H_ +#define KERN_S3C24XX_TIMER_H_ + +#include + +/** Physical address where S3C24XX on-chip PWM timer is mapped */ +#define S3C24XX_TIMER_ADDRESS 0x51000000 + +/** S3C24xx on-chip PWM timer registers */ +typedef struct { + ioport32_t tcfg0; /**< Timer configuration register 0 */ + ioport32_t tcfg1; /**< Timer configuration register 1 */ + ioport32_t tcon; /**< Timer control register */ + + struct { + ioport32_t cntb; /**< Count buffer register */ + ioport32_t cmpb; /**< Compare buffer register */ + ioport32_t cnto; /**< Count observation register */ + } timer[5]; +} s3c24xx_timer_t; + +/** Bits in the S3C24xx PWM timer TCON register. */ +enum s3c24xx_tcon_bits { + TCON_T0_START = (1 << 0), /**< Timer 0 start */ + TCON_T0_MUPDATE = (1 << 1), /**< Timer 0 manual update */ + TCON_T0_INVERT = (1 << 2), /**< Timer 0 inverter on */ + TCON_T0_AUTO_RLD = (1 << 3), /**< Timer 0 auto reload */ + + TCON_DEAD_ZONE = (1 << 4), /**< Dead zone enable */ + + TCON_T1_START = (1 << 8), /**< Timer 1 start */ + TCON_T1_MUPDATE = (1 << 9), /**< Timer 1 manual update */ + TCON_T1_INVERT = (1 << 10), /**< Timer 1 inverter on */ + TCON_T1_AUTO_RLD = (1 << 11), /**< Timer 1 auto reload */ + + TCON_T2_START = (1 << 12), /**< Timer 2 start */ + TCON_T2_MUPDATE = (1 << 13), /**< Timer 2 manual update */ + TCON_T2_INVERT = (1 << 14), /**< Timer 2 inverter on */ + TCON_T2_AUTO_RLD = (1 << 15), /**< Timer 2 auto reload */ + + TCON_T3_START = (1 << 16), /**< Timer 3 start */ + TCON_T3_MUPDATE = (1 << 17), /**< Timer 3 manual update */ + TCON_T3_INVERT = (1 << 18), /**< Timer 3 inverter on */ + TCON_T3_AUTO_RLD = (1 << 19), /**< Timer 3 auto reload */ + + TCON_T4_START = (1 << 20), /**< Timer 4 start */ + TCON_T4_MUPDATE = (1 << 21), /**< Timer 4 manual update */ + TCON_T4_AUTO_RLD = (1 << 22) /**< Timer 4 auto reload */ +}; + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/drivers/s3c24xx_uart/s3c24xx_uart.h =================================================================== --- kernel/genarch/include/genarch/drivers/s3c24xx_uart/s3c24xx_uart.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/s3c24xx_uart/s3c24xx_uart.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,96 @@ +/* + * Copyright (c) 2010 Jiri Svoboda + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Samsung S3C24xx on-chip UART driver. + */ + +#ifndef KERN_S3C24XX_UART_H_ +#define KERN_S3C24XX_UART_H_ + +#include +#include +#include +#include + +/** S3C24xx UART I/O */ +typedef struct { + uint32_t ulcon; + uint32_t ucon; + uint32_t ufcon; + uint32_t umcon; + + uint32_t utrstat; + uint32_t uerstat; + uint32_t ufstat; + uint32_t umstat; + + uint32_t utxh; + uint32_t urxh; + + uint32_t ubrdiv; +} s3c24xx_uart_io_t; + +/* Bits in UTRSTAT register */ +#define S3C24XX_UTRSTAT_TX_EMPTY 0x4 +#define S3C24XX_UTRSTAT_RDATA 0x1 + +/* Bits in UFSTAT register */ +#define S3C24XX_UFSTAT_TX_FULL 0x4000 +#define S3C24XX_UFSTAT_RX_FULL 0x0040 +#define S3C24XX_UFSTAT_RX_COUNT 0x002f + +/* Bits in UCON register */ +#define UCON_RX_INT_LEVEL 0x100 + +/* Bits in UFCON register */ +#define UFCON_TX_FIFO_TLEVEL_EMPTY 0x00 +#define UFCON_RX_FIFO_TLEVEL_1B 0x00 +#define UFCON_FIFO_ENABLE 0x01 + + +/** S3C24xx UART instance */ +typedef struct { + s3c24xx_uart_io_t *io; + indev_t *indev; + irq_t irq; + parea_t parea; +} s3c24xx_uart_t; + +extern outdev_t *s3c24xx_uart_init(uintptr_t, inr_t inr); +extern void s3c24xx_uart_input_wire(s3c24xx_uart_t *, + indev_t *); + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/drivers/via-cuda/cuda.h =================================================================== --- kernel/genarch/include/genarch/drivers/via-cuda/cuda.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/drivers/via-cuda/cuda.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,123 @@ +/* + * Copyright (c) 2006 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** @file + */ + +#ifndef KERN_CUDA_H_ +#define KERN_CUDA_H_ + +#include +#include +#include +#include + +typedef struct { + uint8_t b; + uint8_t pad0[0x1ff]; + + uint8_t a; + uint8_t pad1[0x1ff]; + + uint8_t dirb; + uint8_t pad2[0x1ff]; + + uint8_t dira; + uint8_t pad3[0x1ff]; + + uint8_t t1cl; + uint8_t pad4[0x1ff]; + + uint8_t t1ch; + uint8_t pad5[0x1ff]; + + uint8_t t1ll; + uint8_t pad6[0x1ff]; + + uint8_t t1lh; + uint8_t pad7[0x1ff]; + + uint8_t t2cl; + uint8_t pad8[0x1ff]; + + uint8_t t2ch; + uint8_t pad9[0x1ff]; + + uint8_t sr; + uint8_t pad10[0x1ff]; + + uint8_t acr; + uint8_t pad11[0x1ff]; + + uint8_t pcr; + uint8_t pad12[0x1ff]; + + uint8_t ifr; + uint8_t pad13[0x1ff]; + + uint8_t ier; + uint8_t pad14[0x1ff]; + + uint8_t anh; + uint8_t pad15[0x1ff]; +} cuda_t; + +enum { + CUDA_RCV_BUF_SIZE = 5 +}; + +enum cuda_xfer_state { + cx_listen, + cx_receive, + cx_rcv_end, + cx_send_start, + cx_send +}; + +typedef struct { + irq_t irq; + cuda_t *cuda; + indev_t *kbrdin; + uint8_t rcv_buf[CUDA_RCV_BUF_SIZE]; + uint8_t snd_buf[CUDA_RCV_BUF_SIZE]; + size_t bidx; + size_t snd_bytes; + enum cuda_xfer_state xstate; + SPINLOCK_DECLARE(dev_lock); +} cuda_instance_t; + +extern cuda_instance_t *cuda_init(cuda_t *, inr_t, cir_t, void *); +extern void cuda_wire(cuda_instance_t *, indev_t *); + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/fb/bfb.h =================================================================== --- kernel/genarch/include/genarch/fb/bfb.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/fb/bfb.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2006 Jakub Vana + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** @file + */ + +#ifndef KERN_BFB_H_ +#define KERN_BFB_H_ + +#include + +extern uintptr_t bfb_addr; +extern uint32_t bfb_width; +extern uint32_t bfb_height; +extern uint16_t bfb_bpp; +extern uint32_t bfb_scanline; + +extern uint8_t bfb_red_pos; +extern uint8_t bfb_red_size; + +extern uint8_t bfb_green_pos; +extern uint8_t bfb_green_size; + +extern uint8_t bfb_blue_pos; +extern uint8_t bfb_blue_size; + +extern bool bfb_init(void); + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/fb/fb.h =================================================================== --- kernel/genarch/include/genarch/fb/fb.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/fb/fb.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,73 @@ +/* + * Copyright (c) 2006 Ondrej Palkovsky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** @file + */ + +#ifndef KERN_FB_H_ +#define KERN_FB_H_ + +#include +#include +#include + +/** + * Properties of the framebuffer device. + */ +typedef struct fb_properties { + /** Physical address of the framebuffer device. */ + uintptr_t addr; + + /** + * Address where the first (top left) pixel is mapped, + * relative to "addr". + */ + unsigned int offset; + + /** Screen width in pixels. */ + unsigned int x; + + /** Screen height in pixels. */ + unsigned int y; + + /** Bytes per one scanline. */ + unsigned int scan; + + /** Color model. */ + visual_t visual; +} fb_properties_t; + +outdev_t *fb_init(fb_properties_t *props); + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/fb/font-8x16.h =================================================================== --- kernel/genarch/include/genarch/fb/font-8x16.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/fb/font-8x16.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2005 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** @file + */ + +#ifndef KERN_FONT_8X16_H_ +#define KERN_FONT_8X16_H_ + +#define FONT_GLYPHS 2899 +#define FONT_WIDTH 8 +#define FONT_SCANLINES 16 + +#include + +extern uint16_t fb_font_glyph(const wchar_t ch); +extern uint8_t fb_font[FONT_GLYPHS][FONT_SCANLINES]; + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/fb/logo-196x66.h =================================================================== --- kernel/genarch/include/genarch/fb/logo-196x66.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/fb/logo-196x66.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2008 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** @file + */ + +#ifndef KERN_LOGO_196X66_H_ +#define KERN_LOGO_196X66_H_ + +#define LOGO_WIDTH 196 +#define LOGO_HEIGHT 66 +#define LOGO_COLOR 0xffffff + +#include + +extern uint32_t fb_logo[LOGO_WIDTH * LOGO_HEIGHT]; + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/kbrd/kbrd.h =================================================================== --- kernel/genarch/include/genarch/kbrd/kbrd.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/kbrd/kbrd.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + */ + +#ifndef KERN_KBD_H_ +#define KERN_KBD_H_ + +#include +#include +#include + +typedef struct { + thread_t *thread; + + indev_t *sink; + indev_t raw; + + SPINLOCK_DECLARE(keylock); /**< keylock protects keyflags and lockflags. */ + volatile unsigned int keyflags; /**< Tracking of multiple keypresses. */ + volatile unsigned int lockflags; /**< Tracking of multiple keys lockings. */ +} kbrd_instance_t; + +extern kbrd_instance_t *kbrd_init(void); +extern indev_t *kbrd_wire(kbrd_instance_t *, indev_t *); + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/kbrd/scanc.h =================================================================== --- kernel/genarch/include/genarch/kbrd/scanc.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/kbrd/scanc.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,49 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + */ + +#ifndef KERN_SCANC_H_ +#define KERN_SCANC_H_ + +#include + +#define SCANCODES 128 + +extern wchar_t sc_primary_map[SCANCODES]; +extern wchar_t sc_secondary_map[SCANCODES]; + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/kbrd/scanc_mac.h =================================================================== --- kernel/genarch/include/genarch/kbrd/scanc_mac.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/kbrd/scanc_mac.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2009 Jiri Svoboda + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Scan codes for Macintosh ADB keyboards. + */ + +#ifndef KERN_SCANC_MAC_H_ +#define KERN_SCANC_MAC_H_ + +#define SC_LSHIFT 0x38 +#define SC_RSHIFT 0xfd /* Not used */ +#define SC_CAPSLOCK 0xfe /* Not used */ +#define SC_SCAN_ESCAPE 0xff /* Not used */ + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/kbrd/scanc_pc.h =================================================================== --- kernel/genarch/include/genarch/kbrd/scanc_pc.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/kbrd/scanc_pc.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Scan codes for PC keyboards. + */ + +#ifndef KERN_SCANC_PC_H_ +#define KERN_SCANC_PC_H_ + +#define SC_LSHIFT 0x2a +#define SC_RSHIFT 0x36 +#define SC_CAPSLOCK 0x3a +#define SC_SCAN_ESCAPE 0xe0 + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/kbrd/scanc_pl050.h =================================================================== --- kernel/genarch/include/genarch/kbrd/scanc_pl050.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/kbrd/scanc_pl050.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,58 @@ +/* + * Copyright (c) 2009 Vineeth Pillai + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Scan codes for pl050 keyboards. + */ + +#ifndef KERN_SCANC_PL050_H_ +#define KERN_SCANC_PL050_H_ + +#define SC_SCAN_ESCAPE 0xE0 +#define SC_ESC 0x76 +#define SC_BACKSPACE 0x66 +#define SC_LSHIFT 0x12 +#define SC_RSHIFT 0x59 +#define SC_CAPSLOCK 0x58 +#define SC_SPEC_ESCAPE 0xe0 +#define SC_LEFTARR 0x6b +#define SC_RIGHTARR 0x74 +#define SC_UPARR 0x75 +#define SC_DOWNARR 0x72 +#define SC_DELETE 0x70 +#define SC_HOME 0x6C +#define SC_END 0x69 + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/kbrd/scanc_sun.h =================================================================== --- kernel/genarch/include/genarch/kbrd/scanc_sun.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/kbrd/scanc_sun.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,48 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + * @brief Scan codes for Sun keyboards. + */ + +#ifndef KERN_SCANC_SUN_H_ +#define KERN_SCANC_SUN_H_ + +#define SC_LSHIFT 0x63 +#define SC_RSHIFT 0x6e +#define SC_CAPSLOCK 0x77 +#define SC_SCAN_ESCAPE 0xe0 + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/mm/as_ht.h =================================================================== --- kernel/genarch/include/genarch/mm/as_ht.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/mm/as_ht.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,65 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarchmm + * @{ + */ +/** @file + */ + +#ifndef KERN_AS_HT_H_ +#define KERN_AS_HT_H_ + +#include +#include +#include + +typedef struct { +} as_genarch_t; + +struct as; + +typedef struct pte { + link_t link; /**< Page hash table link. */ + struct as *as; /**< Address space. */ + uintptr_t page; /**< Virtual memory page. */ + uintptr_t frame; /**< Physical memory frame. */ + unsigned g : 1; /**< Global page. */ + unsigned x : 1; /**< Execute. */ + unsigned w : 1; /**< Writable. */ + unsigned k : 1; /**< Kernel privileges required. */ + unsigned c : 1; /**< Cacheable. */ + unsigned a : 1; /**< Accessed. */ + unsigned d : 1; /**< Dirty. */ + unsigned p : 1; /**< Present. */ +} pte_t; + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/mm/as_pt.h =================================================================== --- kernel/genarch/include/genarch/mm/as_pt.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/mm/as_pt.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,50 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarchmm + * @{ + */ +/** @file + */ + +#ifndef KERN_AS_PT_H_ +#define KERN_AS_PT_H_ + +#include + +#define AS_PAGE_TABLE + +typedef struct { + /** Page table pointer. */ + pte_t *page_table; +} as_genarch_t; + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/mm/asid_fifo.h =================================================================== --- kernel/genarch/include/genarch/mm/asid_fifo.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/mm/asid_fifo.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,43 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarchmm + * @{ + */ +/** @file + */ + +#ifndef KERN_ASID_FIFO_H_ +#define KERN_ASID_FIFO_H_ + +extern void asid_fifo_init(void); + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/mm/page_ht.h =================================================================== --- kernel/genarch/include/genarch/mm/page_ht.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/mm/page_ht.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarchmm + * @{ + */ +/** + * @file + * @brief This is the generic page hash table interface. + */ + +#ifdef CONFIG_PAGE_HT + +#ifndef KERN_PAGE_HT_H_ +#define KERN_PAGE_HT_H_ + +#include +#include +#include +#include +#include +#include + +#define PAGE_HT_KEYS 2 +#define KEY_AS 0 +#define KEY_PAGE 1 + +#define PAGE_HT_ENTRIES_BITS 13 +#define PAGE_HT_ENTRIES (1 << PAGE_HT_ENTRIES_BITS) + +/* Macros for querying page hash table PTEs. */ +#define PTE_VALID(pte) ((pte) != NULL) +#define PTE_PRESENT(pte) ((pte)->p != 0) +#define PTE_GET_FRAME(pte) ((pte)->frame) +#define PTE_READABLE(pte) 1 +#define PTE_WRITABLE(pte) ((pte)->w != 0) +#define PTE_EXECUTABLE(pte) ((pte)->x != 0) + +extern as_operations_t as_ht_operations; +extern page_mapping_operations_t ht_mapping_operations; + +extern slab_cache_t *pte_cache; +extern mutex_t page_ht_lock; +extern hash_table_t page_ht; +extern hash_table_operations_t ht_operations; + +#endif + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/mm/page_pt.h =================================================================== --- kernel/genarch/include/genarch/mm/page_pt.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/mm/page_pt.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,147 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarchmm + * @{ + */ +/** @file + */ + +/* + * This is the generic 4-level page table interface. + * Architectures that use hierarchical page tables + * are supposed to implement *_ARCH macros. + * + */ + +#ifdef CONFIG_PAGE_PT + +#ifndef KERN_PAGE_PT_H_ +#define KERN_PAGE_PT_H_ + +#include +#include +#include +#include + +/* + * Number of entries in each level. + */ +#define PTL0_ENTRIES PTL0_ENTRIES_ARCH +#define PTL1_ENTRIES PTL1_ENTRIES_ARCH +#define PTL2_ENTRIES PTL2_ENTRIES_ARCH +#define PTL3_ENTRIES PTL3_ENTRIES_ARCH + +/* Table sizes in each level */ +#define PTL0_SIZE PTL0_SIZE_ARCH +#define PTL1_SIZE PTL1_SIZE_ARCH +#define PTL2_SIZE PTL2_SIZE_ARCH +#define PTL3_SIZE PTL3_SIZE_ARCH + +/* + * These macros process vaddr and extract those portions + * of it that function as indices to respective page tables. + * + */ +#define PTL0_INDEX(vaddr) PTL0_INDEX_ARCH(vaddr) +#define PTL1_INDEX(vaddr) PTL1_INDEX_ARCH(vaddr) +#define PTL2_INDEX(vaddr) PTL2_INDEX_ARCH(vaddr) +#define PTL3_INDEX(vaddr) PTL3_INDEX_ARCH(vaddr) + +#define SET_PTL0_ADDRESS(ptl0) SET_PTL0_ADDRESS_ARCH(ptl0) + +/* + * These macros traverse the 4-level tree of page tables, + * each descending by one level. + * + */ +#define GET_PTL1_ADDRESS(ptl0, i) GET_PTL1_ADDRESS_ARCH(ptl0, i) +#define GET_PTL2_ADDRESS(ptl1, i) GET_PTL2_ADDRESS_ARCH(ptl1, i) +#define GET_PTL3_ADDRESS(ptl2, i) GET_PTL3_ADDRESS_ARCH(ptl2, i) +#define GET_FRAME_ADDRESS(ptl3, i) GET_FRAME_ADDRESS_ARCH(ptl3, i) + +/* + * These macros are provided to change the shape of the 4-level tree of page + * tables on respective level. + * + */ +#define SET_PTL1_ADDRESS(ptl0, i, a) SET_PTL1_ADDRESS_ARCH(ptl0, i, a) +#define SET_PTL2_ADDRESS(ptl1, i, a) SET_PTL2_ADDRESS_ARCH(ptl1, i, a) +#define SET_PTL3_ADDRESS(ptl2, i, a) SET_PTL3_ADDRESS_ARCH(ptl2, i, a) +#define SET_FRAME_ADDRESS(ptl3, i, a) SET_FRAME_ADDRESS_ARCH(ptl3, i, a) + +/* + * These macros are provided to query various flags within the page tables. + * + */ +#define GET_PTL1_FLAGS(ptl0, i) GET_PTL1_FLAGS_ARCH(ptl0, i) +#define GET_PTL2_FLAGS(ptl1, i) GET_PTL2_FLAGS_ARCH(ptl1, i) +#define GET_PTL3_FLAGS(ptl2, i) GET_PTL3_FLAGS_ARCH(ptl2, i) +#define GET_FRAME_FLAGS(ptl3, i) GET_FRAME_FLAGS_ARCH(ptl3, i) + +/* + * These macros are provided to set/clear various flags within the page tables. + * + */ +#define SET_PTL1_FLAGS(ptl0, i, x) SET_PTL1_FLAGS_ARCH(ptl0, i, x) +#define SET_PTL2_FLAGS(ptl1, i, x) SET_PTL2_FLAGS_ARCH(ptl1, i, x) +#define SET_PTL3_FLAGS(ptl2, i, x) SET_PTL3_FLAGS_ARCH(ptl2, i, x) +#define SET_FRAME_FLAGS(ptl3, i, x) SET_FRAME_FLAGS_ARCH(ptl3, i, x) + +/* + * These macros are provided to set the present bit within the page tables. + * + */ +#define SET_PTL1_PRESENT(ptl0, i) SET_PTL1_PRESENT_ARCH(ptl0, i) +#define SET_PTL2_PRESENT(ptl1, i) SET_PTL2_PRESENT_ARCH(ptl1, i) +#define SET_PTL3_PRESENT(ptl2, i) SET_PTL3_PRESENT_ARCH(ptl2, i) +#define SET_FRAME_PRESENT(ptl3, i) SET_FRAME_PRESENT_ARCH(ptl3, i) + +/* + * Macros for querying the last-level PTEs. + * + */ +#define PTE_VALID(p) PTE_VALID_ARCH((p)) +#define PTE_PRESENT(p) PTE_PRESENT_ARCH((p)) +#define PTE_GET_FRAME(p) PTE_GET_FRAME_ARCH((p)) +#define PTE_READABLE(p) 1 +#define PTE_WRITABLE(p) PTE_WRITABLE_ARCH((p)) +#define PTE_EXECUTABLE(p) PTE_EXECUTABLE_ARCH((p)) + +extern as_operations_t as_pt_operations; +extern page_mapping_operations_t pt_mapping_operations; + +extern void page_mapping_insert_pt(as_t *, uintptr_t, uintptr_t, unsigned int); +extern pte_t *page_mapping_find_pt(as_t *, uintptr_t, bool); + +#endif + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/multiboot/multiboot.h =================================================================== --- kernel/genarch/include/genarch/multiboot/multiboot.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/multiboot/multiboot.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,109 @@ +/* + * Copyright (c) 2009 Jiri Svoboda + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** @file + */ + +#ifndef KERN_MULTIBOOT_H_ +#define KERN_MULTIBOOT_H_ + +#define MULTIBOOT_HEADER_MAGIC 0x1badb002 +#define MULTIBOOT_HEADER_FLAGS 0x00010003 + +#define MULTIBOOT_LOADER_MAGIC 0x2badb002 + +#ifndef __ASM__ + +#include +#include + +/** Convert 32-bit multiboot address to a pointer. */ +#define MULTIBOOT_PTR(mba) ((void *) (uintptr_t) (mba)) + +/** Multiboot 32-bit address. */ +typedef uint32_t mbaddr_t; + +/** Multiboot module structure */ +typedef struct { + mbaddr_t start; + mbaddr_t end; + mbaddr_t string; + uint32_t reserved; +} __attribute__((packed)) multiboot_module_t; + +/** Multiboot mmap structure */ +typedef struct { + uint32_t size; + e820memmap_t mm_info; +} __attribute__((packed)) multiboot_memmap_t; + +/** Multiboot information structure */ +typedef struct { + uint32_t flags; + uint32_t mem_lower; + uint32_t mem_upper; + + uint32_t boot_device; + uint32_t cmdline; + + uint32_t mods_count; + mbaddr_t mods_addr; + + uint32_t syms[4]; + + uint32_t mmap_length; + mbaddr_t mmap_addr; + + /* ... */ +} __attribute__((packed)) multiboot_info_t; + +enum multiboot_info_flags { + MULTIBOOT_INFO_FLAGS_MEM = 0x01, + MULTIBOOT_INFO_FLAGS_BOOT = 0x02, + MULTIBOOT_INFO_FLAGS_CMDLINE = 0x04, + MULTIBOOT_INFO_FLAGS_MODS = 0x08, + MULTIBOOT_INFO_FLAGS_SYMS1 = 0x10, + MULTIBOOT_INFO_FLAGS_SYMS2 = 0x20, + MULTIBOOT_INFO_FLAGS_MMAP = 0x40 + + /* ... */ +}; + +extern void multiboot_extract_command(char *, size_t, const char *); +extern void multiboot_extract_argument(char *, size_t, const char *); +extern void multiboot_info_parse(uint32_t, const multiboot_info_t *); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/multiboot/multiboot2.h =================================================================== --- kernel/genarch/include/genarch/multiboot/multiboot2.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/multiboot/multiboot2.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2011 Martin Decky + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** @file + */ + +#ifndef KERN_MULTIBOOT2_H_ +#define KERN_MULTIBOOT2_H_ + +#define MULTIBOOT2_HEADER_MAGIC 0xe85250d6 +#define MULTIBOOT2_HEADER_ARCH_I386 0 + +#define MULTIBOOT2_LOADER_MAGIC 0x36d76289 + +#define MULTIBOOT2_FLAGS_REQUIRED 0 +#define MULTIBOOT2_FLAGS_CONSOLE 0x03 + +#define MULTIBOOT2_TAG_TERMINATOR 0 +#define MULTIBOOT2_TAG_INFO_REQ 1 +#define MULTIBOOT2_TAG_ADDRESS 2 +#define MULTIBOOT2_TAG_ENTRY_ADDRESS 3 +#define MULTIBOOT2_TAG_FLAGS 4 +#define MULTIBOOT2_TAG_FRAMEBUFFER 5 +#define MULTIBOOT2_TAG_MODULE_ALIGN 6 + +#define MULTIBOOT2_TAG_MODULE 3 +#define MULTIBOOT2_TAG_MEMMAP 6 +#define MULTIBOOT2_TAG_FBINFO 8 + +#define MULTIBOOT2_VISUAL_INDEXED 0 +#define MULTIBOOT2_VISUAL_RGB 1 +#define MULTIBOOT2_VISUAL_EGA 2 + +#ifndef __ASM__ + +#include +#include + +/** Multiboot2 32-bit address. */ +typedef uint32_t mb2addr_t; + +/** Multiboot2 information structure */ +typedef struct { + uint32_t size; + uint32_t reserved; +} __attribute__((packed)) multiboot2_info_t; + +/** Multiboot2 modules structure */ +typedef struct { + mb2addr_t start; + mb2addr_t end; + char string[]; +} __attribute__((packed)) multiboot2_module_t; + +/** Multiboot2 memmap structure */ +typedef struct { + uint32_t entry_size; + uint32_t entry_version; +} __attribute__ ((packed)) multiboot2_memmap_t; + +/** Multiboot2 memmap entry structure */ +typedef struct { + uint64_t base_address; + uint64_t size; + uint32_t type; + uint32_t reserved; +} __attribute__((packed)) multiboot2_memmap_entry_t; + +/** Multiboot2 palette structure */ +typedef struct { + uint8_t red; + uint8_t green; + uint8_t blue; +} __attribute__((packed)) multiboot2_colorinfo_palette_t; + +/** Multiboot2 indexed color information structure */ +typedef struct { + uint32_t colors; + multiboot2_colorinfo_palette_t palette[]; +} __attribute__((packed)) multiboot2_colorinfo_indexed_t; + +/** Multiboot2 RGB color information structure */ +typedef struct { + uint8_t red_pos; + uint8_t red_size; + uint8_t green_pos; + uint8_t green_size; + uint8_t blue_pos; + uint8_t blue_size; +} __attribute__((packed)) multiboot2_colorinfo_rgb_t; + +/** Multiboot2 framebuffer information structure */ +typedef struct { + uint64_t addr; + uint32_t scanline; + uint32_t width; + uint32_t height; + uint8_t bpp; + uint8_t visual; + uint8_t reserved; + union { + multiboot2_colorinfo_indexed_t indexed; + multiboot2_colorinfo_rgb_t rgb; + }; +} __attribute__((packed)) multiboot2_fbinfo_t; + +/** Generic multiboot2 tag */ +typedef struct { + uint32_t type; + uint32_t size; + union { + multiboot2_module_t module; + multiboot2_memmap_t memmap; + multiboot2_fbinfo_t fbinfo; + }; +} __attribute__((packed)) multiboot2_tag_t; + +extern void multiboot2_info_parse(uint32_t, const multiboot2_info_t *); + +#endif /* __ASM__ */ + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/ofw/ebus.h =================================================================== --- kernel/genarch/include/genarch/ofw/ebus.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/ofw/ebus.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef KERN_EBUS_H_ +#define KERN_EBUS_H_ + +#include +#include +#include +#include + +typedef struct { + uint32_t space; + uint32_t addr; + uint32_t size; +} __attribute__ ((packed)) ofw_ebus_reg_t; + +typedef struct { + uint32_t child_space; + uint32_t child_base; + uint32_t parent_space; + + /* Group phys.mid and phys.lo together */ + uint64_t parent_base; + uint32_t size; +} __attribute__ ((packed)) ofw_ebus_range_t; + +typedef struct { + uint32_t space; + uint32_t addr; + uint32_t intr; + uint32_t controller_handle; + uint32_t controller_ino; +} __attribute__ ((packed)) ofw_ebus_intr_map_t; + +typedef struct { + uint32_t space_mask; + uint32_t addr_mask; + uint32_t intr_mask; +} __attribute__ ((packed)) ofw_ebus_intr_mask_t; + +extern bool ofw_ebus_apply_ranges(ofw_tree_node_t *, ofw_ebus_reg_t *, + uintptr_t *); +extern bool ofw_ebus_map_interrupt(ofw_tree_node_t *, ofw_ebus_reg_t *, + uint32_t, int *, cir_t *, void **); + +#endif Index: kernel/genarch/include/genarch/ofw/ofw_tree.h =================================================================== --- kernel/genarch/include/genarch/ofw/ofw_tree.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/ofw/ofw_tree.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,89 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef KERN_OFW_TREE_H_ +#define KERN_OFW_TREE_H_ + +#include + +#define OFW_TREE_PROPERTY_MAX_NAMELEN 32 + +typedef uint32_t phandle; + +/** Memory representation of OpenFirmware device tree node property. */ +typedef struct { + char name[OFW_TREE_PROPERTY_MAX_NAMELEN]; + size_t size; + void *value; +} ofw_tree_property_t; + +/** Memory representation of OpenFirmware device tree node. */ +typedef struct ofw_tree_node { + struct ofw_tree_node *parent; + struct ofw_tree_node *peer; + struct ofw_tree_node *child; + + phandle node_handle; /**< Old OpenFirmware node handle. */ + + char *da_name; /**< Disambigued name. */ + + size_t properties; /**< Number of properties. */ + ofw_tree_property_t *property; + + /** + * Pointer to a structure representing respective device. + * Its semantics is device dependent. + */ + void *device; +} ofw_tree_node_t; + +/* Walker for visiting OpenFirmware device tree nodes. */ +typedef bool (* ofw_tree_walker_t)(ofw_tree_node_t *, void *); + +extern void ofw_tree_init(ofw_tree_node_t *); +extern void ofw_sysinfo_map(void); + +extern const char *ofw_tree_node_name(const ofw_tree_node_t *); +extern ofw_tree_node_t *ofw_tree_lookup(const char *); +extern ofw_tree_property_t *ofw_tree_getprop(const ofw_tree_node_t *, + const char *); +extern void ofw_tree_walk_by_device_type(const char *, ofw_tree_walker_t, + void *); + +extern ofw_tree_node_t *ofw_tree_find_child(ofw_tree_node_t *, const char *); +extern ofw_tree_node_t *ofw_tree_find_child_by_device_type(ofw_tree_node_t *, + const char *); + +extern ofw_tree_node_t *ofw_tree_find_peer_by_device_type(ofw_tree_node_t *, + const char *); +extern ofw_tree_node_t *ofw_tree_find_peer_by_name(ofw_tree_node_t *, + const char *); +extern ofw_tree_node_t *ofw_tree_find_node_by_handle(ofw_tree_node_t *, + phandle); + +#endif Index: kernel/genarch/include/genarch/ofw/pci.h =================================================================== --- kernel/genarch/include/genarch/ofw/pci.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/ofw/pci.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,64 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef KERN_PCI_H_ +#define KERN_PCI_H_ + +#include +#include +#include +#include + +typedef struct { + /* Needs to be masked to obtain pure space id */ + uint32_t space; + + /* Group phys.mid and phys.lo together */ + uint64_t addr; + uint64_t size; +} __attribute__ ((packed)) ofw_pci_reg_t; + +typedef struct { + uint32_t space; + + /* Group phys.mid and phys.lo together */ + uint64_t child_base; + uint64_t parent_base; + uint64_t size; +} __attribute__ ((packed)) ofw_pci_range_t; + +extern bool ofw_pci_apply_ranges(ofw_tree_node_t *, ofw_pci_reg_t *, + uintptr_t *); + +extern bool ofw_pci_reg_absolutize(ofw_tree_node_t *, ofw_pci_reg_t *, + ofw_pci_reg_t *); + +extern bool ofw_pci_map_interrupt(ofw_tree_node_t *, ofw_pci_reg_t *, + int, int *, cir_t *, void **); + +#endif Index: kernel/genarch/include/genarch/ofw/sbus.h =================================================================== --- kernel/genarch/include/genarch/ofw/sbus.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/ofw/sbus.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef KERN_SBUS_H_ +#define KERN_SBUS_H_ + +#include +#include +#include +#include + +typedef struct { + uint64_t addr; + uint32_t size; +} __attribute__ ((packed)) ofw_sbus_reg_t; + +typedef struct { + uint64_t child_base; + uint64_t parent_base; + uint32_t size; +} __attribute__ ((packed)) ofw_sbus_range_t; + +extern bool ofw_sbus_apply_ranges(ofw_tree_node_t *, ofw_sbus_reg_t *, + uintptr_t *); + +#endif Index: kernel/genarch/include/genarch/ofw/upa.h =================================================================== --- kernel/genarch/include/genarch/ofw/upa.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/ofw/upa.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2006 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef KERN_UPA_H_ +#define KERN_UPA_H_ + +#include +#include +#include +#include + +typedef struct { + uint64_t addr; + uint64_t size; +} __attribute__ ((packed)) ofw_upa_reg_t; + +extern bool ofw_upa_apply_ranges(ofw_tree_node_t *, ofw_upa_reg_t *, + uintptr_t *); + +#endif Index: kernel/genarch/include/genarch/softint/division.h =================================================================== --- kernel/genarch/include/genarch/softint/division.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/softint/division.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2006 Josef Cejka + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** @file + */ + +#ifndef KERN_DIVISION_H_ +#define KERN_DIVISION_H_ + +extern int __divsi3(int, int); +extern long long __divdi3(long long, long long); + +extern unsigned int __udivsi3(unsigned int, unsigned int); +extern unsigned long long __udivdi3(unsigned long long, unsigned long long); + +extern int __modsi3(int, int); +extern long long __moddi3(long long, long long); + +extern unsigned int __umodsi3(unsigned int, unsigned int); +extern unsigned long long __umoddi3(unsigned long long, unsigned long long); + +extern int __divmodsi3(int, int, int *); +extern unsigned int __udivmodsi3(unsigned int, unsigned int, unsigned int *); + +extern long long __divmoddi3(long long, long long, long long *); +extern unsigned long long __udivmoddi3(unsigned long long, unsigned long long, + unsigned long long *); + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/softint/multiplication.h =================================================================== --- kernel/genarch/include/genarch/softint/multiplication.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/softint/multiplication.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,45 @@ +/* + * Copyright (c) 2009 Josef Cejka + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + */ + +#ifndef KERN_MULTIPLICATION_H_ +#define KERN_MULTIPLICATION_H_ + +/* 64 bit multiplication */ +extern long long __muldi3(long long, long long); + +#endif + +/** @} + */ Index: kernel/genarch/include/genarch/srln/srln.h =================================================================== --- kernel/genarch/include/genarch/srln/srln.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) +++ kernel/genarch/include/genarch/srln/srln.h (revision 6b0b5085f6bc7e20d2ccf94b45b70e6c4d5262df) @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2009 Jakub Jermar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * - Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * - Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * - The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +/** @addtogroup genarch + * @{ + */ +/** + * @file + */ + +#ifndef KERN_SRLN_H_ +#define KERN_SRLN_H_ + +#include +#include + +typedef struct { + thread_t *thread; + + indev_t *sink; + indev_t raw; +} srln_instance_t; + +extern srln_instance_t *srln_init(void); +extern indev_t *srln_wire(srln_instance_t *, indev_t *); + +#endif + +/** @} + */ Index: kernel/genarch/include/kbrd/kbrd.h =================================================================== --- kernel/genarch/include/kbrd/kbrd.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,60 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** - * @file - */ - -#ifndef KERN_KBD_H_ -#define KERN_KBD_H_ - -#include -#include -#include - -typedef struct { - thread_t *thread; - - indev_t *sink; - indev_t raw; - - SPINLOCK_DECLARE(keylock); /**< keylock protects keyflags and lockflags. */ - volatile unsigned int keyflags; /**< Tracking of multiple keypresses. */ - volatile unsigned int lockflags; /**< Tracking of multiple keys lockings. */ -} kbrd_instance_t; - -extern kbrd_instance_t *kbrd_init(void); -extern indev_t *kbrd_wire(kbrd_instance_t *, indev_t *); - -#endif - -/** @} - */ Index: kernel/genarch/include/kbrd/scanc.h =================================================================== --- kernel/genarch/include/kbrd/scanc.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** - * @file - */ - -#ifndef KERN_SCANC_H_ -#define KERN_SCANC_H_ - -#include - -#define SCANCODES 128 - -extern wchar_t sc_primary_map[SCANCODES]; -extern wchar_t sc_secondary_map[SCANCODES]; - -#endif - -/** @} - */ Index: kernel/genarch/include/kbrd/scanc_mac.h =================================================================== --- kernel/genarch/include/kbrd/scanc_mac.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2009 Jiri Svoboda - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Scan codes for Macintosh ADB keyboards. - */ - -#ifndef KERN_SCANC_MAC_H_ -#define KERN_SCANC_MAC_H_ - -#define SC_LSHIFT 0x38 -#define SC_RSHIFT 0xfd /* Not used */ -#define SC_CAPSLOCK 0xfe /* Not used */ -#define SC_SCAN_ESCAPE 0xff /* Not used */ - -#endif - -/** @} - */ Index: kernel/genarch/include/kbrd/scanc_pc.h =================================================================== --- kernel/genarch/include/kbrd/scanc_pc.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Scan codes for PC keyboards. - */ - -#ifndef KERN_SCANC_PC_H_ -#define KERN_SCANC_PC_H_ - -#define SC_LSHIFT 0x2a -#define SC_RSHIFT 0x36 -#define SC_CAPSLOCK 0x3a -#define SC_SCAN_ESCAPE 0xe0 - -#endif - -/** @} - */ Index: kernel/genarch/include/kbrd/scanc_pl050.h =================================================================== --- kernel/genarch/include/kbrd/scanc_pl050.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,58 +1,0 @@ -/* - * Copyright (c) 2009 Vineeth Pillai - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Scan codes for pl050 keyboards. - */ - -#ifndef KERN_SCANC_PL050_H_ -#define KERN_SCANC_PL050_H_ - -#define SC_SCAN_ESCAPE 0xE0 -#define SC_ESC 0x76 -#define SC_BACKSPACE 0x66 -#define SC_LSHIFT 0x12 -#define SC_RSHIFT 0x59 -#define SC_CAPSLOCK 0x58 -#define SC_SPEC_ESCAPE 0xe0 -#define SC_LEFTARR 0x6b -#define SC_RIGHTARR 0x74 -#define SC_UPARR 0x75 -#define SC_DOWNARR 0x72 -#define SC_DELETE 0x70 -#define SC_HOME 0x6C -#define SC_END 0x69 - -#endif - -/** @} - */ Index: kernel/genarch/include/kbrd/scanc_sun.h =================================================================== --- kernel/genarch/include/kbrd/scanc_sun.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** - * @file - * @brief Scan codes for Sun keyboards. - */ - -#ifndef KERN_SCANC_SUN_H_ -#define KERN_SCANC_SUN_H_ - -#define SC_LSHIFT 0x63 -#define SC_RSHIFT 0x6e -#define SC_CAPSLOCK 0x77 -#define SC_SCAN_ESCAPE 0xe0 - -#endif - -/** @} - */ Index: kernel/genarch/include/mm/as_ht.h =================================================================== --- kernel/genarch/include/mm/as_ht.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,65 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarchmm - * @{ - */ -/** @file - */ - -#ifndef KERN_AS_HT_H_ -#define KERN_AS_HT_H_ - -#include -#include -#include - -typedef struct { -} as_genarch_t; - -struct as; - -typedef struct pte { - link_t link; /**< Page hash table link. */ - struct as *as; /**< Address space. */ - uintptr_t page; /**< Virtual memory page. */ - uintptr_t frame; /**< Physical memory frame. */ - unsigned g : 1; /**< Global page. */ - unsigned x : 1; /**< Execute. */ - unsigned w : 1; /**< Writable. */ - unsigned k : 1; /**< Kernel privileges required. */ - unsigned c : 1; /**< Cacheable. */ - unsigned a : 1; /**< Accessed. */ - unsigned d : 1; /**< Dirty. */ - unsigned p : 1; /**< Present. */ -} pte_t; - -#endif - -/** @} - */ Index: kernel/genarch/include/mm/as_pt.h =================================================================== --- kernel/genarch/include/mm/as_pt.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarchmm - * @{ - */ -/** @file - */ - -#ifndef KERN_AS_PT_H_ -#define KERN_AS_PT_H_ - -#include - -#define AS_PAGE_TABLE - -typedef struct { - /** Page table pointer. */ - pte_t *page_table; -} as_genarch_t; - -#endif - -/** @} - */ Index: kernel/genarch/include/mm/asid_fifo.h =================================================================== --- kernel/genarch/include/mm/asid_fifo.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,43 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarchmm - * @{ - */ -/** @file - */ - -#ifndef KERN_ASID_FIFO_H_ -#define KERN_ASID_FIFO_H_ - -extern void asid_fifo_init(void); - -#endif - -/** @} - */ Index: kernel/genarch/include/mm/page_ht.h =================================================================== --- kernel/genarch/include/mm/page_ht.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,77 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarchmm - * @{ - */ -/** - * @file - * @brief This is the generic page hash table interface. - */ - -#ifdef CONFIG_PAGE_HT - -#ifndef KERN_PAGE_HT_H_ -#define KERN_PAGE_HT_H_ - -#include -#include -#include -#include -#include -#include - -#define PAGE_HT_KEYS 2 -#define KEY_AS 0 -#define KEY_PAGE 1 - -#define PAGE_HT_ENTRIES_BITS 13 -#define PAGE_HT_ENTRIES (1 << PAGE_HT_ENTRIES_BITS) - -/* Macros for querying page hash table PTEs. */ -#define PTE_VALID(pte) ((pte) != NULL) -#define PTE_PRESENT(pte) ((pte)->p != 0) -#define PTE_GET_FRAME(pte) ((pte)->frame) -#define PTE_READABLE(pte) 1 -#define PTE_WRITABLE(pte) ((pte)->w != 0) -#define PTE_EXECUTABLE(pte) ((pte)->x != 0) - -extern as_operations_t as_ht_operations; -extern page_mapping_operations_t ht_mapping_operations; - -extern slab_cache_t *pte_cache; -extern mutex_t page_ht_lock; -extern hash_table_t page_ht; -extern hash_table_operations_t ht_operations; - -#endif - -#endif - -/** @} - */ Index: kernel/genarch/include/mm/page_pt.h =================================================================== --- kernel/genarch/include/mm/page_pt.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,147 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarchmm - * @{ - */ -/** @file - */ - -/* - * This is the generic 4-level page table interface. - * Architectures that use hierarchical page tables - * are supposed to implement *_ARCH macros. - * - */ - -#ifdef CONFIG_PAGE_PT - -#ifndef KERN_PAGE_PT_H_ -#define KERN_PAGE_PT_H_ - -#include -#include -#include -#include - -/* - * Number of entries in each level. - */ -#define PTL0_ENTRIES PTL0_ENTRIES_ARCH -#define PTL1_ENTRIES PTL1_ENTRIES_ARCH -#define PTL2_ENTRIES PTL2_ENTRIES_ARCH -#define PTL3_ENTRIES PTL3_ENTRIES_ARCH - -/* Table sizes in each level */ -#define PTL0_SIZE PTL0_SIZE_ARCH -#define PTL1_SIZE PTL1_SIZE_ARCH -#define PTL2_SIZE PTL2_SIZE_ARCH -#define PTL3_SIZE PTL3_SIZE_ARCH - -/* - * These macros process vaddr and extract those portions - * of it that function as indices to respective page tables. - * - */ -#define PTL0_INDEX(vaddr) PTL0_INDEX_ARCH(vaddr) -#define PTL1_INDEX(vaddr) PTL1_INDEX_ARCH(vaddr) -#define PTL2_INDEX(vaddr) PTL2_INDEX_ARCH(vaddr) -#define PTL3_INDEX(vaddr) PTL3_INDEX_ARCH(vaddr) - -#define SET_PTL0_ADDRESS(ptl0) SET_PTL0_ADDRESS_ARCH(ptl0) - -/* - * These macros traverse the 4-level tree of page tables, - * each descending by one level. - * - */ -#define GET_PTL1_ADDRESS(ptl0, i) GET_PTL1_ADDRESS_ARCH(ptl0, i) -#define GET_PTL2_ADDRESS(ptl1, i) GET_PTL2_ADDRESS_ARCH(ptl1, i) -#define GET_PTL3_ADDRESS(ptl2, i) GET_PTL3_ADDRESS_ARCH(ptl2, i) -#define GET_FRAME_ADDRESS(ptl3, i) GET_FRAME_ADDRESS_ARCH(ptl3, i) - -/* - * These macros are provided to change the shape of the 4-level tree of page - * tables on respective level. - * - */ -#define SET_PTL1_ADDRESS(ptl0, i, a) SET_PTL1_ADDRESS_ARCH(ptl0, i, a) -#define SET_PTL2_ADDRESS(ptl1, i, a) SET_PTL2_ADDRESS_ARCH(ptl1, i, a) -#define SET_PTL3_ADDRESS(ptl2, i, a) SET_PTL3_ADDRESS_ARCH(ptl2, i, a) -#define SET_FRAME_ADDRESS(ptl3, i, a) SET_FRAME_ADDRESS_ARCH(ptl3, i, a) - -/* - * These macros are provided to query various flags within the page tables. - * - */ -#define GET_PTL1_FLAGS(ptl0, i) GET_PTL1_FLAGS_ARCH(ptl0, i) -#define GET_PTL2_FLAGS(ptl1, i) GET_PTL2_FLAGS_ARCH(ptl1, i) -#define GET_PTL3_FLAGS(ptl2, i) GET_PTL3_FLAGS_ARCH(ptl2, i) -#define GET_FRAME_FLAGS(ptl3, i) GET_FRAME_FLAGS_ARCH(ptl3, i) - -/* - * These macros are provided to set/clear various flags within the page tables. - * - */ -#define SET_PTL1_FLAGS(ptl0, i, x) SET_PTL1_FLAGS_ARCH(ptl0, i, x) -#define SET_PTL2_FLAGS(ptl1, i, x) SET_PTL2_FLAGS_ARCH(ptl1, i, x) -#define SET_PTL3_FLAGS(ptl2, i, x) SET_PTL3_FLAGS_ARCH(ptl2, i, x) -#define SET_FRAME_FLAGS(ptl3, i, x) SET_FRAME_FLAGS_ARCH(ptl3, i, x) - -/* - * These macros are provided to set the present bit within the page tables. - * - */ -#define SET_PTL1_PRESENT(ptl0, i) SET_PTL1_PRESENT_ARCH(ptl0, i) -#define SET_PTL2_PRESENT(ptl1, i) SET_PTL2_PRESENT_ARCH(ptl1, i) -#define SET_PTL3_PRESENT(ptl2, i) SET_PTL3_PRESENT_ARCH(ptl2, i) -#define SET_FRAME_PRESENT(ptl3, i) SET_FRAME_PRESENT_ARCH(ptl3, i) - -/* - * Macros for querying the last-level PTEs. - * - */ -#define PTE_VALID(p) PTE_VALID_ARCH((p)) -#define PTE_PRESENT(p) PTE_PRESENT_ARCH((p)) -#define PTE_GET_FRAME(p) PTE_GET_FRAME_ARCH((p)) -#define PTE_READABLE(p) 1 -#define PTE_WRITABLE(p) PTE_WRITABLE_ARCH((p)) -#define PTE_EXECUTABLE(p) PTE_EXECUTABLE_ARCH((p)) - -extern as_operations_t as_pt_operations; -extern page_mapping_operations_t pt_mapping_operations; - -extern void page_mapping_insert_pt(as_t *, uintptr_t, uintptr_t, unsigned int); -extern pte_t *page_mapping_find_pt(as_t *, uintptr_t, bool); - -#endif - -#endif - -/** @} - */ Index: kernel/genarch/include/multiboot/multiboot.h =================================================================== --- kernel/genarch/include/multiboot/multiboot.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,109 +1,0 @@ -/* - * Copyright (c) 2009 Jiri Svoboda - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** @file - */ - -#ifndef KERN_MULTIBOOT_H_ -#define KERN_MULTIBOOT_H_ - -#define MULTIBOOT_HEADER_MAGIC 0x1badb002 -#define MULTIBOOT_HEADER_FLAGS 0x00010003 - -#define MULTIBOOT_LOADER_MAGIC 0x2badb002 - -#ifndef __ASM__ - -#include -#include - -/** Convert 32-bit multiboot address to a pointer. */ -#define MULTIBOOT_PTR(mba) ((void *) (uintptr_t) (mba)) - -/** Multiboot 32-bit address. */ -typedef uint32_t mbaddr_t; - -/** Multiboot module structure */ -typedef struct { - mbaddr_t start; - mbaddr_t end; - mbaddr_t string; - uint32_t reserved; -} __attribute__((packed)) multiboot_module_t; - -/** Multiboot mmap structure */ -typedef struct { - uint32_t size; - e820memmap_t mm_info; -} __attribute__((packed)) multiboot_memmap_t; - -/** Multiboot information structure */ -typedef struct { - uint32_t flags; - uint32_t mem_lower; - uint32_t mem_upper; - - uint32_t boot_device; - uint32_t cmdline; - - uint32_t mods_count; - mbaddr_t mods_addr; - - uint32_t syms[4]; - - uint32_t mmap_length; - mbaddr_t mmap_addr; - - /* ... */ -} __attribute__((packed)) multiboot_info_t; - -enum multiboot_info_flags { - MULTIBOOT_INFO_FLAGS_MEM = 0x01, - MULTIBOOT_INFO_FLAGS_BOOT = 0x02, - MULTIBOOT_INFO_FLAGS_CMDLINE = 0x04, - MULTIBOOT_INFO_FLAGS_MODS = 0x08, - MULTIBOOT_INFO_FLAGS_SYMS1 = 0x10, - MULTIBOOT_INFO_FLAGS_SYMS2 = 0x20, - MULTIBOOT_INFO_FLAGS_MMAP = 0x40 - - /* ... */ -}; - -extern void multiboot_extract_command(char *, size_t, const char *); -extern void multiboot_extract_argument(char *, size_t, const char *); -extern void multiboot_info_parse(uint32_t, const multiboot_info_t *); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/genarch/include/multiboot/multiboot2.h =================================================================== --- kernel/genarch/include/multiboot/multiboot2.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,153 +1,0 @@ -/* - * Copyright (c) 2011 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** @file - */ - -#ifndef KERN_MULTIBOOT2_H_ -#define KERN_MULTIBOOT2_H_ - -#define MULTIBOOT2_HEADER_MAGIC 0xe85250d6 -#define MULTIBOOT2_HEADER_ARCH_I386 0 - -#define MULTIBOOT2_LOADER_MAGIC 0x36d76289 - -#define MULTIBOOT2_FLAGS_REQUIRED 0 -#define MULTIBOOT2_FLAGS_CONSOLE 0x03 - -#define MULTIBOOT2_TAG_TERMINATOR 0 -#define MULTIBOOT2_TAG_INFO_REQ 1 -#define MULTIBOOT2_TAG_ADDRESS 2 -#define MULTIBOOT2_TAG_ENTRY_ADDRESS 3 -#define MULTIBOOT2_TAG_FLAGS 4 -#define MULTIBOOT2_TAG_FRAMEBUFFER 5 -#define MULTIBOOT2_TAG_MODULE_ALIGN 6 - -#define MULTIBOOT2_TAG_MODULE 3 -#define MULTIBOOT2_TAG_MEMMAP 6 -#define MULTIBOOT2_TAG_FBINFO 8 - -#define MULTIBOOT2_VISUAL_INDEXED 0 -#define MULTIBOOT2_VISUAL_RGB 1 -#define MULTIBOOT2_VISUAL_EGA 2 - -#ifndef __ASM__ - -#include -#include - -/** Multiboot2 32-bit address. */ -typedef uint32_t mb2addr_t; - -/** Multiboot2 information structure */ -typedef struct { - uint32_t size; - uint32_t reserved; -} __attribute__((packed)) multiboot2_info_t; - -/** Multiboot2 modules structure */ -typedef struct { - mb2addr_t start; - mb2addr_t end; - char string[]; -} __attribute__((packed)) multiboot2_module_t; - -/** Multiboot2 memmap structure */ -typedef struct { - uint32_t entry_size; - uint32_t entry_version; -} __attribute__ ((packed)) multiboot2_memmap_t; - -/** Multiboot2 memmap entry structure */ -typedef struct { - uint64_t base_address; - uint64_t size; - uint32_t type; - uint32_t reserved; -} __attribute__((packed)) multiboot2_memmap_entry_t; - -/** Multiboot2 palette structure */ -typedef struct { - uint8_t red; - uint8_t green; - uint8_t blue; -} __attribute__((packed)) multiboot2_colorinfo_palette_t; - -/** Multiboot2 indexed color information structure */ -typedef struct { - uint32_t colors; - multiboot2_colorinfo_palette_t palette[]; -} __attribute__((packed)) multiboot2_colorinfo_indexed_t; - -/** Multiboot2 RGB color information structure */ -typedef struct { - uint8_t red_pos; - uint8_t red_size; - uint8_t green_pos; - uint8_t green_size; - uint8_t blue_pos; - uint8_t blue_size; -} __attribute__((packed)) multiboot2_colorinfo_rgb_t; - -/** Multiboot2 framebuffer information structure */ -typedef struct { - uint64_t addr; - uint32_t scanline; - uint32_t width; - uint32_t height; - uint8_t bpp; - uint8_t visual; - uint8_t reserved; - union { - multiboot2_colorinfo_indexed_t indexed; - multiboot2_colorinfo_rgb_t rgb; - }; -} __attribute__((packed)) multiboot2_fbinfo_t; - -/** Generic multiboot2 tag */ -typedef struct { - uint32_t type; - uint32_t size; - union { - multiboot2_module_t module; - multiboot2_memmap_t memmap; - multiboot2_fbinfo_t fbinfo; - }; -} __attribute__((packed)) multiboot2_tag_t; - -extern void multiboot2_info_parse(uint32_t, const multiboot2_info_t *); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/genarch/include/ofw/ebus.h =================================================================== --- kernel/genarch/include/ofw/ebus.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,72 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef KERN_EBUS_H_ -#define KERN_EBUS_H_ - -#include -#include -#include -#include - -typedef struct { - uint32_t space; - uint32_t addr; - uint32_t size; -} __attribute__ ((packed)) ofw_ebus_reg_t; - -typedef struct { - uint32_t child_space; - uint32_t child_base; - uint32_t parent_space; - - /* Group phys.mid and phys.lo together */ - uint64_t parent_base; - uint32_t size; -} __attribute__ ((packed)) ofw_ebus_range_t; - -typedef struct { - uint32_t space; - uint32_t addr; - uint32_t intr; - uint32_t controller_handle; - uint32_t controller_ino; -} __attribute__ ((packed)) ofw_ebus_intr_map_t; - -typedef struct { - uint32_t space_mask; - uint32_t addr_mask; - uint32_t intr_mask; -} __attribute__ ((packed)) ofw_ebus_intr_mask_t; - -extern bool ofw_ebus_apply_ranges(ofw_tree_node_t *, ofw_ebus_reg_t *, - uintptr_t *); -extern bool ofw_ebus_map_interrupt(ofw_tree_node_t *, ofw_ebus_reg_t *, - uint32_t, int *, cir_t *, void **); - -#endif Index: kernel/genarch/include/ofw/ofw_tree.h =================================================================== --- kernel/genarch/include/ofw/ofw_tree.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,89 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef KERN_OFW_TREE_H_ -#define KERN_OFW_TREE_H_ - -#include - -#define OFW_TREE_PROPERTY_MAX_NAMELEN 32 - -typedef uint32_t phandle; - -/** Memory representation of OpenFirmware device tree node property. */ -typedef struct { - char name[OFW_TREE_PROPERTY_MAX_NAMELEN]; - size_t size; - void *value; -} ofw_tree_property_t; - -/** Memory representation of OpenFirmware device tree node. */ -typedef struct ofw_tree_node { - struct ofw_tree_node *parent; - struct ofw_tree_node *peer; - struct ofw_tree_node *child; - - phandle node_handle; /**< Old OpenFirmware node handle. */ - - char *da_name; /**< Disambigued name. */ - - size_t properties; /**< Number of properties. */ - ofw_tree_property_t *property; - - /** - * Pointer to a structure representing respective device. - * Its semantics is device dependent. - */ - void *device; -} ofw_tree_node_t; - -/* Walker for visiting OpenFirmware device tree nodes. */ -typedef bool (* ofw_tree_walker_t)(ofw_tree_node_t *, void *); - -extern void ofw_tree_init(ofw_tree_node_t *); -extern void ofw_sysinfo_map(void); - -extern const char *ofw_tree_node_name(const ofw_tree_node_t *); -extern ofw_tree_node_t *ofw_tree_lookup(const char *); -extern ofw_tree_property_t *ofw_tree_getprop(const ofw_tree_node_t *, - const char *); -extern void ofw_tree_walk_by_device_type(const char *, ofw_tree_walker_t, - void *); - -extern ofw_tree_node_t *ofw_tree_find_child(ofw_tree_node_t *, const char *); -extern ofw_tree_node_t *ofw_tree_find_child_by_device_type(ofw_tree_node_t *, - const char *); - -extern ofw_tree_node_t *ofw_tree_find_peer_by_device_type(ofw_tree_node_t *, - const char *); -extern ofw_tree_node_t *ofw_tree_find_peer_by_name(ofw_tree_node_t *, - const char *); -extern ofw_tree_node_t *ofw_tree_find_node_by_handle(ofw_tree_node_t *, - phandle); - -#endif Index: kernel/genarch/include/ofw/pci.h =================================================================== --- kernel/genarch/include/ofw/pci.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,64 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef KERN_PCI_H_ -#define KERN_PCI_H_ - -#include -#include -#include -#include - -typedef struct { - /* Needs to be masked to obtain pure space id */ - uint32_t space; - - /* Group phys.mid and phys.lo together */ - uint64_t addr; - uint64_t size; -} __attribute__ ((packed)) ofw_pci_reg_t; - -typedef struct { - uint32_t space; - - /* Group phys.mid and phys.lo together */ - uint64_t child_base; - uint64_t parent_base; - uint64_t size; -} __attribute__ ((packed)) ofw_pci_range_t; - -extern bool ofw_pci_apply_ranges(ofw_tree_node_t *, ofw_pci_reg_t *, - uintptr_t *); - -extern bool ofw_pci_reg_absolutize(ofw_tree_node_t *, ofw_pci_reg_t *, - ofw_pci_reg_t *); - -extern bool ofw_pci_map_interrupt(ofw_tree_node_t *, ofw_pci_reg_t *, - int, int *, cir_t *, void **); - -#endif Index: kernel/genarch/include/ofw/sbus.h =================================================================== --- kernel/genarch/include/ofw/sbus.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef KERN_SBUS_H_ -#define KERN_SBUS_H_ - -#include -#include -#include -#include - -typedef struct { - uint64_t addr; - uint32_t size; -} __attribute__ ((packed)) ofw_sbus_reg_t; - -typedef struct { - uint64_t child_base; - uint64_t parent_base; - uint32_t size; -} __attribute__ ((packed)) ofw_sbus_range_t; - -extern bool ofw_sbus_apply_ranges(ofw_tree_node_t *, ofw_sbus_reg_t *, - uintptr_t *); - -#endif Index: kernel/genarch/include/ofw/upa.h =================================================================== --- kernel/genarch/include/ofw/upa.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef KERN_UPA_H_ -#define KERN_UPA_H_ - -#include -#include -#include -#include - -typedef struct { - uint64_t addr; - uint64_t size; -} __attribute__ ((packed)) ofw_upa_reg_t; - -extern bool ofw_upa_apply_ranges(ofw_tree_node_t *, ofw_upa_reg_t *, - uintptr_t *); - -#endif Index: kernel/genarch/include/softint/division.h =================================================================== --- kernel/genarch/include/softint/division.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,60 +1,0 @@ -/* - * Copyright (c) 2006 Josef Cejka - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** @file - */ - -#ifndef KERN_DIVISION_H_ -#define KERN_DIVISION_H_ - -extern int __divsi3(int, int); -extern long long __divdi3(long long, long long); - -extern unsigned int __udivsi3(unsigned int, unsigned int); -extern unsigned long long __udivdi3(unsigned long long, unsigned long long); - -extern int __modsi3(int, int); -extern long long __moddi3(long long, long long); - -extern unsigned int __umodsi3(unsigned int, unsigned int); -extern unsigned long long __umoddi3(unsigned long long, unsigned long long); - -extern int __divmodsi3(int, int, int *); -extern unsigned int __udivmodsi3(unsigned int, unsigned int, unsigned int *); - -extern long long __divmoddi3(long long, long long, long long *); -extern unsigned long long __udivmoddi3(unsigned long long, unsigned long long, - unsigned long long *); - -#endif - -/** @} - */ Index: kernel/genarch/include/softint/multiplication.h =================================================================== --- kernel/genarch/include/softint/multiplication.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2009 Josef Cejka - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** - * @file - */ - -#ifndef KERN_MULTIPLICATION_H_ -#define KERN_MULTIPLICATION_H_ - -/* 64 bit multiplication */ -extern long long __muldi3(long long, long long); - -#endif - -/** @} - */ Index: kernel/genarch/include/srln/srln.h =================================================================== --- kernel/genarch/include/srln/srln.h (revision 124a1cefb116867ae31a79dfb959bfec793677ac) +++ (revision ) @@ -1,55 +1,0 @@ -/* - * Copyright (c) 2009 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup genarch - * @{ - */ -/** - * @file - */ - -#ifndef KERN_SRLN_H_ -#define KERN_SRLN_H_ - -#include -#include - -typedef struct { - thread_t *thread; - - indev_t *sink; - indev_t raw; -} srln_instance_t; - -extern srln_instance_t *srln_init(void); -extern indev_t *srln_wire(srln_instance_t *, indev_t *); - -#endif - -/** @} - */